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Thu, 25 Sep 2025 13:46:07 -0700 (PDT) Received: from localhost.localdomain ([78.209.201.53]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e2a996bf1sm91201395e9.1.2025.09.25.13.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Sep 2025 13:46:07 -0700 (PDT) From: Antoni Pokusinski To: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-iio@vger.kernel.org, linux@roeck-us.net, rodrigo.gobbi.7@gmail.com, naresh.solanki@9elements.com, michal.simek@amd.com, grantpeltier93@gmail.com, farouk.bouabid@cherry.de, marcelo.schmitt1@gmail.com, Antoni Pokusinski Subject: [PATCH v2 3/4] iio: mpl3115: add support for DRDY interrupt Date: Thu, 25 Sep 2025 22:45:37 +0200 Message-Id: <20250925204538.63723-4-apokusinski01@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250925204538.63723-1-apokusinski01@gmail.com> References: <20250925204538.63723-1-apokusinski01@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MPL3115 sensor features a "data ready" interrupt which indicates the presence of new measurements. Signed-off-by: Antoni Pokusinski --- drivers/iio/pressure/mpl3115.c | 197 ++++++++++++++++++++++++++++++--- 1 file changed, 184 insertions(+), 13 deletions(-) diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c index 80af672f65c6..13c8b338a15e 100644 --- a/drivers/iio/pressure/mpl3115.c +++ b/drivers/iio/pressure/mpl3115.c @@ -7,49 +7,77 @@ * (7-bit I2C slave address 0x60) * * TODO: FIFO buffer, altimeter mode, oversampling, continuous mode, - * interrupts, user offset correction, raw mode + * user offset correction, raw mode */ =20 #include #include #include #include +#include =20 #include #include #include #include #include +#include =20 #define MPL3115_STATUS 0x00 #define MPL3115_OUT_PRESS 0x01 /* MSB first, 20 bit */ #define MPL3115_OUT_TEMP 0x04 /* MSB first, 12 bit */ #define MPL3115_WHO_AM_I 0x0c +#define MPL3115_INT_SOURCE 0x12 +#define MPL3115_PT_DATA_CFG 0x13 #define MPL3115_CTRL_REG1 0x26 +#define MPL3115_CTRL_REG3 0x28 +#define MPL3115_CTRL_REG4 0x29 +#define MPL3115_CTRL_REG5 0x2a =20 #define MPL3115_DEVICE_ID 0xc4 =20 #define MPL3115_STATUS_PRESS_RDY BIT(2) #define MPL3115_STATUS_TEMP_RDY BIT(1) =20 -#define MPL3115_CTRL_RESET BIT(2) /* software reset */ -#define MPL3115_CTRL_OST BIT(1) /* initiate measurement */ -#define MPL3115_CTRL_ACTIVE BIT(0) /* continuous measurement */ -#define MPL3115_CTRL_OS_258MS (BIT(5) | BIT(4)) /* 64x oversampling */ +#define MPL3115_INT_SRC_DRDY BIT(7) + +#define MPL3115_PT_DATA_EVENT_ALL GENMASK(2, 0) + +#define MPL3115_CTRL1_RESET BIT(2) /* software reset */ +#define MPL3115_CTRL1_OST BIT(1) /* initiate measurement */ +#define MPL3115_CTRL1_ACTIVE BIT(0) /* continuous measurement */ +#define MPL3115_CTRL1_OS_258MS GENMASK(5, 4) /* 64x oversampling */ + +#define MPL3115_CTRL3_IPOL1 BIT(5) +#define MPL3115_CTRL3_IPOL2 BIT(1) + +#define MPL3115_CTRL4_INT_EN_DRDY BIT(7) + +#define MPL3115_CTRL5_INT_CFG_DRDY BIT(7) + +#define MPL3115_INT2 BIT(2) /* flag that indicates INT2 in use */ =20 struct mpl3115_data { struct i2c_client *client; + struct iio_trigger *drdy_trig; struct mutex lock; u8 ctrl_reg1; }; =20 +enum mpl3115_irq_type { + INT2_ACTIVE_LOW =3D MPL3115_INT2 | IRQF_TRIGGER_FALLING, + INT2_ACTIVE_HIGH =3D MPL3115_INT2 | IRQF_TRIGGER_RISING, + INT1_ACTIVE_LOW =3D (!MPL3115_INT2) | IRQF_TRIGGER_FALLING, + INT1_ACTIVE_HIGH =3D (!MPL3115_INT2) | IRQF_TRIGGER_RISING, +}; + static int mpl3115_request(struct mpl3115_data *data) { int ret, tries =3D 15; =20 /* trigger measurement */ ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1, - data->ctrl_reg1 | MPL3115_CTRL_OST); + data->ctrl_reg1 | MPL3115_CTRL1_OST); if (ret < 0) return ret; =20 @@ -58,7 +86,7 @@ static int mpl3115_request(struct mpl3115_data *data) if (ret < 0) return ret; /* wait for data ready, i.e. OST cleared */ - if (!(ret & MPL3115_CTRL_OST)) + if (!(ret & MPL3115_CTRL1_OST)) break; msleep(20); } @@ -166,9 +194,11 @@ static irqreturn_t mpl3115_trigger_handler(int irq, vo= id *p) int ret, pos =3D 0; =20 scoped_guard(mutex, &data->lock) { - ret =3D mpl3115_request(data); - if (ret < 0) - goto done; + if (!(data->ctrl_reg1 & MPL3115_CTRL1_ACTIVE)) { + ret =3D mpl3115_request(data); + if (ret < 0) + goto done; + } =20 if (test_bit(0, indio_dev->active_scan_mask)) { ret =3D i2c_smbus_read_i2c_block_data(data->client, @@ -224,10 +254,147 @@ static const struct iio_chan_spec mpl3115_channels[]= =3D { IIO_CHAN_SOFT_TIMESTAMP(2), }; =20 +static irqreturn_t mpl3115_interrupt_handler(int irq, void *private) +{ + struct iio_dev *indio_dev =3D private; + struct mpl3115_data *data =3D iio_priv(indio_dev); + int ret; + + ret =3D i2c_smbus_read_byte_data(data->client, MPL3115_INT_SOURCE); + if (ret < 0) + return IRQ_HANDLED; + + if (!(ret & MPL3115_INT_SRC_DRDY)) + return IRQ_NONE; + + iio_trigger_poll_nested(data->drdy_trig); + + return IRQ_HANDLED; +} + +static int mpl3115_set_trigger_state(struct iio_trigger *trig, bool state) +{ + struct iio_dev *indio_dev =3D iio_trigger_get_drvdata(trig); + struct mpl3115_data *data =3D iio_priv(indio_dev); + int ret; + u8 ctrl_reg1 =3D data->ctrl_reg1; + + if (state) + ctrl_reg1 |=3D MPL3115_CTRL1_ACTIVE; + else + ctrl_reg1 &=3D ~MPL3115_CTRL1_ACTIVE; + + guard(mutex)(&data->lock); + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1, + ctrl_reg1); + if (ret < 0) + return ret; + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG4, + state ? MPL3115_CTRL4_INT_EN_DRDY : 0); + if (ret < 0) + goto reg1_cleanup; + + data->ctrl_reg1 =3D ctrl_reg1; + + return 0; + +reg1_cleanup: + i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1, + data->ctrl_reg1); + return ret; +} + +static const struct iio_trigger_ops mpl3115_trigger_ops =3D { + .set_trigger_state =3D mpl3115_set_trigger_state, +}; + static const struct iio_info mpl3115_info =3D { .read_raw =3D &mpl3115_read_raw, }; =20 +static int mpl3115_trigger_probe(struct mpl3115_data *data, + struct iio_dev *indio_dev) +{ + struct fwnode_handle *fwnode =3D dev_fwnode(&data->client->dev); + int ret, irq, irq_type, irq_cfg_flags =3D 0; + + irq =3D fwnode_irq_get_byname(fwnode, "INT1"); + if (irq < 0) { + irq =3D fwnode_irq_get_byname(fwnode, "INT2"); + if (irq < 0) + return 0; + + irq_cfg_flags |=3D MPL3115_INT2; + } + + irq_type =3D irq_get_trigger_type(irq); + if (irq_type !=3D IRQF_TRIGGER_RISING && irq_type !=3D IRQF_TRIGGER_FALLI= NG) + return -EINVAL; + + irq_cfg_flags |=3D irq_type; + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_PT_DATA_CFG, + MPL3115_PT_DATA_EVENT_ALL); + if (ret < 0) + return ret; + + switch (irq_cfg_flags) { + case INT2_ACTIVE_HIGH: + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG3, + MPL3115_CTRL3_IPOL2); + if (ret) + return ret; + + break; + case INT2_ACTIVE_LOW: + break; + case INT1_ACTIVE_HIGH: + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG5, + MPL3115_CTRL5_INT_CFG_DRDY); + if (ret) + return ret; + + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG3, + MPL3115_CTRL3_IPOL1); + if (ret) + return ret; + + break; + case INT1_ACTIVE_LOW: + ret =3D i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG5, + MPL3115_CTRL5_INT_CFG_DRDY); + if (ret) + return ret; + break; + default: + return -EINVAL; + } + + data->drdy_trig =3D devm_iio_trigger_alloc(&data->client->dev, + "%s-dev%d", + indio_dev->name, + iio_device_id(indio_dev)); + if (!data->drdy_trig) + return -ENOMEM; + + data->drdy_trig->ops =3D &mpl3115_trigger_ops; + iio_trigger_set_drvdata(data->drdy_trig, indio_dev); + ret =3D devm_iio_trigger_register(&data->client->dev, data->drdy_trig); + if (ret) + return ret; + + indio_dev->trig =3D iio_trigger_get(data->drdy_trig); + + return devm_request_threaded_irq(&data->client->dev, irq, + NULL, + mpl3115_interrupt_handler, + IRQF_ONESHOT, + "mpl3115_irq", + indio_dev); +} + static int mpl3115_probe(struct i2c_client *client) { const struct i2c_device_id *id =3D i2c_client_get_device_id(client); @@ -258,15 +425,19 @@ static int mpl3115_probe(struct i2c_client *client) =20 /* software reset, I2C transfer is aborted (fails) */ i2c_smbus_write_byte_data(client, MPL3115_CTRL_REG1, - MPL3115_CTRL_RESET); + MPL3115_CTRL1_RESET); msleep(50); =20 - data->ctrl_reg1 =3D MPL3115_CTRL_OS_258MS; + data->ctrl_reg1 =3D MPL3115_CTRL1_OS_258MS; ret =3D i2c_smbus_write_byte_data(client, MPL3115_CTRL_REG1, data->ctrl_reg1); if (ret < 0) return ret; =20 + ret =3D mpl3115_trigger_probe(data, indio_dev); + if (ret) + return ret; + ret =3D iio_triggered_buffer_setup(indio_dev, NULL, mpl3115_trigger_handler, NULL); if (ret < 0) @@ -285,7 +456,7 @@ static int mpl3115_probe(struct i2c_client *client) static int mpl3115_standby(struct mpl3115_data *data) { return i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1, - data->ctrl_reg1 & ~MPL3115_CTRL_ACTIVE); + data->ctrl_reg1 & ~MPL3115_CTRL1_ACTIVE); } =20 static void mpl3115_remove(struct i2c_client *client) --=20 2.25.1