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Wed, 24 Sep 2025 09:57:26 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:26d9:5758:328a:50f8]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-77e0bb98790sm16815959b3a.9.2025.09.24.09.57.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Sep 2025 09:57:26 -0700 (PDT) From: Brian Norris To: Bjorn Helgaas Cc: linux-pci@vger.kernel.org, Andrey Ryabinin , Ethan Zhao , linux-kernel@vger.kernel.org, Brian Norris , stable@vger.kernel.org, Brian Norris Subject: [PATCH v2] PCI/sysfs: Ensure devices are powered for config reads Date: Wed, 24 Sep 2025 09:57:11 -0700 Message-ID: <20250924095711.v2.1.Ibb5b6ca1e2c059e04ec53140cd98a44f2684c668@changeid> X-Mailer: git-send-email 2.51.0.536.g15c5d4f767-goog Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Brian Norris max_link_width, current_link_speed, current_link_width, secondary_bus_number, and subordinate_bus_number all access config registers, but they don't check the runtime PM state. If the device is in D3cold or a parent bridge is suspended, we may see -EINVAL, bogus values, or worse, depending on implementation details. Wrap these access in pci_config_pm_runtime_{get,put}() like most of the rest of the similar sysfs attributes. Notably, max_link_speed does not access config registers; it returns a cached value [1]. So it needs no changes. [1] Caching was added to pcie_get_speed_cap() in v6.13 via commit d2bd39c0456b ("PCI: Store all PCIe Supported Link Speeds"). Fixes: 56c1af4606f0 ("PCI: Add sysfs max_link_speed/width, current_link_spe= ed/width, etc") Cc: stable@vger.kernel.org Signed-off-by: Brian Norris Signed-off-by: Brian Norris --- Changes in v2: * Don't touch max_link_speed; it's cached, so we don't actually touch the hardware * Improve commit message drivers/pci/pci-sysfs.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index f28fdf6dfa02..af74cf02bb90 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -209,8 +209,14 @@ static ssize_t max_link_width_show(struct device *dev, struct device_attribute *attr, char *buf) { struct pci_dev *pdev =3D to_pci_dev(dev); + ssize_t ret; =20 - return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev)); + /* We read PCI_EXP_LNKCAP, so we need the device to be accessible. */ + pci_config_pm_runtime_get(pdev); + ret =3D sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev)); + pci_config_pm_runtime_put(pdev); + + return ret; } static DEVICE_ATTR_RO(max_link_width); =20 @@ -222,7 +228,10 @@ static ssize_t current_link_speed_show(struct device *= dev, int err; enum pci_bus_speed speed; =20 + pci_config_pm_runtime_get(pci_dev); err =3D pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); + pci_config_pm_runtime_put(pci_dev); + if (err) return -EINVAL; =20 @@ -239,7 +248,10 @@ static ssize_t current_link_width_show(struct device *= dev, u16 linkstat; int err; =20 + pci_config_pm_runtime_get(pci_dev); err =3D pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); + pci_config_pm_runtime_put(pci_dev); + if (err) return -EINVAL; =20 @@ -255,7 +267,10 @@ static ssize_t secondary_bus_number_show(struct device= *dev, u8 sec_bus; int err; =20 + pci_config_pm_runtime_get(pci_dev); err =3D pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); + pci_config_pm_runtime_put(pci_dev); + if (err) return -EINVAL; =20 @@ -271,7 +286,10 @@ static ssize_t subordinate_bus_number_show(struct devi= ce *dev, u8 sub_bus; int err; =20 + pci_config_pm_runtime_get(pci_dev); err =3D pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); + pci_config_pm_runtime_put(pci_dev); + if (err) return -EINVAL; =20 --=20 2.51.0.536.g15c5d4f767-goog