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[2001:b400:e384:7809:50d7:4f66:57aa:588c]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-77f254f8f68sm11058495b3a.56.2025.09.24.05.28.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Sep 2025 05:29:00 -0700 (PDT) From: Kevin Tung Date: Wed, 24 Sep 2025 20:28:50 +0800 Subject: [PATCH v2 1/2] dt-bindings: arm: aspeed: add Meta Yosemite5 board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250924-yv5_add_dts-v2-1-39a4a8e3c9e6@gmail.com> References: <20250924-yv5_add_dts-v2-0-39a4a8e3c9e6@gmail.com> In-Reply-To: <20250924-yv5_add_dts-v2-0-39a4a8e3c9e6@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Geert Uytterhoeven , Magnus Damm Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Amithash Prasasd , Kevin Tung , Ken Chen , Leo Yang , Kevin Tung X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758716933; l=886; i=kevin.tung.openbmc@gmail.com; s=20250924; h=from:subject:message-id; bh=YB1a54MMJXi5nKTH9gbuafJV6b8bO8PW9GeT78qICUA=; b=niNRJVGxu/G3iuEdL49yqUkGn3N0ZSiWXbUk1WNZzk0EayhrlvQV4FUn6veJSMmD9Z72xEqo8 RLa9pscBXnjBtD5vl3CExk+zp4wJKthnmKhKAmJe/yDHYmpwL2Tw5fS X-Developer-Key: i=kevin.tung.openbmc@gmail.com; a=ed25519; pk=PjAss0agA0hiuLfIBlA9j/qBmJaPCDP+jmQIUB6SE7g= Document the new compatibles used on Meta Yosemite5. Signed-off-by: Kevin Tung --- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Doc= umentation/devicetree/bindings/arm/aspeed/aspeed.yaml index 456dbf7b5ec8f4442be815284e1ad085287dc443..6f2b12f96bd6ce31b4175e109a7= 8d931dffdfe28 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -89,6 +89,7 @@ properties: - facebook,minerva-cmc - facebook,santabarbara-bmc - facebook,yosemite4-bmc + - facebook,yosemite5-bmc - ibm,blueridge-bmc - ibm,everest-bmc - ibm,fuji-bmc --=20 2.51.0 From nobody Thu Oct 2 00:50:45 2025 Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83A373043BD for ; Wed, 24 Sep 2025 12:29:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[2001:b400:e384:7809:50d7:4f66:57aa:588c]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-77f254f8f68sm11058495b3a.56.2025.09.24.05.29.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Sep 2025 05:29:05 -0700 (PDT) From: Kevin Tung Date: Wed, 24 Sep 2025 20:28:51 +0800 Subject: [PATCH v2 2/2] ARM: dts: aspeed: yosemite5: Add Meta Yosemite5 BMC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250924-yv5_add_dts-v2-2-39a4a8e3c9e6@gmail.com> References: <20250924-yv5_add_dts-v2-0-39a4a8e3c9e6@gmail.com> In-Reply-To: <20250924-yv5_add_dts-v2-0-39a4a8e3c9e6@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Geert Uytterhoeven , Magnus Damm Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Amithash Prasasd , Kevin Tung , Ken Chen , Leo Yang , Kevin Tung X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758716933; l=24324; i=kevin.tung.openbmc@gmail.com; s=20250924; h=from:subject:message-id; bh=INPD6SvS6X+KwaT17cxK5w/jgQiUjiexfArMIui2sQ0=; b=lMaTNuSPmJKqTyDsKzZF9RNzVD9VVstglqS6pEIY3klbLM7Q+v0arh5jGwLwMwsPd0SSRWJO7 5ShNPdJTuK8DFNUS4nSQj0lvN9d13/OUMG3RxFTS4zR9EZfdGxEQZyM X-Developer-Key: i=kevin.tung.openbmc@gmail.com; a=ed25519; pk=PjAss0agA0hiuLfIBlA9j/qBmJaPCDP+jmQIUB6SE7g= Add device tree for the Meta (Facebook) Yosemite5 compute node, based on the AST2600 BMC. The Yosemite5 platform provides monitoring of voltages, power, temperatures, and other critical parameters across the motherboard, CXL board, E1.S expansion board, and NIC components. The BMC also logs relevant events and performs appropriate system actions in response to abnormal conditions. Signed-off-by: Kevin Tung --- .../dts/aspeed/aspeed-bmc-facebook-yosemite5.dts | 1068 ++++++++++++++++= ++++ 1 file changed, 1068 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite5.dts b/a= rch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite5.dts new file mode 100644 index 0000000000000000000000000000000000000000..d71106c21ccd8d984606f6689e8= c2c55ecf28d05 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite5.dts @@ -0,0 +1,1068 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (c) 2025 Facebook Inc. + +/dts-v1/; +#include "aspeed-g6.dtsi" +#include +#include + +/ { + model =3D "Facebook Yosemite 5 BMC"; + compatible =3D "facebook,yosemite5-bmc", "aspeed,ast2600"; + + aliases { + i2c16 =3D &i2c5mux0ch0; + i2c17 =3D &i2c5mux0ch1; + i2c18 =3D &i2c5mux0ch2; + i2c19 =3D &i2c5mux0ch3; + i2c20 =3D &i2c5mux1ch0; + i2c21 =3D &i2c5mux1ch1; + i2c22 =3D &i2c5mux1ch2; + i2c23 =3D &i2c5mux1ch3; + i2c24 =3D &i2c6mux0ch0; + i2c25 =3D &i2c6mux0ch1; + i2c26 =3D &i2c6mux0ch2; + i2c27 =3D &i2c6mux0ch3; + i2c28 =3D &i2c8mux0ch0; + i2c29 =3D &i2c8mux0ch1; + i2c30 =3D &i2c8mux0ch2; + i2c31 =3D &i2c8mux0ch3; + i2c32 =3D &i2c30mux0ch0; + i2c33 =3D &i2c30mux0ch1; + i2c34 =3D &i2c30mux0ch2; + i2c35 =3D &i2c30mux0ch3; + serial0 =3D &uart1; + serial2 =3D &uart3; + serial3 =3D &uart4; + serial4 =3D &uart5; + }; + + chosen { + stdout-path =3D "serial4:57600n8"; + }; + + iio-hwmon { + compatible =3D "iio-hwmon"; + io-channels =3D <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, + <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, + <&adc1 2>; + }; + + leds { + compatible =3D "gpio-leds"; + + led-0 { + label =3D "bmc_heartbeat_amber"; + gpios =3D <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "heartbeat"; + }; + + led-1 { + label =3D "fp_id_amber"; + default-state =3D "off"; + gpios =3D <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; + }; + + led-2 { + label =3D "power_blue"; + default-state =3D "off"; + gpios =3D <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>; + }; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x80000000 0x80000000>; + }; + + spi_gpio: spi { + compatible =3D "spi-gpio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + sck-gpios =3D <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; + mosi-gpios =3D <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; + miso-gpios =3D <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; + cs-gpios =3D <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; + num-chipselects =3D <1>; + status =3D "okay"; + + tpm@0 { + compatible =3D "infineon,slb9670", "tcg,tpm_tis-spi"; + spi-max-frequency =3D <33000000>; + reg =3D <0>; + }; + }; +}; + +&adc0 { + aspeed,int-vref-microvolt =3D <2500000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adc0_default + &pinctrl_adc1_default + &pinctrl_adc2_default + &pinctrl_adc3_default + &pinctrl_adc4_default + &pinctrl_adc5_default + &pinctrl_adc6_default + &pinctrl_adc7_default>; + status =3D "okay"; +}; + +&adc1 { + aspeed,int-vref-microvolt =3D <2500000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adc10_default>; + status =3D "okay"; +}; + +&ehci0 { + status =3D "okay"; +}; + +&ehci1 { + status =3D "okay"; +}; + +&fmc { + status =3D "okay"; + + flash@0 { + status =3D "okay"; + m25p,fast-read; + label =3D "bmc"; + spi-max-frequency =3D <50000000>; +#include "openbmc-flash-layout-128.dtsi" + }; + + flash@1 { + status =3D "okay"; + m25p,fast-read; + label =3D "alt-bmc"; + spi-max-frequency =3D <50000000>; + }; +}; + +&gpio0 { + gpio-line-names =3D + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "BATTERY_DETECT","","BMC_I2C1_FPGA_ALERT","BMC_READY", + "IOEXP_INT_3V3","FM_ID_LED","","", + /*C0-C7*/ "","","","", + "PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N","","BMC_I2C_SSIF_ALERT", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","","","","","","", + /*G0-G7*/ "FM_BMC_MUX1_SEL","","","", + "","","FM_DEBUG_PORT_PRSNT_N","FM_BMC_DBP_PRESENT_N", + /*H0-H7*/ "","","","","","","","", + /*I0-I7*/ "","","","","","FLASH_WP_STATUS","BMC_JTAG_MUX_SEL","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "PCIE_EP_RST_EN","BMC_FRU_WP","SCM_HPM_STBY_RST_N", + "SCM_HPM_STBY_EN","STBY_POWER_PG_3V3","TH500_SHDN_OK","","", + /*N0-N7*/ "led-postcode-0","led-postcode-1","led-postcode-2", + "led-postcode-3","led-postcode-4","led-postcode-5", + "led-postcode-6","led-postcode-7", + /*O0-O7*/ "RUN_POWER_PG","PWR_BRAKE","CHASSIS_AC_LOSS","BSM_PRSNT_N", + "PSU_SMB_ALERT","FM_TPM_PRSNT_0_N","PSU_FW_UPDATING_N","", + /*P0-P7*/ "PWR_BTN_BMC_N","IPEX_CABLE_PRSNT","ID_RST_BTN_BMC_N", + "RST_BMC_RSTBTN_OUT_N","BMC_PWR_LED","RUN_POWER_EN","SHDN_FORCE","", + /*Q0-Q7*/ "IRQ_PCH_TPM_SPI_LV3_N","USB_OC0_REAR_N","UART_MUX_SEL", + "I2C_MUX_RESET","RSVD_NV_PLT_DETECT","SPI_TPM_INT", + "CPU_JTAG_MUX_SELECT","THERM_BB_OVERT", + /*R0-R7*/ "THERM_BB_WARN","SPI_BMC_FPGA_INT","CPU_BOOT_DONE","PMBUS_GNT", + "CHASSIS_PWR_BRK","PCIE_WAKE","PDB_THERM_OVERT","SHDN_REQ", + /*S0-S7*/ "","","SYS_BMC_PWRBTN_N","FM_TPM_PRSNT_1_N", + "FM_BMC_DEBUG_SW_N","UID_LED_N","SYS_FAULT_LED_N","RUN_POWER_FAULT", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "FM_DBP_BMC_PRDY_N","","","","","","","", + /*V0-V7*/ "L2_RST_REQ_OUT","L0L1_RST_REQ_OUT","BMC_ID_BEEP_SEL", + "BMC_I2C0_FPGA_ALERT","SMB_BMC_TMP_ALERT","PWR_LED_N", + "SYS_RST_OUT","IRQ_TPM_SPI_N", + /*W0-W7*/ "","","","","","","IRQ_ESPI_LPC_SERIRQ_ALERT0_N","", + /*X0-X7*/ "","FM_DBP_CPU_PREQ_GF_N","","","","","","", + /*Y0-Y7*/ "","","FM_FLASH_LATCH_N","BMC_EMMC_RST_N","","","","", + /*Z0-Z7*/ "","","","","","","",""; +}; + +&gpio1 { + gpio-line-names =3D + /*18A0-18A7*/ "","","","","","","","", + /*18B0-18B7*/ "","","","","FM_BOARD_BMC_REV_ID0", + "FM_BOARD_BMC_REV_ID1","FM_BOARD_BMC_REV_ID2","", + /*18C0-18C7*/ "","","SPI_BMC_BIOS_ROM_IRQ0_N","","","","","", + /*18D0-18D7*/ "","","","","","","","", + /*18E0-18E3*/ "FM_BMC_PROT_LS_EN","AC_PWR_BMC_BTN_N","",""; +}; + +/* MB CPLD I2C */ +&i2c0 { + status =3D "okay"; +}; + +/* CPU I2C */ +&i2c1 { + status =3D "okay"; +}; + +/* MCIO 2A I2C */ +&i2c2 { + status =3D "okay"; +}; + +&i2c3 { + status =3D "okay"; + + /* Socket 0 SBRMI */ + sbrmi@3c { + compatible =3D "amd,sbrmi"; + reg =3D <0x3c>; + }; + + /* Socket 0 SBTSI */ + sbtsi@4c { + compatible =3D "amd,sbtsi"; + reg =3D <0x4c>; + }; +}; + +&i2c4 { + multi-master; + mctp-controller; + status =3D "okay"; + + mctp@10 { + compatible =3D "mctp-i2c-controller"; + reg =3D <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + /* OCP NIC TEMP */ + temperature-sensor@1f { + compatible =3D "ti,tmp421"; + reg =3D <0x1f>; + }; + + /* OCP NIC FRU EEPROM */ + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; +}; + +&i2c5 { + status =3D "okay"; + + /* I2C MUX for MCIO 1A */ + i2c-mux@70 { + compatible =3D "nxp,pca9546"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c5mux0ch0: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c5mux0ch1: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c5mux0ch2: i2c@2 { + reg =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c5mux0ch3: i2c@3 { + reg =3D <3>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + + /* I2C MUX for MCIO 0A */ + i2c-mux@77 { + compatible =3D "nxp,pca9546"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c5mux1ch0: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c5mux1ch1: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c5mux1ch2: i2c@2 { + reg =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c5mux1ch3: i2c@3 { + reg =3D <3>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; +}; + +&i2c6 { + status =3D "okay"; + + /* I2C MUX for PWRPIC #13 ~ #16 */ + i2c-mux@77 { + compatible =3D "nxp,pca9546"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + /* PWRPIC #13 */ + i2c6mux0ch0: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + /* PWRPIC #14 */ + i2c6mux0ch1: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + /* PWRPIC #16 */ + i2c6mux0ch2: i2c@2 { + reg =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + /* PWRPIC #15 */ + i2c6mux0ch3: i2c@3 { + reg =3D <3>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; +}; + +/* SCM CPLD I2C */ +&i2c7 { + status =3D "okay"; +}; + +&i2c8 { + status =3D "okay"; + + power-monitor@14 { + compatible =3D "infineon,xdp710"; + reg =3D <0x14>; + }; + + adc@1d { + compatible =3D "ti,adc128d818"; + reg =3D <0x1d>; + ti,mode =3D /bits/ 8 <1>; + }; + + power-sensor@40 { + compatible =3D "ti,ina238"; + reg =3D <0x40>; + shunt-resistor =3D <1000>; + }; + + /* PADDLE BD IOEXP */ + gpio-expander@41 { + compatible =3D "nxp,pca9536"; + reg =3D <0x41>; + gpio-controller; + #gpio-cells =3D <2>; + gpio-line-names =3D + "HSC_OC_GPIO0", "HSC_OC_GPIO1", + "HSC_OC_GPIO2", "HSC_OC_GPIO3"; + }; + + power-sensor@42 { + compatible =3D "ti,ina238"; + reg =3D <0x42>; + shunt-resistor =3D <1000>; + }; + + power-monitor@43 { + compatible =3D "lltc,ltc4287"; + reg =3D <0x43>; + shunt-resistor-micro-ohms =3D <250>; + }; + + power-sensor@44 { + compatible =3D "ti,ina238"; + reg =3D <0x44>; + shunt-resistor =3D <1000>; + }; + + power-sensor@45 { + compatible =3D "ti,ina238"; + reg =3D <0x45>; + shunt-resistor =3D <1000>; + }; + + power-monitor@47 { + compatible =3D "ti,tps25990"; + reg =3D <0x47>; + ti,rimon-micro-ohms =3D <430000000>; + }; + + temperature-sensor@48 { + compatible =3D "ti,tmp75"; + reg =3D <0x48>; + }; + + temperature-sensor@49 { + compatible =3D "ti,tmp75"; + reg =3D <0x49>; + }; + + /* PDB FRU */ + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + + /* Paddle BD FRU */ + eeprom@57 { + compatible =3D "atmel,24c128"; + reg =3D <0x57>; + }; + + power-monitor@58 { + compatible =3D "renesas,isl28022"; + reg =3D <0x58>; + shunt-resistor-micro-ohms =3D <1000>; + }; + + power-monitor@59 { + compatible =3D "renesas,isl28022"; + reg =3D <0x59>; + shunt-resistor-micro-ohms =3D <1000>; + }; + + power-monitor@5a { + compatible =3D "renesas,isl28022"; + reg =3D <0x5a>; + shunt-resistor-micro-ohms =3D <1000>; + }; + + power-monitor@5b { + compatible =3D "renesas,isl28022"; + reg =3D <0x5b>; + shunt-resistor-micro-ohms =3D <1000>; + }; + + psu@5c { + compatible =3D "renesas,raa228006"; + reg =3D <0x5c>; + }; + + fan-controller@5e{ + compatible =3D "maxim,max31790"; + reg =3D <0x5e>; + }; + + /* I2C MUX for PWRPIC #1, #2, #11, #12 */ + i2c-mux@77 { + compatible =3D "nxp,pca9546"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + /* PWRPIC #1 */ + i2c8mux0ch0: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + /* PWRPIC #2 */ + i2c8mux0ch1: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + /* PWRPIC #12 (Connector to CXL BD) */ + i2c8mux0ch2: i2c@2 { + reg =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + i2c-mux@70 { + compatible =3D "nxp,pca9546"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c30mux0ch0: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c30mux0ch1: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c30mux0ch2: i2c@2 { + reg =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@1e { + compatible =3D "ti,adc128d818"; + reg =3D <0x1e>; + ti,mode =3D /bits/ 8 <1>; + }; + + adc@1f { + compatible =3D "ti,adc128d818"; + reg =3D <0x1f>; + ti,mode =3D /bits/ 8 <1>; + }; + + /* CXL BD IOEXP */ + gpio-expander@27 { + compatible =3D "nxp,pca9535"; + reg =3D <0x27>; + gpio-controller; + #gpio-cells =3D <2>; + gpio-line-names =3D + "IRQ_TEMP_0_ALERT_N","IRQ_TEMP_1_ALERT_N", + "ALERT_PMBUS_0_N","ALERT_PMBUS_1_N", + "ALERT_PMBUS_2_N","IRQ_INA230_12V_ALERT_N", + "RST_IOX_CXL_N","DEBUG_UART_SEL_0", + "DEBUG_UART_SEL_1","BMC_REMOTEJTAG_EN_N", + "JTAG_BMC_3V3_CTL_CLR_N","DDR_CH02_I2C_MUX_SEL", + "DDR_CH13_I2C_MUX_SEL","SYS_OK", + "CXL_VRHOT_ALERT_R1_N",""; + }; + + temperature-sensor@4a { + compatible =3D "ti,tmp75"; + reg =3D <0x4a>; + }; + + temperature-sensor@4c { + compatible =3D "ti,tmp432"; + reg =3D <0x4c>; + }; + + power-sensor@4d { + compatible =3D "ti,ina230"; + reg =3D <0x4d>; + shunt-resistor =3D <2000>; + }; + + temperature-sensor@4e { + compatible =3D "ti,tmp75"; + reg =3D <0x4e>; + }; + + /* CXL FRU */ + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + i2c30mux0ch3: i2c@3 { + reg =3D <3>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; + + /* PWRPIC #11 */ + i2c8mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + }; + }; +}; + +&i2c9 { + status =3D "okay"; + + temperature-sensor@4b { + compatible =3D "ti,tmp75"; + reg =3D <0x4b>; + }; + + /* SCM FRU */ + eeprom@50 { + compatible =3D "atmel,24c128"; + reg =3D <0x50>; + }; + + /* BSM FRU */ + eeprom@56 { + compatible =3D "atmel,24c64"; + reg =3D <0x56>; + }; +}; + +/* MCIO 0A I2C */ +&i2c10 { + status =3D "okay"; + + /* E1S EB IOEXP0 */ + gpio-expander@21 { + compatible =3D "nxp,pca9535"; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <172 IRQ_TYPE_EDGE_FALLING>; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + gpio-line-names =3D + "RST_SMB_E1S_0","LED_ACTIVE_E1S_0", + "E1S_0_PRSNT_N","RST_PCIE_E1S_0_PERST", + "E1S_0_PWRDIS","ALERT_INA_0", + "","", + "RST_SMB_E1S_1","LED_ACTIVE_E1S_1", + "E1S_1_PRSNT_N","RST_PCIE_E1S_1_PERST", + "E1S_1_PWRDIS","ALERT_INA_1", + "",""; + }; + + /* E1S EB IOEXP1 */ + gpio-expander@22 { + compatible =3D "nxp,pca9535"; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <174 IRQ_TYPE_EDGE_FALLING>; + reg =3D <0x22>; + gpio-controller; + #gpio-cells =3D <2>; + gpio-line-names =3D + "P12V_E1S_EN_0","PWRGD_P12V_E1S_0", + "P12V_E1S_FLTB_0","PWRGD_P3V3_E1S_0", + "FM_P3V3_E1S_0_FAULT","P12V_E1S_EN_1", + "PWRGD_P12V_E1S_1","P12V_E1S_FLTB_1", + "PWRGD_P3V3_E1S_1","FM_P3V3_E1S_1_FAULT", + "","", + "","", + "PWRGD_P3V3_AUX","ALERT_TEMP"; + }; + + power-sensor@40 { + compatible =3D "ti,ina233"; + reg =3D <0x40>; + shunt-resistor =3D <2000>; + ti,maximum-expected-current-microamp =3D <32768000>; + }; + + power-sensor@45 { + compatible =3D "ti,ina233"; + reg =3D <0x45>; + shunt-resistor =3D <2000>; + ti,maximum-expected-current-microamp =3D <32768000>; + }; + + adc@48 { + compatible =3D "ti,ads7830"; + reg =3D <0x48>; + }; + + temperature-sensor@49 { + compatible =3D "ti,tmp75"; + reg =3D <0x49>; + }; + + /* E1S EB FRU */ + eeprom@54 { + compatible =3D "atmel,24c128"; + reg =3D <0x54>; + }; +}; + +&i2c11 { + status =3D "okay"; + + /* MB IOEXP */ + gpio-expander@21 { + compatible =3D "nxp,pca9535"; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <170 IRQ_TYPE_EDGE_FALLING>; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + gpio-line-names =3D + "ALERT_CLKMUX_0_LOSS_N","ALERT_CLKMUX_1_LOSS_N", + "ALERT_CLKMUX_2_LOSS_N","ALERT_CLKMUX_3_LOSS_N", + "FM_CLKMUX_0_SEL","FM_CLKMUX_1_SEL", + "FM_CLKMUX_2_SEL","FM_CLKMUX_3_SEL", + "RST_USB_HUB_0_N","FM_CLKGEN_GPIO2", + "","FM_BMC_RTC_RST", + "FM_P3V_BAT_SCALED_EN","", + "FM_CLKGEN_GPIO4","RST_USB_HUB_1_N"; + }; + + power-sensor@40 { + compatible =3D "ti,ina230"; + reg =3D <0x40>; + shunt-resistor =3D <2000>; + }; + + power-sensor@41 { + compatible =3D "ti,ina230"; + reg =3D <0x41>; + shunt-resistor =3D <2000>; + }; + + power-sensor@42 { + compatible =3D "ti,ina230"; + reg =3D <0x42>; + shunt-resistor =3D <2000>; + }; + + power-sensor@43 { + compatible =3D "ti,ina230"; + reg =3D <0x43>; + shunt-resistor =3D <2000>; + }; + + power-sensor@44 { + compatible =3D "ti,ina230"; + reg =3D <0x44>; + shunt-resistor =3D <2000>; + }; + + power-sensor@45 { + compatible =3D "ti,ina230"; + reg =3D <0x45>; + shunt-resistor =3D <2000>; + }; + + adc@48 { + compatible =3D "ti,ads7830"; + reg =3D <0x48>; + }; + + adc@49 { + compatible =3D "ti,ads7830"; + reg =3D <0x49>; + }; + + adc@4b { + compatible =3D "ti,ads7830"; + reg =3D <0x4b>; + }; +}; + +/* MCIO 4A I2C */ +&i2c12 { + multi-master; + mctp-controller; + status =3D "okay"; + + mctp@10 { + compatible =3D "mctp-i2c-controller"; + reg =3D <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; +}; + +&i2c13 { + status =3D "okay"; + + power-sensor@40 { + compatible =3D "ti,ina230"; + reg =3D <0x40>; + shunt-resistor =3D <2000>; + }; + + power-sensor@41 { + compatible =3D "ti,ina230"; + reg =3D <0x41>; + shunt-resistor =3D <2000>; + }; + + power-sensor@44 { + compatible =3D "ti,ina230"; + reg =3D <0x44>; + shunt-resistor =3D <2000>; + }; + + power-sensor@45 { + compatible =3D "ti,ina230"; + reg =3D <0x45>; + shunt-resistor =3D <2000>; + }; + + temperature-sensor@48 { + compatible =3D "national,lm75b"; + reg =3D <0x48>; + }; + + temperature-sensor@49 { + compatible =3D "national,lm75b"; + reg =3D <0x49>; + }; + + /* CLKGEN FRU */ + eeprom@50 { + compatible =3D "atmel,24c16"; + reg =3D <0x50>; + }; + + /* MB FRU */ + eeprom@51 { + compatible =3D "atmel,24c128"; + reg =3D <0x51>; + }; + + /* CPU FRU */ + eeprom@53 { + compatible =3D "atmel,24c128"; + reg =3D <0x53>; + }; + + rtc@68 { + compatible =3D "dallas,ds1339"; + reg =3D <0x68>; + }; +}; + +/* PROT reserve */ +&i2c14 { + status =3D "okay"; +}; + +/* MCIO 3A I2C */ +&i2c15 { + status =3D "okay"; +}; + +&kcs2 { + aspeed,lpc-io-reg =3D <0xca8>; + status =3D "okay"; +}; + +&kcs3 { + aspeed,lpc-io-reg =3D <0xca2>; + status =3D "okay"; +}; + +&mac2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ncsi3_default>; + use-ncsi; + ncsi-package =3D <1>; + status =3D "okay"; +}; + +&pinctrl { + pinctrl_ncsi3_default: ncsi3_default { + function =3D "RMII3"; + groups =3D "NCSI3"; + }; +}; + +&sgpiom0 { + ngpios =3D <128>; + bus-frequency =3D <2000000>; + gpio-line-names =3D + /*"input pin","output pin"*/ + /*bit0-bit7*/ + "PWRGD_CPU_PWROK","SGPIO_RSTBTN_OUT", + "PWRGD_CPU_PWROK_1","SGPIO_BMC_READY", + "PWRGD_CPU_PWROK_2","IBB_BMC_SRST", + "host0-ready","FM_I3C_SPD_AH_SEL_R", + "PCIe_HP_BOOT","FM_I3C_SPD_IP_SEL_R", + "PCIe_HP_DATA","FM_JTAG_BMC_MUX_S0_R", + "PCIe_HP_NIC","FM_JTAG_BMC_MUX_S1_R", + "","FM_JTAG_BMC_OE_1_R_N", + /*bit8-bit15*/ + "PWRGD_PVDDCR_CPU0_P0","FM_JTAG_BMC_OE_R_N", + "PWRGD_PVDDCR_SOC_P0","FM_REMOTEJTAG_EN_R_N", + "PWRGD_PVDDCR_CPU1_P0","FM_CPU_FORCE_SELFREFRESH_R", + "PWRGD_P3V3_STBY","FM_CPU_NMI_SYNC_FLOOD_R_N", + "PWRGD_PVDD33_S5","FM_CPU_TRIGGERTSC_OE_R_N", + "PWRGD_PVDD18_S5_P0","FM_PASSWORD_CLEAR_R_N", + "PWRGD_PVDDIO_P0","FM_BIOS_USB_RECOVERY_N", + "PWRGD_PVDDIO_MEM_S3_P0","FM_USB_MUX_OE_R_N", + /*bit16-bit23*/ + "PWRGD_P1V8_STBY","FM_USB_MUX_SEL_R", + "PWRGD_P1V0_STBY","RST_SMB_BOOT_R_N", + "PWRGD_P1V2_STBY","RST_SMB_MCIO0A_R_N", + "IBB_BMC_SRST","RST_SMB_NIC_R_N", + "PWRGD_P12V_E1S_0","FM_PPS_NIC_IN_BUF_OE_R_N", + "PWRGD_P12V_E1S_1","FM_PPS_NIC_IN_EN_R", + "RST_PCIE_BOOT_PERST_N","FM_PPS_NIC_IN_OE_R_N", + "PWRGD_P12V_NIC","FM_PPS_NIC_IN_S0_R", + /*bit24-bit31*/ + "PWRGD_P12V_SCM","FM_PPS_NIC_IN_S1_R", + "PWRGD_P12V_DIMM","FM_PPS_NIC_OUT_BUF_OE_R_N", + "PWRGD_CPU_DIMM0_AH","FM_PPS_NIC_OUT_CPU_OE_R_N", + "PWRGD_CPU_DIMM1_IP","FM_PPS_NIC_OUT_EN_R", + "PWRGD_NIC_CPLD","JTAG_CPLD_DBREQ_R_N", + "ALERT_INA230_DIMM_0_N","HDT_HDR_RESET_R_N", + "ALERT_INA230_DIMM_1_N","FM_SMB_AUTH_MUX_OE_R_N", + "ALERT_INA230_E1S_0_N","FM_SCM_LED_R_N", + /*bit32-bit39*/ + "ALERT_INA230_E1S_1_N","", + "ALERT_INA230_FAN0_N","", + "ALERT_INA230_FAN1_N","", + "ALERT_INA230_FAN2_N","", + "ALERT_INA230_FAN3_N","", + "ALERT_INA230_NIC_N","", + "ALERT_INA230_SCM_N","", + "ALERT_IRQ_PMBUS_PWR11_N","", + /*bit40-bit47*/ + "ALERT_MCIO2A_LEAK_DETECT_N","", + "ALERT_MCIO3A_LEAK_DETECT_N","", + "ALERT_MCIO4A_LEAK_DETECT_N","", + "ALERT_OC_PADDLE2_N","", + "ALERT_OC_PWR2_N","", + "ALERT_OC_PWR11_N","", + "ALERT_PADDLE2_SMB_N","", + "ALERT_PWR14_SB2_LEAK_DETECT_N","", + /*bit48-bit55*/ + "ALERT_PWR14_SB3_LEAK_DETECT_N","", + "ALERT_PWR15_SB2_LEAK_DETECT_N","", + "ALERT_PWR15_SB3_LEAK_DETECT_N","", + "ALERT_SMB_MCIO0A_N","", + "ALERT_SMB_MCIO1A_N","", + "ALERT_SMB_MCIO2A_N","", + "ALERT_SMB_MCIO2B_N","", + "ALERT_SMB_MCIO3A_N","", + /*bit56-bit63*/ + "ALERT_SMB_MCIO3B_N","", + "ALERT_SMB_MCIO4A_N","", + "ALERT_SMB_MCIO4B_N","", + "ALERT_THERMALTRIP_MCIO1A_N","", + "ALERT_THERMALTRIP_MCIO2A_N","", + "ALERT_THERMALTRIP_MCIO3A_N","", + "ALERT_THERMALTRIP_MCIO4A_N","", + "ALERT_UV_PADDLE2_N","", + /*bit64-bit71*/ + "ALERT_UV_PWR2_N","", + "ALERT_UV_PWR11_N","", + "ALERT_VR_SMB_N","", + "FAULT_FAN_0_N","", + "FAULT_FAN_1_N","", + "FAULT_FAN_2_N","", + "FAULT_FAN_3_N","", + "FAULT_P3V3_E1S_0_N","", + /*bit72-bit79*/ + "FAULT_P3V3_E1S_1_N","", + "FAULT_P3V3_NIC_N","", + "FAULT_P12V_NIC_N","", + "FAULT_P12V_SCM_N","", + "P0_I3C_APML_ALERT_L","", + "ALERT_INLET_TEMP_N","", + "FM_CPU_PROCHOT_R_N","", + "FM_CPU_THERMTRIP_N","", + /*bit80-bit87*/ + "ALERT_OUTLET_TEMP_N","", + "ALERT_RTC_N","", + "PVDDCR_CPU0_P0_OCP_N","", + "PVDDCR_CPU1_P0_OCP_N","", + "PVDDCR_SOC_P0_OCP_N","", + "MB_IOEXP_INT","", + "E1S_0_BD_IOEXP","", + "E1S_1_BD_IOEXP","", + /*bit88-bit95*/ + "PADDLE_BD_IOEXP_INT","", + "FM_BOARD_REV_ID0","", + "FM_BOARD_REV_ID1","", + "FM_BOARD_REV_ID2","", + "FM_VR_TYPE_ID0","", + "FM_VR_TYPE_ID1","", + "PRSNT_BOOT_N_IOEXP","", + "PRSNT_DATA_N_IOEXP","", + /*bit96-bit103*/ + "PRSNT_NIC_N_IOEXP","", + "PRSNT_BOOT_N_FF","", + "PRSNT_MCIO1A_N_FF","", + "NIC_PRSNT_N","", + "","", + "","", + "","", + "","", + /*bit104-bit111*/ + "","","","","","","","","","","","","","","","", + /*bit112-bit119*/ + "","","","","","","","","","","","","","","","", + /*bit120-bit127*/ + "","","","","","","","","","","","","","","",""; + status =3D "okay"; +}; + +/* BIOS Flash */ +&spi2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_spi2_default>; + status =3D "okay"; + + flash@0 { + m25p,fast-read; + label =3D "pnor"; + spi-max-frequency =3D <12000000>; + spi-tx-bus-width =3D <2>; + spi-rx-bus-width =3D <2>; + status =3D "okay"; + }; +}; + +/* Host Console */ +&uart1 { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +/* SOL */ +&uart3 { + status =3D "okay"; +}; + +&uart4 { + status =3D "okay"; +}; + +/* BMC Console */ +&uart5 { + status =3D "okay"; +}; + +&wdt1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_wdtrst1_default>; + aspeed,reset-type =3D "soc"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; + aspeed,ext-pulse-duration =3D <256>; + status =3D "okay"; +}; --=20 2.51.0