From nobody Thu Oct 2 03:36:19 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 440D42E3B0E; Tue, 23 Sep 2025 16:06:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758643608; cv=none; b=RfQbXgqD3Ae3IOhqayXYoiwEfhtWgqQZzuJnl/9+LFHiQc6WwBDK7qWyWJfyu7RV5DJMxHW32L0M8cNskvlCFfG/cucLwH/dd+uyuoJhXJt18SCs0ZnZ3bt3d5PNQkt1onjF7gkVhPgfZV+bMLtcCJWux8mCNkQkb0h39e1Hk3o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758643608; c=relaxed/simple; bh=tnTqUW1CCfg20bZn8bGpLx7RaTcWjSs1bsmxkTRlM+Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EAPbJsC2FkA4l6KsiO7ccCb8HDeDh2MLz7LtP654nRMp0631xYxYLn/GqsWeZ7lh6ob3kkDvhFXkie2yY1TyFd5GQ52tpeme0qBM0CwSuDUxu0huPqWE9sbRGiEuywdEJIMaclbEEsJOIzf9QZQv/6QLYJIbU336GMWnt5rh2A0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: vx0ukpZOTGWznyPbR2tKtw== X-CSE-MsgGUID: wAMhTSygQ4OlpfDSYicdzQ== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 24 Sep 2025 01:06:44 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.64]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 6D1ED4008A2F; Wed, 24 Sep 2025 01:06:39 +0900 (JST) From: Cosmin Tanislav To: Cc: Cosmin Tanislav , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , Lad Prabhakar , linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 7/7] arm64: defconfig: enable RZ/T2H / RZ/N2H ADC driver Date: Tue, 23 Sep 2025 19:05:21 +0300 Message-ID: <20250923160524.1096720-8-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250923160524.1096720-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20250923160524.1096720-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs include three 12-Bit successive approximation A/D converters. RZ/T2H has two ADCs with 4 channels and one with 6. RZ/N2H has two ADCs with 4 channels and one with 15. Enable the driver for them. Signed-off-by: Cosmin Tanislav --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 8fd1bf869942..3a1326652d47 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1581,6 +1581,7 @@ CONFIG_QCOM_SPMI_VADC=3Dm CONFIG_QCOM_SPMI_ADC5=3Dm CONFIG_ROCKCHIP_SARADC=3Dm CONFIG_RZG2L_ADC=3Dm +CONFIG_RZT2H_ADC=3Dm CONFIG_SOPHGO_CV1800B_ADC=3Dm CONFIG_TI_ADS1015=3Dm CONFIG_TI_AM335X_ADC=3Dm --=20 2.51.0