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Tue, 23 Sep 2025 02:41:26 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.25; Tue, 23 Sep 2025 02:41:24 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.25 via Frontend Transport; Tue, 23 Sep 2025 02:41:24 -0700 Received: from sburla-PowerEdge-T630.sclab.marvell.com (unknown [10.106.27.217]) by maili.marvell.com (Postfix) with ESMTP id 6A2393F70E3; Tue, 23 Sep 2025 02:41:25 -0700 (PDT) From: Sathesh B Edara To: , , , , , , , , , , CC: , Andrew Lunn Subject: [net-next PATCH v1 2/2 RESEND] octeon_ep_vf: Add support to retrieve hardware channel information Date: Tue, 23 Sep 2025 02:41:19 -0700 Message-ID: <20250923094120.13133-3-sedara@marvell.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20250923094120.13133-1-sedara@marvell.com> References: <20250923094120.13133-1-sedara@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: QZxOY-11mGItjt7MAg0k9eTQ5eVMOadL X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTIwMDExNCBTYWx0ZWRfXyxEsoSMuNpH+ rXr8BDWGyzu5/8mf/DX5iPCshBAPYclabbo2s++8IDZBgEQkilsGRABaFkcmBpZfRF5m/PNeROy 8h4NAoeHgDlbMg0IskTpGYkHc2ZRmsXLrgDt6v1xpW2PEKV4Ec9od8/Lk2g/8A1u8u14K31r07U LgzDHiW4lIqysiDTiQwTfLYPNuJ4iOr3QucTB7FxnnUZbK0EgleNJQLp7KGIZ2X/ksF+n65Ocsv UCByX1G0RpCWcAn4u6IjoRsFEQbhnEDPyRyA6KmqLqF0bJ2USwcOuOokb/z01Fk0I8kZMkh7I1j UkjYgPN85AZtCsEOUlr4OXR8pl069wQS8NE+LRZWuiAyQVVQmAqXWeCAeh/x6/ae+H0WQWIYP4f 0RRcqCz9 X-Authority-Analysis: v=2.4 cv=auayCTZV c=1 sm=1 tr=0 ts=68d26b46 cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=yJojWOMRYYMA:10 a=M5GUcnROAAAA:8 a=p1zdzuy5FtcdZHaGWb8A:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-ORIG-GUID: QZxOY-11mGItjt7MAg0k9eTQ5eVMOadL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-23_02,2025-09-22_05,2025-03-28_01 Content-Type: text/plain; charset="utf-8" This patch introduces support for retrieving hardware channel configuration through the ethtool interface. Signed-off-by: Sathesh B Edara Reviewed-by: Simon Horman --- .../ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c b= /drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c index d60441928ba9..2b6a8530cbaa 100644 --- a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c +++ b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c @@ -244,6 +244,17 @@ static int octep_vf_get_link_ksettings(struct net_devi= ce *netdev, return 0; } =20 +static void octep_vf_get_channels(struct net_device *dev, + struct ethtool_channels *channel) +{ + struct octep_vf_device *oct =3D netdev_priv(dev); + + channel->max_rx =3D CFG_GET_PORTS_MAX_IO_RINGS(oct->conf); + channel->max_tx =3D CFG_GET_PORTS_MAX_IO_RINGS(oct->conf); + channel->rx_count =3D CFG_GET_PORTS_ACTIVE_IO_RINGS(oct->conf); + channel->tx_count =3D CFG_GET_PORTS_ACTIVE_IO_RINGS(oct->conf); +} + static const struct ethtool_ops octep_vf_ethtool_ops =3D { .get_drvinfo =3D octep_vf_get_drvinfo, .get_link =3D ethtool_op_get_link, @@ -251,6 +262,7 @@ static const struct ethtool_ops octep_vf_ethtool_ops = =3D { .get_sset_count =3D octep_vf_get_sset_count, .get_ethtool_stats =3D octep_vf_get_ethtool_stats, .get_link_ksettings =3D octep_vf_get_link_ksettings, + .get_channels =3D octep_vf_get_channels, }; =20 void octep_vf_set_ethtool_ops(struct net_device *netdev) --=20 2.36.0