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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Sep 2025 05:13:13.2903 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3ed27ce2-9d92-43ce-9fe3-08ddfa5fe55d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7879 Content-Type: text/plain; charset="utf-8" The __virt_pg_map() helper function, used to build guest page tables, calls vm_is_gpa_protected() to determine the correct memory protection attributes for a given Guest Physical Address (GPA). This check works by looking up the GPA in the VM's defined physical memory regions. This approach fails when mapping the local APIC's base address (0xfee00000), as this is a Memory-Mapped I/O (MMIO) region, not part of the guest's RAM. Consequently, the lookup fails, and virt_pg_map() aborts with the error: "No vm physical memory at 0xfee00000". Fix this by introducing a special case for the APIC base address. When the physical address being mapped is APIC_DEFAULT_GPA, bypass the vm_is_gpa_protected() call. Since the APIC MMIO region is always treated as shared, explicitly set the shared bit in its Page Table Entry (PTE) and return immediately. This allows selftests to correctly map the APIC MMIO region, which is necessary for tests involving protected guests. Signed-off-by: Neeraj Upadhyay --- tools/testing/selftests/kvm/lib/x86/processor.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/kvm/lib/x86/processor.c b/tools/testin= g/selftests/kvm/lib/x86/processor.c index d72eb96efb7c..181f1943c4be 100644 --- a/tools/testing/selftests/kvm/lib/x86/processor.c +++ b/tools/testing/selftests/kvm/lib/x86/processor.c @@ -8,6 +8,7 @@ #include "kvm_util.h" #include "processor.h" #include "sev.h" +#include "apic.h" =20 #ifndef NUM_INTERRUPTS #define NUM_INTERRUPTS 256 @@ -227,6 +228,11 @@ void __virt_pg_map(struct kvm_vm *vm, uint64_t vaddr, = uint64_t paddr, int level) "PTE already present for 4k page at vaddr: 0x%lx", vaddr); *pte =3D PTE_PRESENT_MASK | PTE_WRITABLE_MASK | (paddr & PHYSICAL_PAGE_MA= SK); =20 + if (paddr =3D=3D APIC_DEFAULT_GPA) { + *pte |=3D vm->arch.s_bit; + return; + } + /* * Neither SEV nor TDX supports shared page tables, so only the final * leaf PTE needs manually set the C/S-bit. --=20 2.34.1