From nobody Thu Oct 2 04:45:12 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A67332274C; Tue, 23 Sep 2025 11:41:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758627674; cv=pass; b=gZeG9dUHmuv71cTizpbPJntBTU+oCLuGUI9tgOtqGOGhBYKkitk2ZsTnpTbqYNWMpZJ7Lk+qaoLKd1NqMOEmMQ9czui34+0+QL8eGjhsUWrSU981x40s6Rkdmjp1rok4ZY/v7d6YU3BL6HQMks4YyGvlT7qpa5QRPydzbYRuRBc= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758627674; c=relaxed/simple; bh=UbcJcNEfDFTnnUBurIVh4FMqr8VGmK6aS7+NNyGZ6ZA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Cof3mMLWPTaPiQw5IIqd5XChQdnU7ZmaXAf394Zj6grbiT5XGS6mV+9G8D107jqYtu1mDOtTOXMc26UrWMOhcGji6Xud2Ju4ekcJUBzF544yIDYsR8SHK0V/MCXM+6z9aseIOgIeOD0J7LA71WyqQ8DQbOgmiRnLf7j5uKLqDw4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=AD6C5rBC; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="AD6C5rBC" ARC-Seal: i=1; a=rsa-sha256; t=1758627648; cv=none; d=zohomail.com; s=zohoarc; b=KWnyYstbYsqu77K0d6sbxLmGRGRAIaUQsQqMFjBgzeyqmWN2geANGC23t15HjFjgupdKgkZzzb3b/EX5HPQlekzjQGYq7oEprZTpoNW70u2WalKmoa4u1DoNHrzPI67qItMM5zEzDv1s00NyuGvAIZqvPyZM9/L6gl/+2sareHo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1758627648; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=ZFDG+wvs2WG93zhT44NWUOfN2GowDDjPuUl1CMypSmk=; b=Lw5xSCfPH3ZqD+AR9NKK1N13JOiGO4QYs5gjfBEF1O4JZUEiXai2QhAmYbObi3VT8z1w/k0aDAngJcbzbs2FZwoOk6HTv5Qd38cyKQNRNXglSBEjypDRb8S1s+LMoLtHrYASPqbp1HlrVVQKSUAiPkpKfvCQMIay0q68bnjuZs0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1758627648; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=ZFDG+wvs2WG93zhT44NWUOfN2GowDDjPuUl1CMypSmk=; b=AD6C5rBCb111C5q6cIOOqoSnnFCKHixwxfdqLbn/jSVTfCqY0Kw4/fMqIrCzW4pP ZHO9i+ofc3uI+YR+cOfnveSw6TL47Km5Qul1R+gMxX3UDCPB/hMbOU6LMXTC9+f7i4w YffG3l4P7cvp2uEw5PsXV+KlgXqdRLC3x2ca5aBI= Received: by mx.zohomail.com with SMTPS id 1758627645320914.7659430893929; Tue, 23 Sep 2025 04:40:45 -0700 (PDT) From: Nicolas Frattaroli Date: Tue, 23 Sep 2025 13:39:57 +0200 Subject: [PATCH v4 4/8] dt-bindings: mailbox: Add MT8196 GPUEB Mailbox Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250923-mt8196-gpufreq-v4-4-6cd63ade73d6@collabora.com> References: <20250923-mt8196-gpufreq-v4-0-6cd63ade73d6@collabora.com> In-Reply-To: <20250923-mt8196-gpufreq-v4-0-6cd63ade73d6@collabora.com> To: AngeloGioacchino Del Regno , Boris Brezillon , Jassi Brar , Chia-I Wu , Chen-Yu Tsai , Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Kees Cook , "Gustavo A. R. Silva" , Ulf Hansson Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-hardening@vger.kernel.org, linux-pm@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB", acting as glue logic to control power and frequency of the Mali GPU. This MCU runs special-purpose firmware for this use, and the main application processor communicates with it through a mailbox. Add a binding that describes this mailbox. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Nicolas Frattaroli Reviewed-by: Rob Herring (Arm) --- .../mailbox/mediatek,mt8196-gpueb-mbox.yaml | 64 ++++++++++++++++++= ++++ 1 file changed, 64 insertions(+) diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpue= b-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpu= eb-mbox.yaml new file mode 100644 index 0000000000000000000000000000000000000000..ab5b780cb83a708a3897ca1a440= 131d97b56c3a6 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.= yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-gpueb-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MFlexGraphics GPUEB Mailbox Controller + +maintainers: + - Nicolas Frattaroli + +properties: + compatible: + enum: + - mediatek,mt8196-gpueb-mbox + + reg: + items: + - description: mailbox data registers + - description: mailbox control registers + + reg-names: + items: + - const: data + - const: ctl + + clocks: + items: + - description: main clock of the GPUEB MCU + + interrupts: + items: + - description: fires when a new message is received + + "#mbox-cells": + const: 1 + description: + The number of the mailbox channel. + +required: + - compatible + - reg + - reg-names + - clocks + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + #include + #include + #include + + mailbox@4b09fd80 { + compatible =3D "mediatek,mt8196-gpueb-mbox"; + reg =3D <0x4b09fd80 0x280>, + <0x4b170000 0x7c>; + reg-names =3D "data", "ctl"; + clocks =3D <&topckgen CLK_TOP_MFG_EB>; + interrupts =3D ; + #mbox-cells =3D <1>; + }; --=20 2.51.0