From nobody Thu Oct 2 06:14:57 2025 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6658B2E6CBE; Mon, 22 Sep 2025 15:27:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758554830; cv=none; b=WKfNS7yLr0p9bdbFbzkt8F/TWEYQ/dLlg+5ed2M9cpcFzNeJc19TICHR7mATvstUj9e5EJaIix2CDp8RADcG121RXfx1hmOaWAlTd2tPBy4SiibLC4uS5hTyoXZWRQlCGnz+WXiphLdLaarNfNdN1IQauFPsnXVTUaU0gmQK4N4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758554830; c=relaxed/simple; bh=mYnLnoggH5C112eT9SpykwV2oYxC50Z4VtB47FiCOz4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=us6YVLeO1X1rxN6KOF4hd/66qBxXAdIz8bKQInq0o1oj03FSGz7+MEOaS6Uy4JWF7TtSy6qx8zhf0xuv7wxwTJgx3udwVWNKd7igJxY6NGAD+COj6HzFF7hLLX+Bc7wpBYjfE8oVOeMu8UHOgyAo7fi28sbTZgpx00BJrCSKemI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=zLQ26x5M; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="zLQ26x5M" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id BB2894E40D9D; Mon, 22 Sep 2025 15:27:06 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 89EA660635; Mon, 22 Sep 2025 15:27:06 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 2B76F102F1962; Mon, 22 Sep 2025 17:27:03 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1758554825; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=LRs+ZbxoZ3cLLVekDsoFCzVnx6IirV9YTJ378KbO7+s=; b=zLQ26x5MduWAlTX0flWH2PIxQe1Gi2EjOfgZsvkahe4h0GmVUjHYG3Ai0CDD1T4zpOOX3m A8XdENZrdtSEai8xo1JyQpGimVgQuludi2xP7tqi9ISwUAveuJdb8ALj0eFjRZOOH6fjUb WbSwjSqBZW2gCIyLHaAwIOGm1dnfDaM5dkQ6eOxWfKVJv1qx9TPPmg8ejwge3gpMQlIety lSx5hJz1dN/TbS/ZB+ZQpA+AfvZvY9vWHzzrnhd6MyZEO+XhUZ/OtgPIv0CD810cvhvlWj LDdqj/mJVfMg21ziyG5TiIophLwgiCxkO4S08fIQ4Bv2NxMHwmoQ1/ok1pQPpg== From: "Herve Codina (Schneider Electric)" To: Thomas Gleixner , Wolfram Sang , Hoan Tran , Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Saravana Kannan , Serge Semin , Herve Codina Cc: Phil Edworthy , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Pascal Eberhard , Miquel Raynal , Thomas Petazzoni Subject: [PATCH v4 5/8] ARM: dts: r9a06g032: Add GPIO controllers Date: Mon, 22 Sep 2025 17:26:36 +0200 Message-ID: <20250922152640.154092-6-herve.codina@bootlin.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250922152640.154092-1-herve.codina@bootlin.com> References: <20250922152640.154092-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Add GPIO controllers (Synosys DesignWare IPs) available in the r9a06g032 (RZ/N1D) SoC. Signed-off-by: Herve Codina (Schneider Electric) Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Reviewed-by: Bartosz Golaszewski --- arch/arm/boot/dts/renesas/r9a06g032.dtsi | 121 +++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/r= enesas/r9a06g032.dtsi index 13a60656b044..da977cdd8487 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -499,6 +499,127 @@ gic: interrupt-controller@44101000 { ; }; =20 + /* + * The GPIO mapping to the corresponding pins is not obvious. + * See the hardware documentation for details. + */ + gpio0: gpio@5000b000 { + compatible =3D "snps,dw-apb-gpio"; + reg =3D <0x5000b000 0x80>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&sysctrl R9A06G032_HCLK_GPIO0>; + clock-names =3D "bus"; + status =3D "disabled"; + + /* GPIO0a[0] connected to pin GPIO0 */ + /* GPIO0a[1..2] connected to pins GPIO3..4 */ + /* GPIO0a[3..4] connected to pins GPIO9..10 */ + /* GPIO0a[5] connected to pin GPIO12 */ + /* GPIO0a[6..7] connected to pins GPIO15..16 */ + /* GPIO0a[8..9] connected to pins GPIO21..22 */ + /* GPIO0a[10] connected to pin GPIO24 */ + /* GPIO0a[11..12] connected to pins GPIO27..28 */ + /* GPIO0a[13..14] connected to pins GPIO33..34 */ + /* GPIO0a[15] connected to pin GPIO36 */ + /* GPIO0a[16..17] connected to pins GPIO39..40 */ + /* GPIO0a[18..19] connected to pins GPIO45..46 */ + /* GPIO0a[20] connected to pin GPIO48 */ + /* GPIO0a[21..22] connected to pins GPIO51..52 */ + /* GPIO0a[23..24] connected to pins GPIO57..58 */ + /* GPIO0a[25..31] connected to pins GPIO62..68 */ + gpio0a: gpio-port@0 { + compatible =3D "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells =3D <2>; + snps,nr-gpios =3D <32>; + reg =3D <0>; + }; + + /* GPIO0b[0..1] connected to pins GPIO1..2 */ + /* GPIO0b[2..5] connected to pins GPIO5..8 */ + /* GPIO0b[6] connected to pin GPIO11 */ + /* GPIO0b[7..8] connected to pins GPIO13..14 */ + /* GPIO0b[9..12] connected to pins GPIO17..20 */ + /* GPIO0b[13] connected to pin GPIO23 */ + /* GPIO0b[14..15] connected to pins GPIO25..26 */ + /* GPIO0b[16..19] connected to pins GPIO29..32 */ + /* GPIO0b[20] connected to pin GPIO35 */ + /* GPIO0b[21..22] connected to pins GPIO37..38 */ + /* GPIO0b[23..26] connected to pins GPIO41..44 */ + /* GPIO0b[27] connected to pin GPIO47 */ + /* GPIO0b[28..29] connected to pins GPIO49..50 */ + /* GPIO0b[30..31] connected to pins GPIO53..54 */ + gpio0b: gpio-port@1 { + compatible =3D "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells =3D <2>; + snps,nr-gpios =3D <32>; + reg =3D <1>; + }; + }; + + gpio1: gpio@5000c000 { + compatible =3D "snps,dw-apb-gpio"; + reg =3D <0x5000c000 0x80>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&sysctrl R9A06G032_HCLK_GPIO1>; + clock-names =3D "bus"; + status =3D "disabled"; + + /* GPIO1a[0..4] connected to pins GPIO69..73 */ + /* GPIO1a[5..31] connected to pins GPIO95..121 */ + gpio1a: gpio-port@0 { + compatible =3D "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells =3D <2>; + snps,nr-gpios =3D <32>; + reg =3D <0>; + }; + + /* GPIO1b[0..1] connected to pins GPIO55..56 */ + /* GPIO1b[2..4] connected to pins GPIO59..61 */ + /* GPIO1b[5..25] connected to pins GPIO74..94 */ + /* GPIO1b[26..31] connected to pins GPIO150..155 */ + gpio1b: gpio-port@1 { + compatible =3D "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells =3D <2>; + snps,nr-gpios =3D <32>; + reg =3D <1>; + }; + }; + + gpio2: gpio@5000d000 { + compatible =3D "snps,dw-apb-gpio"; + reg =3D <0x5000d000 0x80>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&sysctrl R9A06G032_HCLK_GPIO2>; + clock-names =3D "bus"; + status =3D "disabled"; + + /* GPIO2a[0..27] connected to pins GPIO122..149 */ + /* GPIO2a[28..31] connected to pins GPIO156..159 */ + gpio2a: gpio-port@0 { + compatible =3D "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells =3D <2>; + snps,nr-gpios =3D <32>; + reg =3D <0>; + }; + + /* GPIO2b[0..9] connected to pins GPIO160..169 */ + gpio2b: gpio-port@1 { + compatible =3D "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells =3D <2>; + snps,nr-gpios =3D <10>; + reg =3D <1>; + }; + }; + can0: can@52104000 { compatible =3D "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000"; reg =3D <0x52104000 0x800>; --=20 2.51.0