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charset="utf-8" Initialise the GSP resource manager arguments (rmargs) which provide initialisation parameters to the GSP firmware during boot. The rmargs structure contains arguments to configure the GSP message/command queue location. These are mapped for coherent DMA and added to the libos data structure for access when booting GSP. Signed-off-by: Alistair Popple --- Changes for v2: - Rebased on Alex's latest series --- drivers/gpu/nova-core/gsp.rs | 29 +++++++++++++++- drivers/gpu/nova-core/gsp/cmdq.rs | 14 ++++++-- drivers/gpu/nova-core/gsp/fw.rs | 19 +++++++++++ .../gpu/nova-core/gsp/fw/r570_144/bindings.rs | 33 +++++++++++++++++++ 4 files changed, 91 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs index 3d4028d67d2e..bb08bd537ec4 100644 --- a/drivers/gpu/nova-core/gsp.rs +++ b/drivers/gpu/nova-core/gsp.rs @@ -17,7 +17,10 @@ use crate::fb::FbLayout; use crate::gsp::cmdq::GspCmdq; =20 -use fw::LibosMemoryRegionInitArgument; +use fw::{ + LibosMemoryRegionInitArgument, GSP_ARGUMENTS_CACHED, GSP_SR_INIT_ARGUM= ENTS, + MESSAGE_QUEUE_INIT_ARGUMENTS, +}; =20 pub(crate) mod cmdq; =20 @@ -33,6 +36,7 @@ pub(crate) struct Gsp { pub logintr: CoherentAllocation, pub logrm: CoherentAllocation, pub cmdq: GspCmdq, + rmargs: CoherentAllocation, } =20 /// Creates a self-mapping page table for `obj` at its beginning. @@ -90,12 +94,35 @@ pub(crate) fn new(pdev: &pci::Device) ->= Result(dev, "RMARG= S", 1, &mut libos, 3)?; + let (shared_mem_phys_addr, cmd_queue_offset, stat_queue_offset) = =3D cmdq.get_cmdq_offsets(); + + dma_write!( + rmargs[0].messageQueueInitArguments =3D MESSAGE_QUEUE_INIT_ARG= UMENTS { + sharedMemPhysAddr: shared_mem_phys_addr, + pageTableEntryCount: cmdq.nr_ptes, + cmdQueueOffset: cmd_queue_offset, + statQueueOffset: stat_queue_offset, + ..Default::default() + } + )?; + dma_write!( + rmargs[0].srInitArguments =3D GSP_SR_INIT_ARGUMENTS { + oldLevel: 0, + flags: 0, + bInPMTransition: 0, + ..Default::default() + } + )?; + dma_write!(rmargs[0].bDmemStack =3D 1)?; =20 Ok(try_pin_init!(Self { libos, loginit, logintr, logrm, + rmargs, cmdq, })) } diff --git a/drivers/gpu/nova-core/gsp/cmdq.rs b/drivers/gpu/nova-core/gsp/= cmdq.rs index a9ba1a4c73d8..9170ccf4a064 100644 --- a/drivers/gpu/nova-core/gsp/cmdq.rs +++ b/drivers/gpu/nova-core/gsp/cmdq.rs @@ -99,7 +99,6 @@ fn new(dev: &device::Device) -> Result { Ok(Self(gsp_mem)) } =20 - #[expect(unused)] fn dma_handle(&self) -> DmaAddress { self.0.dma_handle() } @@ -218,7 +217,7 @@ pub(crate) struct GspCmdq { dev: ARef, seq: u32, gsp_mem: DmaGspMem, - pub _nr_ptes: u32, + pub nr_ptes: u32, } =20 impl GspCmdq { @@ -231,7 +230,7 @@ pub(crate) fn new(dev: &device::Device) = -> Result { dev: dev.into(), seq: 0, gsp_mem, - _nr_ptes: nr_ptes as u32, + nr_ptes: nr_ptes as u32, }) } =20 @@ -382,6 +381,15 @@ pub(crate) fn receive_msg_from_gsp( .advance_cpu_read_ptr(msg_header.rpc.length.div_ceil(GSP_PAGE_= SIZE as u32)); result } + + pub(crate) fn get_cmdq_offsets(&self) -> (u64, u64, u64) { + ( + self.gsp_mem.dma_handle(), + core::mem::offset_of!(Msgq, msgq) as u64, + (core::mem::offset_of!(GspMem, gspq) - core::mem::offset_of!(G= spMem, cpuq) + + core::mem::offset_of!(Msgq, msgq)) as u64, + ) + } } =20 fn decode_gsp_function(function: u32) -> &'static str { diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw= .rs index 2e4255301e58..06841b103328 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -158,9 +158,15 @@ pub(crate) fn new(gsp_firmware: &GspFirmware, fb_layou= t: &FbLayout) -> Self { } =20 pub(crate) use r570_144::{ + GSP_ARGUMENTS_CACHED, + // GSP firmware constants GSP_FW_WPR_META_MAGIC, GSP_FW_WPR_META_REVISION, + GSP_SR_INIT_ARGUMENTS, + + // RM message queue parameters + MESSAGE_QUEUE_INIT_ARGUMENTS, =20 // GSP events NV_VGPU_MSG_EVENT_GSP_INIT_DONE, @@ -313,3 +319,16 @@ pub(crate) fn new(sequence: u32, cmd_size: usize, func= tion: u32) -> Self { } } } + +// SAFETY: Padding is explicit and will not contain uninitialized data. +unsafe impl AsBytes for GSP_ARGUMENTS_CACHED {} + +// SAFETY: This struct only contains integer types for which all bit patte= rns +// are valid. +unsafe impl FromBytes for GSP_ARGUMENTS_CACHED {} + +// SAFETY: Padding is explicit and will not contain uninitialized data. +unsafe impl AsBytes for MESSAGE_QUEUE_INIT_ARGUMENTS {} + +// SAFETY: Padding is explicit and will not contain uninitialized data. +unsafe impl AsBytes for GSP_SR_INIT_ARGUMENTS {} diff --git a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs b/drivers/gp= u/nova-core/gsp/fw/r570_144/bindings.rs index 3d96d91e5b12..b87c4e6cb857 100644 --- a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs +++ b/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs @@ -319,6 +319,39 @@ fn fmt(&self, fmt: &mut ::core::fmt::Formatter<'_>) ->= ::core::fmt::Result { pub const NV_VGPU_MSG_EVENT_NUM_EVENTS: _bindgen_ty_3 =3D 4131; pub type _bindgen_ty_3 =3D ffi::c_uint; #[repr(C)] +#[derive(Debug, Default, Copy, Clone)] +pub struct MESSAGE_QUEUE_INIT_ARGUMENTS { + pub sharedMemPhysAddr: u64_, + pub pageTableEntryCount: u32_, + pub __bindgen_padding_0: [u8; 4usize], + pub cmdQueueOffset: u64_, + pub statQueueOffset: u64_, +} +#[repr(C)] +#[derive(Debug, Default, Copy, Clone)] +pub struct GSP_SR_INIT_ARGUMENTS { + pub oldLevel: u32_, + pub flags: u32_, + pub bInPMTransition: u8_, + pub __bindgen_padding_0: [u8; 3usize], +} +#[repr(C)] +#[derive(Debug, Default, Copy, Clone)] +pub struct GSP_ARGUMENTS_CACHED { + pub messageQueueInitArguments: MESSAGE_QUEUE_INIT_ARGUMENTS, + pub srInitArguments: GSP_SR_INIT_ARGUMENTS, + pub gpuInstance: u32_, + pub bDmemStack: u8_, + pub __bindgen_padding_0: [u8; 7usize], + pub profilerArgs: GSP_ARGUMENTS_CACHED__bindgen_ty_1, +} +#[repr(C)] +#[derive(Debug, Default, Copy, Clone)] +pub struct GSP_ARGUMENTS_CACHED__bindgen_ty_1 { + pub pa: u64_, + pub size: u64_, +} +#[repr(C)] #[derive(Copy, Clone)] pub union rpc_message_rpc_union_field_v03_00 { pub spare: u32_, --=20 2.50.1