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charset="utf-8" The GSP requires several areas of memory to operate. Each of these have their own simple embedded page tables. Set these up and map them for DMA to/from GSP using CoherentAllocation's. Return the DMA handle describing where each of these regions are for future use when booting GSP. Signed-off-by: Alistair Popple --- Changes for v2: - Renamed GspMemOjbects to Gsp as that is what they are - Rebased on Alex's latest series --- drivers/gpu/nova-core/gpu.rs | 2 +- drivers/gpu/nova-core/gsp.rs | 80 +++++++++++++++++-- drivers/gpu/nova-core/gsp/fw.rs | 39 +++++++++ .../gpu/nova-core/gsp/fw/r570_144/bindings.rs | 19 +++++ 4 files changed, 131 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 5da9ad726483..c939b3868271 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -221,7 +221,7 @@ pub(crate) fn new<'a>( =20 sec2_falcon: Falcon::new(pdev.as_ref(), spec.chipset, bar, tru= e)?, =20 - gsp <- Gsp::new(), + gsp <- Gsp::new(pdev)?, =20 _: { gsp.boot(pdev, bar, spec.chipset, gsp_falcon, sec2_falcon= )? }, =20 diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs index 503ce8ee0420..0185f66971ff 100644 --- a/drivers/gpu/nova-core/gsp.rs +++ b/drivers/gpu/nova-core/gsp.rs @@ -1,27 +1,91 @@ // SPDX-License-Identifier: GPL-2.0 =20 mod boot; - -use kernel::prelude::*; - mod fw; =20 pub(crate) use fw::{GspFwWprMeta, LibosParams}; =20 +use kernel::device; +use kernel::dma::CoherentAllocation; +use kernel::dma_write; +use kernel::pci; +use kernel::prelude::*; use kernel::ptr::Alignment; +use kernel::transmute::{AsBytes, FromBytes}; + +use fw::LibosMemoryRegionInitArgument; =20 pub(crate) const GSP_PAGE_SHIFT: usize =3D 12; pub(crate) const GSP_PAGE_SIZE: usize =3D 1 << GSP_PAGE_SHIFT; pub(crate) const GSP_HEAP_ALIGNMENT: Alignment =3D Alignment::new::<{ 1 <<= 20 }>(); =20 /// GSP runtime data. -/// -/// This is an empty pinned placeholder for now. #[pin_data] -pub(crate) struct Gsp {} +pub(crate) struct Gsp { + libos: CoherentAllocation, + pub loginit: CoherentAllocation, + pub logintr: CoherentAllocation, + pub logrm: CoherentAllocation, +} + +/// Creates a self-mapping page table for `obj` at its beginning. +fn create_pte_array(obj: &mut CoherentAllocation) { + let num_pages =3D obj.size().div_ceil(GSP_PAGE_SIZE); + let handle =3D obj.dma_handle(); + + // SAFETY: + // - By the invariants of the CoherentAllocation ptr is non-NULL. + // - CoherentAllocation CPU addresses are always aligned to a + // page-boundary, satisfying the alignment requirements for + // from_raw_parts_mut() + // - The allocation size is at least as long as 8 * num_pages as + // GSP_PAGE_SIZE is larger than 8 bytes. + let ptes =3D unsafe { + let ptr =3D obj.start_ptr_mut().cast::().add(1); + core::slice::from_raw_parts_mut(ptr, num_pages) + }; + + for (i, pte) in ptes.iter_mut().enumerate() { + *pte =3D handle + ((i as u64) << GSP_PAGE_SHIFT); + } +} + +/// Creates a new `CoherentAllocation` with `name` of `size` elements, = and +/// register it into the `libos` object at argument position `libos_arg_nr= `. +fn create_coherent_dma_object( + dev: &device::Device, + name: &'static str, + size: usize, + libos: &mut CoherentAllocation, + libos_arg_nr: usize, +) -> Result> { + let obj =3D CoherentAllocation::::alloc_coherent(dev, size, GFP_KER= NEL | __GFP_ZERO)?; + + dma_write!(libos[libos_arg_nr] =3D LibosMemoryRegionInitArgument::new(= name, &obj))?; + + Ok(obj) +} =20 impl Gsp { - pub(crate) fn new() -> impl PinInit { - pin_init!(Self {}) + pub(crate) fn new(pdev: &pci::Device) -> Result> { + let dev =3D pdev.as_ref(); + let mut libos =3D CoherentAllocation::::alloc_coherent( + dev, + GSP_PAGE_SIZE / size_of::(), + GFP_KERNEL | __GFP_ZERO, + )?; + let mut loginit =3D create_coherent_dma_object::(dev, "LOGINIT= ", 0x10000, &mut libos, 0)?; + create_pte_array(&mut loginit); + let mut logintr =3D create_coherent_dma_object::(dev, "LOGINTR= ", 0x10000, &mut libos, 1)?; + create_pte_array(&mut logintr); + let mut logrm =3D create_coherent_dma_object::(dev, "LOGRM", 0= x10000, &mut libos, 2)?; + create_pte_array(&mut logrm); + + Ok(try_pin_init!(Self { + libos, + loginit, + logintr, + logrm, + })) } } diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw= .rs index 181baa401770..dd1e7fc85d85 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -7,8 +7,10 @@ =20 use core::ops::Range; =20 +use kernel::dma::CoherentAllocation; use kernel::ptr::Alignable; use kernel::sizes::SZ_1M; +use kernel::transmute::{AsBytes, FromBytes}; =20 use crate::gpu::Chipset; use crate::gsp; @@ -99,3 +101,40 @@ pub(crate) fn wpr_heap_size(&self, chipset: Chipset, fb= _size: u64) -> u64 { /// addresses of the GSP bootloader and firmware. #[repr(transparent)] pub(crate) struct GspFwWprMeta(bindings::GspFwWprMeta); + +#[repr(transparent)] +pub(crate) struct LibosMemoryRegionInitArgument(bindings::LibosMemoryRegio= nInitArgument); + +// SAFETY: Padding is explicit and will not contain uninitialized data. +unsafe impl AsBytes for LibosMemoryRegionInitArgument {} + +// SAFETY: This struct only contains integer types for which all bit patte= rns +// are valid. +unsafe impl FromBytes for LibosMemoryRegionInitArgument {} + +impl LibosMemoryRegionInitArgument { + pub(crate) fn new( + name: &'static str, + obj: &CoherentAllocation, + ) -> Self { + /// Generates the `ID8` identifier required for some GSP objects. + fn id8(name: &str) -> u64 { + let mut bytes =3D [0u8; core::mem::size_of::()]; + + for (c, b) in name.bytes().rev().zip(&mut bytes) { + *b =3D c; + } + + u64::from_ne_bytes(bytes) + } + + Self(bindings::LibosMemoryRegionInitArgument { + id8: id8(name), + pa: obj.dma_handle(), + size: obj.size() as u64, + kind: bindings::LibosMemoryRegionKind_LIBOS_MEMORY_REGION_CONT= IGUOUS as u8, + loc: bindings::LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_SY= SMEM as u8, + ..Default::default() + }) + } +} diff --git a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs b/drivers/gp= u/nova-core/gsp/fw/r570_144/bindings.rs index 0407000cca22..6a14cc324391 100644 --- a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs +++ b/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs @@ -124,3 +124,22 @@ fn default() -> Self { } } } +pub type LibosAddress =3D u64_; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_NONE: LibosMemoryRegio= nKind =3D 0; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_CONTIGUOUS: LibosMemor= yRegionKind =3D 1; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_RADIX3: LibosMemoryReg= ionKind =3D 2; +pub type LibosMemoryRegionKind =3D ffi::c_uint; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_NONE: LibosMemoryRe= gionLoc =3D 0; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_SYSMEM: LibosMemory= RegionLoc =3D 1; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_FB: LibosMemoryRegi= onLoc =3D 2; +pub type LibosMemoryRegionLoc =3D ffi::c_uint; +#[repr(C)] +#[derive(Debug, Default, Copy, Clone)] +pub struct LibosMemoryRegionInitArgument { + pub id8: LibosAddress, + pub pa: LibosAddress, + pub size: LibosAddress, + pub kind: u8_, + pub loc: u8_, + pub __bindgen_padding_0: [u8; 6usize], +} --=20 2.50.1