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([82.78.167.153]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3ee07412111sm18518616f8f.28.2025.09.22.00.41.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Sep 2025 00:41:04 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, magnus.damm@gmail.com, john.madieu.xa@bp.renesas.com Cc: claudiu.beznea@tuxon.dev, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea Subject: [PATCH] soc: renesas: rz-sysc: Populate readable_reg/writeable_reg in regmap config Date: Mon, 22 Sep 2025 10:41:01 +0300 Message-ID: <20250922074101.2067014-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Not all system controller registers are accessible from Linux. Accessing such registers generates synchronous external abort. Populate the readable_reg and writeable_reg members of the regmap config to inform the regmap core which registers can be accessed. The list will need to be updated whenever new system controller functionality is exported through regmap. Fixes: 2da2740fb9c8 ("soc: renesas: rz-sysc: Add syscon/regmap support") Signed-off-by: Claudiu Beznea --- drivers/soc/renesas/r9a08g045-sysc.c | 17 +++++++++++++++++ drivers/soc/renesas/r9a09g047-sys.c | 21 +++++++++++++++++++++ drivers/soc/renesas/r9a09g056-sys.c | 7 +++++++ drivers/soc/renesas/r9a09g057-sys.c | 7 +++++++ drivers/soc/renesas/rz-sysc.c | 2 ++ drivers/soc/renesas/rz-sysc.h | 4 ++++ 6 files changed, 58 insertions(+) diff --git a/drivers/soc/renesas/r9a08g045-sysc.c b/drivers/soc/renesas/r9a= 08g045-sysc.c index 0504d4e68761..e4455ac37511 100644 --- a/drivers/soc/renesas/r9a08g045-sysc.c +++ b/drivers/soc/renesas/r9a08g045-sysc.c @@ -6,10 +6,14 @@ */ =20 #include +#include #include =20 #include "rz-sysc.h" =20 +#define SYS_USB_PWRRDY 0xd70 +#define SYS_PCIE_RST_RSM_B 0xd74 + static const struct rz_sysc_soc_id_init_data rzg3s_sysc_soc_id_init_data _= _initconst =3D { .family =3D "RZ/G3S", .id =3D 0x85e0447, @@ -18,7 +22,20 @@ static const struct rz_sysc_soc_id_init_data rzg3s_sysc_= soc_id_init_data __initc .specific_id_mask =3D GENMASK(27, 0), }; =20 +static bool rzg3s_regmap_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case SYS_USB_PWRRDY: + case SYS_PCIE_RST_RSM_B: + return true; + default: + return false; + } +} + const struct rz_sysc_init_data rzg3s_sysc_init_data __initconst =3D { .soc_id_init_data =3D &rzg3s_sysc_soc_id_init_data, + .readable_reg =3D rzg3s_regmap_readable_reg, + .writeable_reg =3D rzg3s_regmap_readable_reg, .max_register =3D 0xe20, }; diff --git a/drivers/soc/renesas/r9a09g047-sys.c b/drivers/soc/renesas/r9a0= 9g047-sys.c index 2e8426c03050..4200253638f8 100644 --- a/drivers/soc/renesas/r9a09g047-sys.c +++ b/drivers/soc/renesas/r9a09g047-sys.c @@ -29,6 +29,9 @@ #define SYS_LSI_PRR_CA55_DIS BIT(8) #define SYS_LSI_PRR_NPU_DIS BIT(1) =20 +#define SYS_LSI_OTPTSU1TRMVAL0 0x330 +#define SYS_LSI_OTPTSU1TRMVAL1 0x334 + static void rzg3e_sys_print_id(struct device *dev, void __iomem *sysc_base, struct soc_device_attribute *soc_dev_attr) @@ -62,7 +65,25 @@ static const struct rz_sysc_soc_id_init_data rzg3e_sys_s= oc_id_init_data __initco .print_id =3D rzg3e_sys_print_id, }; =20 +static bool rzg3e_regmap_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case SYS_LSI_OTPTSU1TRMVAL0: + case SYS_LSI_OTPTSU1TRMVAL1: + return true; + default: + return false; + } +} + +static bool rzg3e_regmap_writeable_reg(struct device *dev, unsigned int re= g) +{ + return false; +} + const struct rz_sysc_init_data rzg3e_sys_init_data =3D { .soc_id_init_data =3D &rzg3e_sys_soc_id_init_data, + .readable_reg =3D rzg3e_regmap_readable_reg, + .writeable_reg =3D rzg3e_regmap_writeable_reg, .max_register =3D 0x170c, }; diff --git a/drivers/soc/renesas/r9a09g056-sys.c b/drivers/soc/renesas/r9a0= 9g056-sys.c index 3ad1422eba36..5ebe53042524 100644 --- a/drivers/soc/renesas/r9a09g056-sys.c +++ b/drivers/soc/renesas/r9a09g056-sys.c @@ -70,6 +70,13 @@ static const struct rz_sysc_soc_id_init_data rzv2n_sys_s= oc_id_init_data __initco .print_id =3D rzv2n_sys_print_id, }; =20 +static bool rzv2n_regmap_readable_reg(struct device *dev, unsigned int reg) +{ + return false; +} + const struct rz_sysc_init_data rzv2n_sys_init_data =3D { .soc_id_init_data =3D &rzv2n_sys_soc_id_init_data, + .readable_reg =3D rzv2n_regmap_readable_reg, + .writeable_reg =3D rzv2n_regmap_readable_reg, }; diff --git a/drivers/soc/renesas/r9a09g057-sys.c b/drivers/soc/renesas/r9a0= 9g057-sys.c index e3390e7c7fe5..8336b8466bbf 100644 --- a/drivers/soc/renesas/r9a09g057-sys.c +++ b/drivers/soc/renesas/r9a09g057-sys.c @@ -62,7 +62,14 @@ static const struct rz_sysc_soc_id_init_data rzv2h_sys_s= oc_id_init_data __initco .print_id =3D rzv2h_sys_print_id, }; =20 +static bool rzv2h_regmap_readable_reg(struct device *dev, unsigned int reg) +{ + return false; +} + const struct rz_sysc_init_data rzv2h_sys_init_data =3D { .soc_id_init_data =3D &rzv2h_sys_soc_id_init_data, + .readable_reg =3D rzv2h_regmap_readable_reg, + .writeable_reg =3D rzv2h_regmap_readable_reg, .max_register =3D 0x170c, }; diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c index 9f79e299e6f4..19c1e666279b 100644 --- a/drivers/soc/renesas/rz-sysc.c +++ b/drivers/soc/renesas/rz-sysc.c @@ -140,6 +140,8 @@ static int rz_sysc_probe(struct platform_device *pdev) regmap_cfg->val_bits =3D 32; regmap_cfg->fast_io =3D true; regmap_cfg->max_register =3D data->max_register; + regmap_cfg->readable_reg =3D data->readable_reg; + regmap_cfg->writeable_reg =3D data->writeable_reg; =20 regmap =3D devm_regmap_init_mmio(dev, sysc->base, regmap_cfg); if (IS_ERR(regmap)) diff --git a/drivers/soc/renesas/rz-sysc.h b/drivers/soc/renesas/rz-sysc.h index 8eec355d5d56..88929bf21cb1 100644 --- a/drivers/soc/renesas/rz-sysc.h +++ b/drivers/soc/renesas/rz-sysc.h @@ -34,10 +34,14 @@ struct rz_sysc_soc_id_init_data { /** * struct rz_sysc_init_data - RZ SYSC initialization data * @soc_id_init_data: RZ SYSC SoC ID initialization data + * @writeable_reg: Regmap writeable register check function + * @readable_reg: Regmap readable register check function * @max_register: Maximum SYSC register offset to be used by the regmap co= nfig */ struct rz_sysc_init_data { const struct rz_sysc_soc_id_init_data *soc_id_init_data; + bool (*writeable_reg)(struct device *dev, unsigned int reg); + bool (*readable_reg)(struct device *dev, unsigned int reg); u32 max_register; }; =20 --=20 2.43.0