From nobody Thu Oct 2 07:48:34 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0211A315778 for ; Fri, 19 Sep 2025 14:58:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758293926; cv=none; b=sfUfCCboYcNgobbwFEaQVVVtsNoXROl6RvgYoPku/nv5Tgy+AxqS1eadMQWcXa/81bxjJEZe7yPb+jlI1txIfSH2ueNXn7BRaZgoX+kX9hCn+zCDz+mg6561lwZ6Y7cYgo5nfVbGCWmj1qHw9meklHcfQgzeNTkyACFQPfAf2JQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758293926; c=relaxed/simple; bh=DH4+IZWtkZYdUr21AfBmq1PBRAh0GDIARyie0QU7y7k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=afC9s52fP4eEl2pvCuKvLRsMWmpxc5dCVpYMhKA/YLeax/06XCFWfy55FMhPvhB0KLGprNPwpMdMrZ9fKiSnSdqhq4UeX9efZ+4/umanMBbnxZ8XB80EblddBzoTl56EJsewiYyMd4SuKvZPZtlh/yY22t8dmhU8ADwUm736GPY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1A24F1BA8; Fri, 19 Sep 2025 07:58:36 -0700 (PDT) Received: from e125769.cambridge.arm.com (e125769.cambridge.arm.com [10.1.196.27]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 58A593F673; Fri, 19 Sep 2025 07:58:43 -0700 (PDT) From: Ryan Roberts To: Catalin Marinas , Will Deacon , Mark Rutland , James Morse Cc: Ryan Roberts , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/3] arm64: errata: Apply workarounds for Neoverse-V3AE Date: Fri, 19 Sep 2025 15:58:29 +0100 Message-ID: <20250919145832.4035534-3-ryan.roberts@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250919145832.4035534-1-ryan.roberts@arm.com> References: <20250919145832.4035534-1-ryan.roberts@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mark Rutland Neoverse-V3AE is also affected by erratum #3312417, as described in its Software Developer Errata Notice (SDEN) document: Neoverse V3AE (MP172) SDEN v9.0, erratum 3312417 https://developer.arm.com/documentation/SDEN-2615521/9-0/ Enable the workaround for Neoverse-V3AE, and document this. Signed-off-by: Mark Rutland Cc: James Morse Cc: Will Deacon Cc: Catalin Marinas Signed-off-by: Ryan Roberts --- Documentation/arch/arm64/silicon-errata.rst | 2 ++ arch/arm64/Kconfig | 1 + arch/arm64/kernel/cpu_errata.c | 1 + 3 files changed, 4 insertions(+) diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/ar= ch/arm64/silicon-errata.rst index b18ef4064bc0..a7ec57060f64 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -200,6 +200,8 @@ stable kernels. +----------------+-----------------+-----------------+--------------------= ---------+ | ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_31943= 86 | +----------------+-----------------+-----------------+--------------------= ---------+ +| ARM | Neoverse-V3AE | #3312417 | ARM64_ERRATUM_31943= 86 | ++----------------+-----------------+-----------------+--------------------= ---------+ | ARM | MMU-500 | #841119,826419 | ARM_SMMU_MMU_500_CP= RE_ERRATA| | | | #562869,1047329 | = | +----------------+-----------------+-----------------+--------------------= ---------+ diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index e9bbfacc35a6..93f391e67af1 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1138,6 +1138,7 @@ config ARM64_ERRATUM_3194386 * ARM Neoverse-V1 erratum 3324341 * ARM Neoverse V2 erratum 3324336 * ARM Neoverse-V3 erratum 3312417 + * ARM Neoverse-V3AE erratum 3312417 =20 On affected cores "MSR SSBS, #0" instructions may not affect subsequent speculative instructions, which may permit unexepected diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 59d723c9ab8f..21f86c160aab 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -545,6 +545,7 @@ static const struct midr_range erratum_spec_ssbs_list[]= =3D { MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE), {} }; #endif --=20 2.43.0