From nobody Thu Oct 2 07:45:17 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B6D72FDC29; Fri, 19 Sep 2025 08:11:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758269516; cv=none; b=pi7hJXWYQSwPnrg5BFxTuzYxON9zDLdO1ko26/H6KUxTt1IH/M4LORbT22mRmZzeizHcZuG7nEiqZfOfUhMM8rK1bcbON3EUsYZfgYdMkKRWVxce2XjkrbJoepMeOtWgPxsB8/Dx4iDG5Kf9D9wnKcNQBNJh0V1PDBjaGl56/jc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758269516; c=relaxed/simple; bh=vWrv2Mk1ndaCwauiNmaEEmNrH+LvYmssxR8rvvHobUg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Sa5t8C8aQG7/Sy0ip63Ep5y3aeWvZwJGLZId3xoemMUYmCm7E7eSAawJ2FUw7WIUIXwKK2Q8z8gq9kDjOIG1U+m4GjwTBAEWhSt6ZimjfqhKNRXvwTrYFFXlRENQ/OaRyS1g0szF8/Etn7oDUa7mu3opkN28wa5iOzZHjGgstqk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=K693mzBx; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="K693mzBx" X-UUID: 488350f4953011f0b33aeb1e7f16c2b6-20250919 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=z5nhs8f76uTLi4ENhABCQq8DqpMRjQ9Nqtk3enz1yAM=; b=K693mzBxNVkusFKflbhHe/FPjwK55cghgxviwMNGK2cmWbR2abnxmURfpXP4w6yrdu96kKSxBSoA5vOQbQN8UGlENtSoqqO0v55aOTRa3hjVQiVRVmkz0X5v9vUtZ4bMUf/IOufiC0xUIw7TnJlsDQxLI3chJO+x8VuUTpKBxlY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.4,REQID:0b7e0d97-e1c3-4888-84e4-958b404b8b61,IP:0,UR L:0,TC:0,Content:44,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:44 X-CID-META: VersionHash:1ca6b93,CLOUDID:d6b179f8-ebfe-43c9-88c9-80cb93f22ca4,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 3|15|50,EDM:-3,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0, OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 488350f4953011f0b33aeb1e7f16c2b6-20250919 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 172850925; Fri, 19 Sep 2025 16:11:45 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Fri, 19 Sep 2025 16:11:44 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Fri, 19 Sep 2025 16:11:13 +0800 From: Zhengnan Chen To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , zhengnan.chen Subject: [PATCH 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 Date: Fri, 19 Sep 2025 16:09:55 +0800 Message-ID: <20250919081014.14100-2-zhengnan.chen@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250919081014.14100-1-zhengnan.chen@mediatek.com> References: <20250919081014.14100-1-zhengnan.chen@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "zhengnan.chen" Add binding description for mt8189. Signed-off-by: Zhengnan Chen Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/memory-controllers/mediatek,smi-common.yaml | 2 ++ .../bindings/memory-controllers/mediatek,smi-larb.yaml | 3 +++ 2 files changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,= smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/medi= atek,smi-common.yaml index 0762e0ff66ef..aac8368b210c 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-com= mon.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-com= mon.yaml @@ -40,6 +40,8 @@ properties: - mediatek,mt8186-smi-common - mediatek,mt8188-smi-common-vdo - mediatek,mt8188-smi-common-vpp + - mediatek,mt8189-smi-common + - mediatek,mt8189-smi-sub-common - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,= smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediat= ek,smi-larb.yaml index 2e7fac4b5094..9a5dafd7c07e 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-lar= b.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-lar= b.yaml @@ -27,6 +27,7 @@ properties: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb =20 @@ -85,6 +86,7 @@ allOf: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8195-smi-larb =20 then: @@ -119,6 +121,7 @@ allOf: - mediatek,mt6779-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb =20 --=20 2.46.0 From nobody Thu Oct 2 07:45:17 2025 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6ED712FDC50; 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charset="utf-8" From: "zhengnan.chen" Add the necessary platform data and ostdl setting to enable support for mt8189 smi. Signed-off-by: Zhengnan Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/memory/mtk-smi.c | 44 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index 733e22f695ab..80af9c214c83 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -401,6 +401,30 @@ static const u8 mtk_smi_larb_mt8188_ostd[][SMI_LARB_PO= RT_NR_MAX] =3D { [25] =3D {0x01}, }; =20 +static const u8 mtk_smi_larb_mt8189_ostd[][SMI_LARB_PORT_NR_MAX] =3D { + [0] =3D {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,}, + [1] =3D {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,}, + [2] =3D {0x7, 0x7, 0x4, 0x4, 0x0, 0x0, 0x2, 0x2, 0x7, 0x7, 0x0,}, + [4] =3D {0x2F, 0x1E, 0x9, 0x1, 0x1, 0x1, 0x1, 0x2, 0x2, 0x5, 0x1, 0x17,}, + [7] =3D {0x20, 0x2, 0x1, 0x1, 0x1, 0x4, 0x2, 0x1, 0x1, 0x2, 0x3, 0x2, + 0xA, 0xF, 0x4, 0x6, 0x5, 0x1,}, + [9] =3D {0x6, 0x3, 0xC, 0x6, 0x1, 0x4, 0x3, 0x1, 0x2, 0x4, 0x5, 0x2, + 0x4, 0x2, 0x3, 0xB, 0x1, 0x4, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, + 0x1, 0x1,}, + [11] =3D {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, + 0x1, 0x1, 0x1, 0xB, 0x1, 0x4, 0x6, 0x5, 0x6, 0x1, 0x5, 0x2, + 0x9, 0x5,}, + [13] =3D {0x2, 0x8, 0x8, 0x8, 0x4, 0x4, 0x4, 0x4, 0x4, 0xE, 0x4, 0x1, + 0x6, 0x6, 0x2,}, + [14] =3D {0x1, 0x1, 0x1, 0x20, 0xE, 0x4, 0x8, 0x8, 0x6, 0x4,}, + [16] =3D {0x1E, 0xC, 0x2, 0x8, 0xE, 0x2, 0x1E, 0x10, 0x4, 0x2, 0x2, 0x2, + 0x2, 0x2, 0x4, 0x2, 0x4,}, + [17] =3D {0x1E, 0xC, 0x2, 0x8, 0xE, 0x2, 0x1E, 0x10, 0x4, 0x2, 0x2, 0x2, + 0x2, 0x2, 0x4, 0x2, 0x4,}, + [19] =3D {0x2, 0x1, 0x3, 0x1,}, + [20] =3D {0x7, 0x7, 0x3, 0x3, 0x1, 0x1,}, +}; + static const u8 mtk_smi_larb_mt8192_ostd[][SMI_LARB_PORT_NR_MAX] =3D { [0] =3D {0x2, 0x2, 0x28, 0xa, 0xc, 0x28,}, [1] =3D {0x2, 0x2, 0x18, 0x18, 0x18, 0xa, 0xc, 0x28,}, @@ -533,6 +557,13 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt81= 88 =3D { .ostd =3D mtk_smi_larb_mt8188_ostd, }; =20 +static const struct mtk_smi_larb_gen mtk_smi_larb_mt8189 =3D { + .config_port =3D mtk_smi_larb_config_port_gen2_general, + .flags_general =3D MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW= _FLAG | + MTK_SMI_FLAG_SLEEP_CTL | MTK_SMI_FLAG_CFG_PORT_SEC_CTL, + .ostd =3D mtk_smi_larb_mt8189_ostd, +}; + static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 =3D { .config_port =3D mtk_smi_larb_config_port_gen2_general, .ostd =3D mtk_smi_larb_mt8192_ostd, @@ -556,6 +587,7 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = =3D { {.compatible =3D "mediatek,mt8183-smi-larb", .data =3D &mtk_smi_larb_mt81= 83}, {.compatible =3D "mediatek,mt8186-smi-larb", .data =3D &mtk_smi_larb_mt81= 86}, {.compatible =3D "mediatek,mt8188-smi-larb", .data =3D &mtk_smi_larb_mt81= 88}, + {.compatible =3D "mediatek,mt8189-smi-larb", .data =3D &mtk_smi_larb_mt81= 89}, {.compatible =3D "mediatek,mt8192-smi-larb", .data =3D &mtk_smi_larb_mt81= 92}, {.compatible =3D "mediatek,mt8195-smi-larb", .data =3D &mtk_smi_larb_mt81= 95}, {} @@ -803,6 +835,16 @@ static const struct mtk_smi_common_plat mtk_smi_common= _mt8188_vpp =3D { .init =3D mtk_smi_common_mt8195_init, }; =20 +static const struct mtk_smi_common_plat mtk_smi_common_mt8189 =3D { + .type =3D MTK_SMI_GEN2, + .bus_sel =3D F_MMU1_LARB(1) | F_MMU1_LARB(3) | F_MMU1_LARB(5) | + F_MMU1_LARB(7), +}; + +static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8189 =3D { + .type =3D MTK_SMI_GEN2_SUB_COMM, +}; + static const struct mtk_smi_common_plat mtk_smi_common_mt8192 =3D { .type =3D MTK_SMI_GEN2, .has_gals =3D true, @@ -847,6 +889,8 @@ static const struct of_device_id mtk_smi_common_of_ids[= ] =3D { {.compatible =3D "mediatek,mt8186-smi-common", .data =3D &mtk_smi_common_= mt8186}, {.compatible =3D "mediatek,mt8188-smi-common-vdo", .data =3D &mtk_smi_com= mon_mt8188_vdo}, {.compatible =3D "mediatek,mt8188-smi-common-vpp", .data =3D &mtk_smi_com= mon_mt8188_vpp}, + {.compatible =3D "mediatek,mt8189-smi-common", .data =3D &mtk_smi_common_= mt8189}, + {.compatible =3D "mediatek,mt8189-smi-sub-common", .data =3D &mtk_smi_sub= _common_mt8189}, {.compatible =3D "mediatek,mt8192-smi-common", .data =3D &mtk_smi_common_= mt8192}, {.compatible =3D "mediatek,mt8195-smi-common-vdo", .data =3D &mtk_smi_com= mon_mt8195_vdo}, {.compatible =3D "mediatek,mt8195-smi-common-vpp", .data =3D &mtk_smi_com= mon_mt8195_vpp}, --=20 2.46.0