From nobody Thu Oct 2 09:19:23 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F35B434BA2B; Fri, 19 Sep 2025 03:29:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758252552; cv=none; b=tUMhbJsqVY/C7Wlvm7U9sf8SwRqV59endjXl7SDhcPU8iUOpgPz+8gCgnAkZhblkors3QxAGBviFofcgDdnwxyLKSbW7yn2Q0B6W1vIJuNezLArGlb3jjk06tXi6esnGsTBLJNUPanS/Xj5AYHdakxipaJU0rXQP9cY+j2mW5rg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758252552; c=relaxed/simple; bh=r+lVFl+zt5xjsP1mles2n4YcfqCggobh7qFD02zMbsg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=azK2ZS0qaTrW3uu7zjKH/ITZjI2DVD9/CVi2ybJE0xRLDkUHPUYTQIj1kkma8wwrX7xmqjYdOO2EMm4RSfaRJpjunm9cEEMKoSZhWQw3/FfLPMYSkjDbsK6mnzusTvuC0jF4T9Ir4eadgNrjRgPuQZtnbTJ+NBPPURPYJzHkHrk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=eIM4olwx; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="eIM4olwx" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58J3T0JL152846; Thu, 18 Sep 2025 22:29:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1758252540; bh=NAwZxA7ShIucjPIntFm/sAYS7vKdodJcebhD2+JuHEk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eIM4olwxiAhDJAU+4jekd62Smb4AQO0w8wVorVpTBebJl9Izm60P1WrK8/9uLLkRE tsOsFzkaabd3hS28YvQpW+XkVGwrcC1M1TR2+fvY5Jr8uWL0/Eu7BMQ9XYIRJwzRr6 bMMVMWMfPIFP2AdIICqdp66n+xffGA6zIWCc+vNo= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58J3T07c2591203 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Thu, 18 Sep 2025 22:29:00 -0500 Received: from DLEE201.ent.ti.com (157.170.170.76) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Thu, 18 Sep 2025 22:28:59 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE201.ent.ti.com (157.170.170.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Thu, 18 Sep 2025 22:28:59 -0500 Received: from localhost (ula0502350.dhcp.ti.com [172.24.233.249]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58J3SwIh1901076; Thu, 18 Sep 2025 22:28:59 -0500 From: Paresh Bhagat To: , , CC: , , , , , , , , , , , Subject: [PATCH 1/2] arm64: dts: ti: k3-am62d2-evm: Fix PMIC padconfig Date: Fri, 19 Sep 2025 08:58:05 +0530 Message-ID: <20250919032806.707926-2-p-bhagat@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250919032806.707926-1-p-bhagat@ti.com> References: <20250919032806.707926-1-p-bhagat@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Fix the PMIC padconfig for AM62D. PMIC's INT pin is connected to the SoC's EXTINTn input. Reference Docs Datasheet - https://www.ti.com/lit/ug/sprujd4/sprujd4.pdf Schematics - https://www.ti.com/lit/zip/sprcal5 Fixes: 1544bca2f188e ("arm64: dts: ti: Add support for AM62D2-EVM") Signed-off-by: Paresh Bhagat --- arch/arm64/boot/dts/ti/k3-am62d2-evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts b/arch/arm64/boot/dts= /ti/k3-am62d2-evm.dts index d202484eec3f..9a74df221f2a 100644 --- a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts @@ -201,7 +201,7 @@ &mcu_pmx0 { =20 pmic_irq_pins_default: pmic-irq-default-pins { pinctrl-single,pins =3D < - AM62DX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ + AM62DX_IOPAD(0x01f4, PIN_INPUT, 7) /* (F17) EXTINTn.GPIO1_31 */ >; }; =20 --=20 2.34.1