From nobody Thu Oct 2 10:55:50 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97A3530CB4D; Thu, 18 Sep 2025 15:09:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758208154; cv=none; b=AbQ6A5rXTOYnA7CNdqr+tpTl0MEbeYlBslkW1q/qe5y+23d8YDu5JT6Xn/U1PJV411g+P4bSXhaBAB42DZf2JXgMvbLVAb6tMCY7JgvelTypgeLsXMi70o+GxwY/ADZZT4gTiyuJi4cNPVXj9s4Vo+dflgELQFpC3Y+eus4aGlA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758208154; c=relaxed/simple; bh=4j8vRBELdW0QshfmtFprRBJA+qWBo/IXVvkjTX5z0Qk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=sDKzaiZfZ/1rlyn0kao6uk8xmMl2ie4fhfx5/HEcy9cx4im9hmC2224GgrqpoYcfRY9pwlBIm7OvOYaxf5wBLYzyhCInwMP0SZAkM6GollDercCxmZSfQuAui7Vz7rWTfkAKaAgBFLu+PHXeHPgPaCtmVZYsfntRs70y1Kl77IQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=zp4rzpJ4; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="zp4rzpJ4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1758208152; x=1789744152; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=4j8vRBELdW0QshfmtFprRBJA+qWBo/IXVvkjTX5z0Qk=; b=zp4rzpJ4DqSpEH6mNz8z6C6blHTdsf5N8y0Rd0KAyxK/8JkJqqupTO09 WgMcYzM+I5QP1iLxXra0LN3JMOqzUD/3zhYaabYtEH5QJXSi2wflXbXnJ X/mex4U5DYE2Aj9C1kkMOf11q5QWXbqZvIfyYtF7tOwR1d2EkYaTkzzXr QRq3Jgs9pxZEhcemGWmfeK2/InWFBj8xEWlHi9rdqLIvkEtl8TZkb78As HnZgbFy0Lc6GmMAhcH7n33kRjvofBZyYGW8GFVG7GVccUTFW+bt54hQtk wN5e37SOamomQ+hlKTchg4goJ2M5pfU5CpfWuTbIqrXFJw6NqCgOWQL2V A==; X-CSE-ConnectionGUID: ugeKBCocT/GeJhh6l5hQPQ== X-CSE-MsgGUID: V29oNPwLRZ65zNFa1cLTlg== X-IronPort-AV: E=Sophos;i="6.18,275,1751266800"; d="scan'208";a="47215042" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 18 Sep 2025 08:09:04 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Thu, 18 Sep 2025 08:08:39 -0700 Received: from ROU-LL-M19942.mpu32.int (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 18 Sep 2025 08:08:36 -0700 From: Cyrille Pitchen Date: Thu, 18 Sep 2025 17:07:38 +0200 Subject: [PATCH v2 4/5] ARM: dts: microchip: sam9x7: Add GFX2D GPU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250918-cpitchen-mainline_gfx2d-v2-4-6cfac9d56612@microchip.com> References: <20250918-cpitchen-mainline_gfx2d-v2-0-6cfac9d56612@microchip.com> In-Reply-To: <20250918-cpitchen-mainline_gfx2d-v2-0-6cfac9d56612@microchip.com> To: David Airlie , Simona Vetter , "Maarten Lankhorst" , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Russell King CC: , , , , Cyrille Pitchen X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=936; i=cyrille.pitchen@microchip.com; h=from:subject:message-id; bh=4j8vRBELdW0QshfmtFprRBJA+qWBo/IXVvkjTX5z0Qk=; b=owGbwMvMwCXmf6yzKqEsVIbxtFoSQ8YZhZQ37Nq75l3qvefYfzKjbPrzXxOk579ddPmukDzTu vQXQi6fO0pZGMS4GGTFFFkOvdnam3n81WO7V6JSMHNYmUCGMHBxCsBEKmcw/DM+mvPU9k+2yc9/ 4onT3BmZZq/7ciiuWyw+n//s0S/XBZUY/kdqZYhHmyub1uqmz+tbeePZjsLQ2bJcG7ied3zbl77 DgRMA X-Developer-Key: i=cyrille.pitchen@microchip.com; a=openpgp; fpr=7A21115D7D6026585D0E183E0EF12AA1BFAC073D Add support for the GFX2D GPU. Signed-off-by: Cyrille Pitchen --- arch/arm/boot/dts/microchip/sam9x7.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/mi= crochip/sam9x7.dtsi index 66c07e642c3e1a2272490ec311062dfdf291c1cc..d61a7e2da5b587bfe399fdb51de= a4dd6c6b9e552 100644 --- a/arch/arm/boot/dts/microchip/sam9x7.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi @@ -271,6 +271,14 @@ AT91_XDMAC_DT_PERID(38))>, status =3D "disabled"; }; =20 + gpu: gpu@f0018000 { + compatible =3D "microchip,sam9x7-gfx2d"; + reg =3D <0xf0018000 0x4000>; + interrupts =3D <36 IRQ_TYPE_LEVEL_HIGH 0>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 36>; + status =3D "disabled"; + }; + i2s: i2s@f001c000 { compatible =3D "microchip,sam9x7-i2smcc", "microchip,sam9x60-i2smcc"; reg =3D <0xf001c000 0x100>; --=20 2.48.1