From nobody Thu Oct 2 10:55:49 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 160E030C100; Thu, 18 Sep 2025 15:09:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758208153; cv=none; b=MOmsyAm8jJPe2u/G60aEqwQagcNTgU3JpFPNWgRH9qZXmvgOTFVUVe/JjiQokI5m/e2DQmp0+ZUtHAJQ1S4qn68pYpdxQ8wfcfS1DncvnT25gUtWTq8euAw67JB6ne+E5EnVke9NV4+CiLfn5nrMANPg1DsTc0o5XyxvAvooa9c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758208153; c=relaxed/simple; bh=GfGwxZKLqGpRvWdmOw4AEDvBya2xCMOPOJ7k3R+7fE4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=PiM2CC9gQbWHwzYiHqd+r5StCGRlwcc7krg4pYopFOojAoMnWDRoUkXo9wRHNLTEdIw2teGop/DmXfjWhsX0Tf7OrgrkvR+4wi7q45jtqtwuGSGXECxZsPEOEhf2YJ07x5knbtCf/gaeciTfXPTo9UPDq1wQjeh8HsB26FUx3eM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=G4wsYEkG; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="G4wsYEkG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1758208152; x=1789744152; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=GfGwxZKLqGpRvWdmOw4AEDvBya2xCMOPOJ7k3R+7fE4=; b=G4wsYEkGXIw7NKGyuQC44udEKJyHOeQgvBWwQOsCBELljdxWJzsIoyRY gPX2FfON7fOOTwxjKKc8dVt+cL/GuscGT+UWq9idWmXknX0znTfoq1YS5 DyBf+TDoR3katGkxL8B2KAcq7gnKWV/BQJJqprnIueBfLLSluNJ1mxxAe eBcMoxDx8dxHaeZHZ/bksGzmMTZofnXB8onzJEN7ItcELQoLvqkGgILXN CiC2pW9lVixNPQGRj34zIc3OHDn9j7zbOylyVO2G46iPQGngMe3sozz4e wCS91U5f1ULdPZJ408sVoP2XcPA0J+cxE5zkCpdBhiLsnYxVW1HUJXaQ9 w==; X-CSE-ConnectionGUID: ugeKBCocT/GeJhh6l5hQPQ== X-CSE-MsgGUID: i3+164+6RtufCuMJv0SKKQ== X-IronPort-AV: E=Sophos;i="6.18,275,1751266800"; d="scan'208";a="47215040" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 18 Sep 2025 08:09:03 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Thu, 18 Sep 2025 08:08:36 -0700 Received: from ROU-LL-M19942.mpu32.int (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 18 Sep 2025 08:08:32 -0700 From: Cyrille Pitchen Date: Thu, 18 Sep 2025 17:07:37 +0200 Subject: [PATCH v2 3/5] ARM: dts: microchip: sam9x60: Add GFX2D GPU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250918-cpitchen-mainline_gfx2d-v2-3-6cfac9d56612@microchip.com> References: <20250918-cpitchen-mainline_gfx2d-v2-0-6cfac9d56612@microchip.com> In-Reply-To: <20250918-cpitchen-mainline_gfx2d-v2-0-6cfac9d56612@microchip.com> To: David Airlie , Simona Vetter , "Maarten Lankhorst" , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Russell King CC: , , , , Cyrille Pitchen X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=927; i=cyrille.pitchen@microchip.com; h=from:subject:message-id; bh=GfGwxZKLqGpRvWdmOw4AEDvBya2xCMOPOJ7k3R+7fE4=; b=owGbwMvMwCXmf6yzKqEsVIbxtFoSQ8YZheQzDtM8XlbMmv1x6d3m6Q/X6J+Lf7iaqXiCoYyr+ VbLbcJeHaUsDGJcDLJiiiyH3mztzTz+6rHdK1EpmDmsTCBDGLg4BWAiF4sYfjKeneEX1798LnPM nhyh/OCbZn4NG44qXwv1k+769nPGj20M/0Oby0zE9zCWfFlw6tfJ9xIVz+t284v+MG/Zr/StR/T CHRYA X-Developer-Key: i=cyrille.pitchen@microchip.com; a=openpgp; fpr=7A21115D7D6026585D0E183E0EF12AA1BFAC073D Add support for the GFX2D GPU. Signed-off-by: Cyrille Pitchen --- arch/arm/boot/dts/microchip/sam9x60.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/m= icrochip/sam9x60.dtsi index b075865e6a7688005d471665459b3f6f1f26f7a4..338a0f3b336ffa6f1e3f900a4b4= a58e4e3f93bb8 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -353,6 +353,14 @@ AT91_XDMAC_DT_PERID(26))>, status =3D "disabled"; }; =20 + gpu: gpu@f0018000 { + compatible =3D "microchip,sam9x60-gfx2d"; + reg =3D <0xf0018000 0x4000>; + interrupts =3D <36 IRQ_TYPE_LEVEL_HIGH 0>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 36>; + status =3D "disabled"; + }; + i2s: i2s@f001c000 { compatible =3D "microchip,sam9x60-i2smcc"; reg =3D <0xf001c000 0x100>; --=20 2.48.1