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dkim=pass header.d=suse.com header.s=susede1 header.b=uZ18W80B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1758120750; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Lnxctw4TkqNTc4ChtuCQgho9vGAJsGLt5RRgPYgHX4k=; b=uZ18W80B+W3BVzorEzzeTfLdkBOVkMzqlN7fThzkWL+TxyaFP/9Nz3hsOlVdZ29qrfjYsX rA2QE8GVWlAPvzxaexHjLxN404ysPyizlIj40Usp9tYaLoN3GtuHFTUFf022powaBhDjQJ XrrimtZFI6o6tiKY0C7TGMBQRAo0vAY= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org Cc: Juergen Gross , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Peter Zijlstra , Will Deacon , Boqun Feng , Waiman Long , Jiri Kosina , Josh Poimboeuf , Pawan Gupta , Boris Ostrovsky , xen-devel@lists.xenproject.org Subject: [PATCH v2 01/21] x86/paravirt: Remove not needed includes of paravirt.h Date: Wed, 17 Sep 2025 16:52:00 +0200 Message-ID: <20250917145220.31064-2-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-1.51 / 50.00]; BAYES_HAM(-3.00)[100.00%]; SUSPICIOUS_RECIPS(1.50)[]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCPT_COUNT_TWELVE(0.00)[23]; FUZZY_RATELIMITED(0.00)[rspamd.com]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns,suse.com:mid,suse.com:dkim,suse.com:email]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; FREEMAIL_CC(0.00)[suse.com,kernel.org,linutronix.de,redhat.com,alien8.de,linux.intel.com,zytor.com,microsoft.com,infradead.org,gmail.com,oracle.com,lists.xenproject.org]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; RCVD_VIA_SMTP_AUTH(0.00)[]; TAGGED_RCPT(0.00)[]; DKIM_TRACE(0.00)[suse.com:+]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)]; FREEMAIL_ENVRCPT(0.00)[gmail.com] X-Spam-Flag: NO X-Spam-Level: X-Rspamd-Queue-Id: 7F097228CA X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Rspamd-Action: no action X-Spam-Score: -1.51 X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1758120773930116600 Content-Type: text/plain; charset="utf-8" In some places asm/paravirt.h is included without really being needed. Remove the related #include statements. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/entry/entry_64.S | 1 - arch/x86/entry/vsyscall/vsyscall_64.c | 1 - arch/x86/hyperv/hv_spinlock.c | 1 - arch/x86/include/asm/apic.h | 4 ---- arch/x86/include/asm/highmem.h | 1 - arch/x86/include/asm/mmu_context.h | 1 - arch/x86/include/asm/mshyperv.h | 1 - arch/x86/include/asm/pgtable_32.h | 1 - arch/x86/include/asm/spinlock.h | 1 - arch/x86/include/asm/tlbflush.h | 4 ---- arch/x86/kernel/apm_32.c | 1 - arch/x86/kernel/callthunks.c | 1 - arch/x86/kernel/cpu/bugs.c | 1 - arch/x86/kernel/vsmp_64.c | 1 - arch/x86/kernel/x86_init.c | 1 - arch/x86/lib/cache-smp.c | 1 - arch/x86/mm/init.c | 1 - arch/x86/xen/spinlock.c | 1 - 18 files changed, 24 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index ed04a968cc7d..7a82305405af 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscal= l/vsyscall_64.c index c9103a6fa06e..53e50b506471 100644 --- a/arch/x86/entry/vsyscall/vsyscall_64.c +++ b/arch/x86/entry/vsyscall/vsyscall_64.c @@ -37,7 +37,6 @@ #include #include #include -#include =20 #define CREATE_TRACE_POINTS #include "vsyscall_trace.h" diff --git a/arch/x86/hyperv/hv_spinlock.c b/arch/x86/hyperv/hv_spinlock.c index 81b006601370..2a3c2afb0154 100644 --- a/arch/x86/hyperv/hv_spinlock.c +++ b/arch/x86/hyperv/hv_spinlock.c @@ -13,7 +13,6 @@ #include =20 #include -#include #include #include =20 diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 07ba4935e873..e1de090e51dd 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -90,10 +90,6 @@ static inline bool apic_from_smp_config(void) /* * Basic functions accessing APICs. */ -#ifdef CONFIG_PARAVIRT -#include -#endif - static inline void native_apic_mem_write(u32 reg, u32 v) { volatile u32 *addr =3D (volatile u32 *)(APIC_BASE + reg); diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h index 585bdadba47d..decfaaf52326 100644 --- a/arch/x86/include/asm/highmem.h +++ b/arch/x86/include/asm/highmem.h @@ -24,7 +24,6 @@ #include #include #include -#include #include #include =20 diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_= context.h index 73bf3b1b44e8..ee15657d25b3 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -9,7 +9,6 @@ #include =20 #include -#include #include #include #include diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyper= v.h index abc4659f5809..a9ab46fcb6a1 100644 --- a/arch/x86/include/asm/mshyperv.h +++ b/arch/x86/include/asm/mshyperv.h @@ -7,7 +7,6 @@ #include #include #include -#include #include #include =20 diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtab= le_32.h index b612cc57a4d3..acea0cfa2460 100644 --- a/arch/x86/include/asm/pgtable_32.h +++ b/arch/x86/include/asm/pgtable_32.h @@ -16,7 +16,6 @@ #ifndef __ASSEMBLER__ #include #include -#include =20 #include #include diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinloc= k.h index 5b6bc7016c22..934632b78d09 100644 --- a/arch/x86/include/asm/spinlock.h +++ b/arch/x86/include/asm/spinlock.h @@ -7,7 +7,6 @@ #include #include #include -#include #include =20 /* diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflus= h.h index 00daedfefc1b..238a6b807da5 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -300,10 +300,6 @@ static inline void mm_clear_asid_transition(struct mm_= struct *mm) { } static inline bool mm_in_asid_transition(struct mm_struct *mm) { return fa= lse; } #endif /* CONFIG_BROADCAST_TLB_FLUSH */ =20 -#ifdef CONFIG_PARAVIRT -#include -#endif - #define flush_tlb_mm(mm) \ flush_tlb_mm_range(mm, 0UL, TLB_FLUSH_ALL, 0UL, true) =20 diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index b37ab1095707..3175d7c134e9 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c @@ -229,7 +229,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/x86/kernel/callthunks.c b/arch/x86/kernel/callthunks.c index a951333c5995..e37728f70322 100644 --- a/arch/x86/kernel/callthunks.c +++ b/arch/x86/kernel/callthunks.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 36dcfc5105be..d278d37c9690 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c index 73511332bb67..25625e3fc183 100644 --- a/arch/x86/kernel/vsmp_64.c +++ b/arch/x86/kernel/vsmp_64.c @@ -18,7 +18,6 @@ #include #include #include -#include #include =20 #define TOPOLOGY_REGISTER_OFFSET 0x10 diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index 0a2bbd674a6d..02ca90378bf9 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -12,7 +12,6 @@ =20 #include #include -#include #include #include #include diff --git a/arch/x86/lib/cache-smp.c b/arch/x86/lib/cache-smp.c index c5c60d07308c..ae5a5dfd33c7 100644 --- a/arch/x86/lib/cache-smp.c +++ b/arch/x86/lib/cache-smp.c @@ -1,5 +1,4 @@ // SPDX-License-Identifier: GPL-2.0 -#include #include #include =20 diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index bb57e93b4caf..f52ebcac50d9 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -27,7 +27,6 @@ #include #include #include -#include #include =20 /* diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c index 8e4efe0fb6f9..fe56646d6919 100644 --- a/arch/x86/xen/spinlock.c +++ b/arch/x86/xen/spinlock.c @@ -8,7 +8,6 @@ #include #include =20 -#include #include =20 #include --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E12332E755 for ; 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Peter Anvin" , "Peter Zijlstra (Intel)" Subject: [PATCH v2 02/21] x86/paravirt: Remove some unneeded struct declarations Date: Wed, 17 Sep 2025 16:52:01 +0200 Message-ID: <20250917145220.31064-3-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Level: X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_COUNT_TWO(0.00)[2]; RCPT_COUNT_TWELVE(0.00)[13]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_TLS_ALL(0.00)[]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:mid] X-Spam-Flag: NO X-Spam-Score: -2.80 Content-Type: text/plain; charset="utf-8" In paravirt_types.h iand paravirt.h there are some struct declarations which are not needed. Remove them. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- V2: - remove mm_struct from paravirt.h, too --- arch/x86/include/asm/paravirt.h | 4 ---- arch/x86/include/asm/paravirt_types.h | 6 ------ 2 files changed, 10 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index b5e59a7ba0d0..612b3df65b1b 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -6,10 +6,6 @@ =20 #include =20 -#ifndef __ASSEMBLER__ -struct mm_struct; -#endif - #ifdef CONFIG_PARAVIRT #include #include diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 37a8627d8277..84cc8c95713b 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -11,16 +11,11 @@ #include #include =20 -struct page; struct thread_struct; -struct desc_ptr; -struct tss_struct; struct mm_struct; -struct desc_struct; struct task_struct; struct cpumask; struct flush_tlb_info; -struct mmu_gather; struct vm_area_struct; =20 /* @@ -205,7 +200,6 @@ struct pv_mmu_ops { #endif } __no_randomize_layout; =20 -struct arch_spinlock; #ifdef CONFIG_SMP #include #endif --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 008F932E73E for ; Wed, 17 Sep 2025 14:52:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120765; cv=none; b=oFZlmInM6eL1BZngO2zowFs8uXBfo+9BPyPFLnUR/DU53whp9eDes7j4iExpOaUiOlhf3UJwmPjHagjNOlcY8xbZJAx16RMXdlXr0xsqq8Vaxi+PsMBECGVoHoKdXeEJcBdlN1MUAPcqRpDYtnTybN5OA5N0uSQWia/2fYybfm4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120765; c=relaxed/simple; bh=EZ48LWYzIj0qdCN5pjZMXR7vDQdWROa2MKrVQsjPQLU=; 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Wed, 17 Sep 2025 14:52:41 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id lnHPLDnLymjbEgAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:52:41 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , "Peter Zijlstra (Intel)" Subject: [PATCH v2 03/21] x86/paravirt: Remove PARAVIRT_DEBUG config option Date: Wed, 17 Sep 2025 16:52:02 +0200 Message-ID: <20250917145220.31064-4-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_TWELVE(0.00)[13]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,imap1.dmz-prg2.suse.org:helo]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Level: X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" The only effect of CONFIG_PARAVIRT_DEBUG set is that instead of doing a call using a NULL pointer a BUG() is being raised. While the BUG() will be a little bit easier to analyse, the call of NULL isn't really that difficult to find the reason for. Remove the config option to make paravirt coding a little bit less annoying. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/Kconfig | 7 ------- arch/x86/include/asm/paravirt.h | 1 - arch/x86/include/asm/paravirt_types.h | 8 -------- 3 files changed, 16 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 52c8910ba2ef..023963a597d9 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -794,13 +794,6 @@ config PARAVIRT_XXL bool depends on X86_64 =20 -config PARAVIRT_DEBUG - bool "paravirt-ops debugging" - depends on PARAVIRT && DEBUG_KERNEL - help - Enable to debug paravirt_ops internals. Specifically, BUG if - a paravirt_op is missing when it is called. - config PARAVIRT_SPINLOCKS bool "Paravirtualization layer for spinlocks" depends on PARAVIRT && SMP diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 612b3df65b1b..fd9826397419 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -12,7 +12,6 @@ #include =20 #ifndef __ASSEMBLER__ -#include #include #include #include diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 84cc8c95713b..085095f94f97 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -354,12 +354,6 @@ extern struct paravirt_patch_template pv_ops; #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" #endif /* CONFIG_X86_32 */ =20 -#ifdef CONFIG_PARAVIRT_DEBUG -#define PVOP_TEST_NULL(op) BUG_ON(pv_ops.op =3D=3D NULL) -#else -#define PVOP_TEST_NULL(op) ((void)pv_ops.op) -#endif - #define PVOP_RETVAL(rettype) \ ({ unsigned long __mask =3D ~0UL; \ BUILD_BUG_ON(sizeof(rettype) > sizeof(unsigned long)); \ @@ -388,7 +382,6 @@ extern struct paravirt_patch_template pv_ops; #define ____PVOP_CALL(ret, op, call_clbr, extra_clbr, ...) \ ({ \ PVOP_CALL_ARGS; \ - PVOP_TEST_NULL(op); \ asm volatile(ALTERNATIVE(PARAVIRT_CALL, ALT_CALL_INSTR, \ ALT_CALL_ALWAYS) \ : call_clbr, ASM_CALL_CONSTRAINT \ @@ -402,7 +395,6 @@ extern struct paravirt_patch_template pv_ops; extra_clbr, ...) \ ({ \ PVOP_CALL_ARGS; \ - PVOP_TEST_NULL(op); \ asm volatile(ALTERNATIVE_2(PARAVIRT_CALL, \ ALT_CALL_INSTR, ALT_CALL_ALWAYS, \ alt, cond) \ --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C261B32B4AA for ; Wed, 17 Sep 2025 14:52:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120771; cv=none; b=PAhpm7J+32gAMWuYz+IUTNaCv5QUXGZehAO6570V3uUR3jVu5RmxRxsSMkds3cLrBVJsjdbloe/wZOjceuGNsmCUW+ajr7cooGwbEZGLtya2F/SqbYSHlfFjqkNKCfpcKR9oJXitZPmfx0k6BTeIEoRCoC/cuMp1oa9whauvniw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120771; c=relaxed/simple; bh=FFf5ymBkot6R4Bde82qyh8L4IBXSB2yHfMrSKI2zgsw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=E+1YTZrUucnM+u+UuGE+3CsUltSNAW8qsy1WdzpHQcGrT9ZsIp/+RlAVrXmeouBIjlXUwykbnW0dnsySIo3JReCFTqHtSW4nYyBOy6vTYubHhj9tFZc6Jy+L0GejfkGTXj6C9YdOLLFZOSm8l6CFZmG4dvm56YzrrYmGEBhHtD4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 1400F20710; Wed, 17 Sep 2025 14:52:48 +0000 (UTC) Authentication-Results: smtp-out2.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 9F6771368D; Wed, 17 Sep 2025 14:52:47 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id +9VpJT/LymjnEgAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:52:47 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , "Peter Zijlstra (Intel)" Subject: [PATCH v2 04/21] x86/paravirt: Move thunk macros to paravirt_types.h Date: Wed, 17 Sep 2025 16:52:03 +0200 Message-ID: <20250917145220.31064-5-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Level: X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 1400F20710 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -4.00 Content-Type: text/plain; charset="utf-8" The macros for generating PV-thunks are part of the generic paravirt infrastructure, so they should be in paravirt_types.h. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/paravirt.h | 68 --------------------------- arch/x86/include/asm/paravirt_types.h | 68 +++++++++++++++++++++++++++ 2 files changed, 68 insertions(+), 68 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index fd9826397419..1344d2fb2b86 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -581,74 +581,6 @@ bool __raw_callee_save___native_vcpu_is_preempted(long= cpu); =20 #endif /* SMP && PARAVIRT_SPINLOCKS */ =20 -#ifdef CONFIG_X86_32 -/* save and restore all caller-save registers, except return value */ -#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;" -#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;" -#else -/* save and restore all caller-save registers, except return value */ -#define PV_SAVE_ALL_CALLER_REGS \ - "push %rcx;" \ - "push %rdx;" \ - "push %rsi;" \ - "push %rdi;" \ - "push %r8;" \ - "push %r9;" \ - "push %r10;" \ - "push %r11;" -#define PV_RESTORE_ALL_CALLER_REGS \ - "pop %r11;" \ - "pop %r10;" \ - "pop %r9;" \ - "pop %r8;" \ - "pop %rdi;" \ - "pop %rsi;" \ - "pop %rdx;" \ - "pop %rcx;" -#endif - -/* - * Generate a thunk around a function which saves all caller-save - * registers except for the return value. This allows C functions to - * be called from assembler code where fewer than normal registers are - * available. It may also help code generation around calls from C - * code if the common case doesn't use many registers. - * - * When a callee is wrapped in a thunk, the caller can assume that all - * arg regs and all scratch registers are preserved across the - * call. The return value in rax/eax will not be saved, even for void - * functions. - */ -#define PV_THUNK_NAME(func) "__raw_callee_save_" #func -#define __PV_CALLEE_SAVE_REGS_THUNK(func, section) \ - extern typeof(func) __raw_callee_save_##func; \ - \ - asm(".pushsection " section ", \"ax\";" \ - ".globl " PV_THUNK_NAME(func) ";" \ - ".type " PV_THUNK_NAME(func) ", @function;" \ - ASM_FUNC_ALIGN \ - PV_THUNK_NAME(func) ":" \ - ASM_ENDBR \ - FRAME_BEGIN \ - PV_SAVE_ALL_CALLER_REGS \ - "call " #func ";" \ - PV_RESTORE_ALL_CALLER_REGS \ - FRAME_END \ - ASM_RET \ - ".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";" \ - ".popsection") - -#define PV_CALLEE_SAVE_REGS_THUNK(func) \ - __PV_CALLEE_SAVE_REGS_THUNK(func, ".text") - -/* Get a reference to a callee-save function */ -#define PV_CALLEE_SAVE(func) \ - ((struct paravirt_callee_save) { __raw_callee_save_##func }) - -/* Promise that "func" already uses the right calling convention */ -#define __PV_IS_CALLEE_SAVE(func) \ - ((struct paravirt_callee_save) { func }) - #ifdef CONFIG_PARAVIRT_XXL static __always_inline unsigned long arch_local_save_flags(void) { diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 085095f94f97..7acff40cc159 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -512,5 +512,73 @@ unsigned long pv_native_read_cr2(void); =20 #define ALT_NOT_XEN ALT_NOT(X86_FEATURE_XENPV) =20 +#ifdef CONFIG_X86_32 +/* save and restore all caller-save registers, except return value */ +#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;" +#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;" +#else +/* save and restore all caller-save registers, except return value */ +#define PV_SAVE_ALL_CALLER_REGS \ + "push %rcx;" \ + "push %rdx;" \ + "push %rsi;" \ + "push %rdi;" \ + "push %r8;" \ + "push %r9;" \ + "push %r10;" \ + "push %r11;" +#define PV_RESTORE_ALL_CALLER_REGS \ + "pop %r11;" \ + "pop %r10;" \ + "pop %r9;" \ + "pop %r8;" \ + "pop %rdi;" \ + "pop %rsi;" \ + "pop %rdx;" \ + "pop %rcx;" +#endif + +/* + * Generate a thunk around a function which saves all caller-save + * registers except for the return value. This allows C functions to + * be called from assembler code where fewer than normal registers are + * available. It may also help code generation around calls from C + * code if the common case doesn't use many registers. + * + * When a callee is wrapped in a thunk, the caller can assume that all + * arg regs and all scratch registers are preserved across the + * call. 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Wed, 17 Sep 2025 14:52:53 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id Y0sVHEXLymj1EgAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:52:53 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Russell King , Catalin Marinas , Will Deacon , Huacai Chen , WANG Xuerui , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 05/21] paravirt: Remove asm/paravirt_api_clock.h Date: Wed, 17 Sep 2025 16:52:04 +0200 Message-ID: <20250917145220.31064-6-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:mid]; RCPT_COUNT_TWELVE(0.00)[37]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FREEMAIL_CC(0.00)[suse.com,broadcom.com,armlinux.org.uk,arm.com,kernel.org,xen0n.name,linux.ibm.com,ellerman.id.au,gmail.com,csgroup.eu,sifive.com,dabbelt.com,eecs.berkeley.edu,ghiti.fr,linutronix.de,redhat.com,alien8.de,linux.intel.com,zytor.com,infradead.org,linaro.org,goodmis.org,google.com,suse.de,lists.infradead.org]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FREEMAIL_ENVRCPT(0.00)[gmail.com] X-Spam-Flag: NO X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" All architectures supporting CONFIG_PARAVIRT share the same contents of asm/paravirt_api_clock.h: #include So remove all incarnations of asm/paravirt_api_clock.h and remove the only place where it is included, as there asm/paravirt.h is included anyway. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/arm/include/asm/paravirt_api_clock.h | 1 - arch/arm64/include/asm/paravirt_api_clock.h | 1 - arch/loongarch/include/asm/paravirt_api_clock.h | 1 - arch/powerpc/include/asm/paravirt_api_clock.h | 2 -- arch/riscv/include/asm/paravirt_api_clock.h | 1 - arch/x86/include/asm/paravirt_api_clock.h | 1 - kernel/sched/sched.h | 1 - 7 files changed, 8 deletions(-) delete mode 100644 arch/arm/include/asm/paravirt_api_clock.h delete mode 100644 arch/arm64/include/asm/paravirt_api_clock.h delete mode 100644 arch/loongarch/include/asm/paravirt_api_clock.h delete mode 100644 arch/powerpc/include/asm/paravirt_api_clock.h delete mode 100644 arch/riscv/include/asm/paravirt_api_clock.h delete mode 100644 arch/x86/include/asm/paravirt_api_clock.h diff --git a/arch/arm/include/asm/paravirt_api_clock.h b/arch/arm/include/a= sm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/arm/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm64/include/asm/paravirt_api_clock.h b/arch/arm64/inclu= de/asm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/arm64/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/loongarch/include/asm/paravirt_api_clock.h b/arch/loongar= ch/include/asm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/loongarch/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/powerpc/include/asm/paravirt_api_clock.h b/arch/powerpc/i= nclude/asm/paravirt_api_clock.h deleted file mode 100644 index d25ca7ac57c7..000000000000 --- a/arch/powerpc/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1,2 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#include diff --git a/arch/riscv/include/asm/paravirt_api_clock.h b/arch/riscv/inclu= de/asm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/riscv/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/x86/include/asm/paravirt_api_clock.h b/arch/x86/include/a= sm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/x86/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index be9745d104f7..6442441b46d7 100644 --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h @@ -84,7 +84,6 @@ struct cpuidle_state; =20 #ifdef CONFIG_PARAVIRT # include -# include #endif =20 #include --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4A30333AAD for ; Wed, 17 Sep 2025 14:53:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120785; cv=none; b=HrJxUjXRTx/1STbPGaFPhWW6im05IGmd1O46B7TC/N309x4WzzeiO/piLPpjg7u7UbKSxvF9LEqYUJDXrgsVuMHdzsk/2oO7GZuHxHWnRN2BoiLgfn9JkJ63vodGU73FMRnSF4C/TFrTkXyRU4fM3R+WLwqRTRVhP7vxtjNuIR8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120785; c=relaxed/simple; bh=Ny407691mhH+4v4ONWlbu910eE58aQgX3QomjDbfYu0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cgFUtP6QMvPLPted4BxTcpSspAIyXlu2RIQ4Deo1enfmUVT8xGTcGn40KjNTx6LeLqi2ypam/KpkMjya0iFpGgg60PNcWz97mgzYy6pbn/nfFar/XNMjbiscCvFBSRmijF5TDOWcrwOanVX0fCeaSrRElhgHI3N5HonaKWOR/zE= ARC-Authentication-Results: i=1; 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Wed, 17 Sep 2025 14:52:59 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id CRHEOkvLymgAEwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:52:59 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Russell King , Catalin Marinas , Will Deacon , Huacai Chen , WANG Xuerui , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Paolo Bonzini , Vitaly Kuznetsov , Stefano Stabellini , Oleksandr Tyshchenko , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org Subject: [PATCH v2 06/21] sched: Move clock related paravirt code to kernel/sched Date: Wed, 17 Sep 2025 16:52:05 +0200 Message-ID: <20250917145220.31064-7-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Level: X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 39702206DF X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Score: -4.00 Content-Type: text/plain; charset="utf-8" Paravirt clock related functions are available in multiple archs. In order to share the common parts, move the common static keys to kernel/sched/ and remove them from the arch specific files. Make a common paravirt_steal_clock() implementation available in kernel/sched/cputime.c, guarding it with a new config option CONFIG_HAVE_PV_STEAL_CLOCK_GEN, which can be selected by an arch in case it wants to use that common variant. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/Kconfig | 3 +++ arch/arm/include/asm/paravirt.h | 4 ---- arch/arm/kernel/paravirt.c | 3 --- arch/arm64/include/asm/paravirt.h | 4 ---- arch/arm64/kernel/paravirt.c | 4 +--- arch/loongarch/include/asm/paravirt.h | 3 --- arch/loongarch/kernel/paravirt.c | 3 +-- arch/powerpc/include/asm/paravirt.h | 3 --- arch/powerpc/platforms/pseries/setup.c | 4 +--- arch/riscv/include/asm/paravirt.h | 4 ---- arch/riscv/kernel/paravirt.c | 4 +--- arch/x86/include/asm/paravirt.h | 4 ---- arch/x86/kernel/cpu/vmware.c | 1 + arch/x86/kernel/kvm.c | 1 + arch/x86/kernel/paravirt.c | 3 --- drivers/xen/time.c | 1 + include/linux/sched/cputime.h | 18 ++++++++++++++++++ kernel/sched/core.c | 5 +++++ kernel/sched/cputime.c | 13 +++++++++++++ kernel/sched/sched.h | 2 +- 20 files changed, 47 insertions(+), 40 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index d1b4ffd6e085..7921be052472 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1003,6 +1003,9 @@ config HAVE_IRQ_TIME_ACCOUNTING Archs need to ensure they use a high enough resolution clock to support irq time accounting and then call enable_sched_clock_irqtime(). =20 +config HAVE_PV_STEAL_CLOCK_GEN + bool + config HAVE_MOVE_PUD bool help diff --git a/arch/arm/include/asm/paravirt.h b/arch/arm/include/asm/paravir= t.h index 95d5b0d625cd..69da4bdcf856 100644 --- a/arch/arm/include/asm/paravirt.h +++ b/arch/arm/include/asm/paravirt.h @@ -5,10 +5,6 @@ #ifdef CONFIG_PARAVIRT #include =20 -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - u64 dummy_steal_clock(int cpu); =20 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); diff --git a/arch/arm/kernel/paravirt.c b/arch/arm/kernel/paravirt.c index 7dd9806369fb..3895a5578852 100644 --- a/arch/arm/kernel/paravirt.c +++ b/arch/arm/kernel/paravirt.c @@ -12,9 +12,6 @@ #include #include =20 -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static u64 native_steal_clock(int cpu) { return 0; diff --git a/arch/arm64/include/asm/paravirt.h b/arch/arm64/include/asm/par= avirt.h index 9aa193e0e8f2..c9f7590baacb 100644 --- a/arch/arm64/include/asm/paravirt.h +++ b/arch/arm64/include/asm/paravirt.h @@ -5,10 +5,6 @@ #ifdef CONFIG_PARAVIRT #include =20 -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - u64 dummy_steal_clock(int cpu); =20 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); diff --git a/arch/arm64/kernel/paravirt.c b/arch/arm64/kernel/paravirt.c index aa718d6a9274..943b60ce12f4 100644 --- a/arch/arm64/kernel/paravirt.c +++ b/arch/arm64/kernel/paravirt.c @@ -19,14 +19,12 @@ #include #include #include +#include =20 #include #include #include =20 -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static u64 native_steal_clock(int cpu) { return 0; diff --git a/arch/loongarch/include/asm/paravirt.h b/arch/loongarch/include= /asm/paravirt.h index 3f4323603e6a..d219ea0d98ac 100644 --- a/arch/loongarch/include/asm/paravirt.h +++ b/arch/loongarch/include/asm/paravirt.h @@ -5,9 +5,6 @@ #ifdef CONFIG_PARAVIRT =20 #include -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; =20 u64 dummy_steal_clock(int cpu); DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); diff --git a/arch/loongarch/kernel/paravirt.c b/arch/loongarch/kernel/parav= irt.c index b1b51f920b23..8caaa94fed1a 100644 --- a/arch/loongarch/kernel/paravirt.c +++ b/arch/loongarch/kernel/paravirt.c @@ -6,11 +6,10 @@ #include #include #include +#include #include =20 static int has_steal_clock; -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; static DEFINE_PER_CPU(struct kvm_steal_time, steal_time) __aligned(64); DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); =20 diff --git a/arch/powerpc/include/asm/paravirt.h b/arch/powerpc/include/asm= /paravirt.h index b78b82d66057..92343a23ad15 100644 --- a/arch/powerpc/include/asm/paravirt.h +++ b/arch/powerpc/include/asm/paravirt.h @@ -23,9 +23,6 @@ static inline bool is_shared_processor(void) } =20 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - u64 pseries_paravirt_steal_clock(int cpu); =20 static inline u64 paravirt_steal_clock(int cpu) diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platform= s/pseries/setup.c index b10a25325238..50b26ed8432d 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -42,6 +42,7 @@ #include #include #include +#include =20 #include #include @@ -83,9 +84,6 @@ DEFINE_STATIC_KEY_FALSE(shared_processor); EXPORT_SYMBOL(shared_processor); =20 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static bool steal_acc =3D true; static int __init parse_no_stealacc(char *arg) { diff --git a/arch/riscv/include/asm/paravirt.h b/arch/riscv/include/asm/par= avirt.h index c0abde70fc2c..17e5e39c72c0 100644 --- a/arch/riscv/include/asm/paravirt.h +++ b/arch/riscv/include/asm/paravirt.h @@ -5,10 +5,6 @@ #ifdef CONFIG_PARAVIRT #include =20 -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - u64 dummy_steal_clock(int cpu); =20 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c index fa6b0339a65d..d3c334f16172 100644 --- a/arch/riscv/kernel/paravirt.c +++ b/arch/riscv/kernel/paravirt.c @@ -16,15 +16,13 @@ #include #include #include +#include =20 #include #include #include #include =20 -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static u64 native_steal_clock(int cpu) { return 0; diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 1344d2fb2b86..0ef797ea8440 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -30,10 +30,6 @@ static __always_inline u64 paravirt_sched_clock(void) return static_call(pv_sched_clock)(); } =20 -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - __visible void __native_queued_spin_unlock(struct qspinlock *lock); bool pv_is_native_spin_unlock(void); __visible bool __native_vcpu_is_preempted(long cpu); diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index cb3f900c46fc..a3e6936839b1 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 8ae750cde0c6..a23211eaaeed 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index ab3e172dcc69..a3ba4747be1c 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -60,9 +60,6 @@ void __init native_pv_lock_init(void) static_branch_enable(&virt_spin_lock_key); } =20 -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static u64 native_steal_clock(int cpu) { return 0; diff --git a/drivers/xen/time.c b/drivers/xen/time.c index 5683383d2305..d360ded2ef39 100644 --- a/drivers/xen/time.c +++ b/drivers/xen/time.c @@ -8,6 +8,7 @@ #include #include #include +#include =20 #include #include diff --git a/include/linux/sched/cputime.h b/include/linux/sched/cputime.h index 5f8fd5b24a2e..e90efaf6d26e 100644 --- a/include/linux/sched/cputime.h +++ b/include/linux/sched/cputime.h @@ -2,6 +2,7 @@ #ifndef _LINUX_SCHED_CPUTIME_H #define _LINUX_SCHED_CPUTIME_H =20 +#include #include =20 /* @@ -180,4 +181,21 @@ static inline void prev_cputime_init(struct prev_cputi= me *prev) extern unsigned long long task_sched_runtime(struct task_struct *task); =20 +#ifdef CONFIG_PARAVIRT +struct static_key; +extern struct static_key paravirt_steal_enabled; +extern struct static_key paravirt_steal_rq_enabled; + +#ifdef CONFIG_HAVE_PV_STEAL_CLOCK_GEN +u64 dummy_steal_clock(int cpu); + +DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); + +static inline u64 paravirt_steal_clock(int cpu) +{ + return static_call(pv_steal_clock)(cpu); +} +#endif +#endif + #endif /* _LINUX_SCHED_CPUTIME_H */ diff --git a/kernel/sched/core.c b/kernel/sched/core.c index be00629f0ba4..e723226e4e11 100644 --- a/kernel/sched/core.c +++ b/kernel/sched/core.c @@ -767,6 +767,11 @@ struct rq *task_rq_lock(struct task_struct *p, struct = rq_flags *rf) * RQ-clock updating methods: */ =20 +/* Use CONFIG_PARAVIRT as this will avoid more #ifdef in arch code. */ +#ifdef CONFIG_PARAVIRT +struct static_key paravirt_steal_rq_enabled; +#endif + static void update_rq_clock_task(struct rq *rq, s64 delta) { /* diff --git a/kernel/sched/cputime.c b/kernel/sched/cputime.c index 7097de2c8cda..ed8f71e08047 100644 --- a/kernel/sched/cputime.c +++ b/kernel/sched/cputime.c @@ -251,6 +251,19 @@ void __account_forceidle_time(struct task_struct *p, u= 64 delta) * ticks are not redelivered later. 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Wed, 17 Sep 2025 14:53:06 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id /8zUJFLLymgbEwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:53:06 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, virtualization@lists.linux.dev, x86@kernel.org Cc: Juergen Gross , Russell King , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Stefano Stabellini , Oleksandr Tyshchenko , linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org, "Peter Zijlstra (Intel)" Subject: [PATCH v2 07/21] arm/paravirt: Use common code for paravirt_steal_clock() Date: Wed, 17 Sep 2025 16:52:06 +0200 Message-ID: <20250917145220.31064-8-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_TWELVE(0.00)[13]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:mid,suse.com:email]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Level: X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. This allows to remove paravirt.c and paravirt.h from arch/arm. Until all archs supporting Xen have been switched to the common code of paravirt_steal_clock(), drivers/xen/time.c needs to include asm/paravirt.h for those archs, while this is not necessary for arm any longer. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/arm/Kconfig | 1 + arch/arm/include/asm/paravirt.h | 18 ------------------ arch/arm/kernel/Makefile | 1 - arch/arm/kernel/paravirt.c | 20 -------------------- drivers/xen/time.c | 2 ++ 5 files changed, 3 insertions(+), 39 deletions(-) delete mode 100644 arch/arm/include/asm/paravirt.h delete mode 100644 arch/arm/kernel/paravirt.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b1f3df39ed40..48c3a36a63f8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1338,6 +1338,7 @@ config UACCESS_WITH_MEMCPY =20 config PARAVIRT bool "Enable paravirtualization code" + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/arm/include/asm/paravirt.h b/arch/arm/include/asm/paravir= t.h deleted file mode 100644 index 69da4bdcf856..000000000000 --- a/arch/arm/include/asm/paravirt.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _ASM_ARM_PARAVIRT_H -#define _ASM_ARM_PARAVIRT_H - -#ifdef CONFIG_PARAVIRT -#include - -u64 dummy_steal_clock(int cpu); - -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); - -static inline u64 paravirt_steal_clock(int cpu) -{ - return static_call(pv_steal_clock)(cpu); -} -#endif - -#endif diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index afc9de7ef9a1..b36cf0cfd4a7 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -83,7 +83,6 @@ AFLAGS_iwmmxt.o :=3D -Wa,-mcpu=3Diwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) +=3D topology.o obj-$(CONFIG_VDSO) +=3D vdso.o obj-$(CONFIG_EFI) +=3D efi.o -obj-$(CONFIG_PARAVIRT) +=3D paravirt.o =20 obj-y +=3D head$(MMUEXT).o obj-$(CONFIG_DEBUG_LL) +=3D debug.o diff --git a/arch/arm/kernel/paravirt.c b/arch/arm/kernel/paravirt.c deleted file mode 100644 index 3895a5578852..000000000000 --- a/arch/arm/kernel/paravirt.c +++ /dev/null @@ -1,20 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * - * Copyright (C) 2013 Citrix Systems - * - * Author: Stefano Stabellini - */ - -#include -#include -#include -#include -#include - -static u64 native_steal_clock(int cpu) -{ - return 0; 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Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/paravirt.h | 10 ---------- arch/arm64/kernel/paravirt.c | 7 ------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index e9bbfacc35a6..08abcd353cf4 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1582,6 +1582,7 @@ config CC_HAVE_SHADOW_CALL_STACK =20 config PARAVIRT bool "Enable paravirtualization code" + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/arm64/include/asm/paravirt.h b/arch/arm64/include/asm/par= avirt.h index c9f7590baacb..cb037e742372 100644 --- a/arch/arm64/include/asm/paravirt.h +++ b/arch/arm64/include/asm/paravirt.h @@ -3,16 +3,6 @@ #define _ASM_ARM64_PARAVIRT_H =20 #ifdef CONFIG_PARAVIRT -#include - -u64 dummy_steal_clock(int cpu); - -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); 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REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:helo]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_EQ_ENVFROM(0.00)[]; TO_DN_SOME(0.00)[]; RCPT_COUNT_SEVEN(0.00)[11]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/loongarch/Kconfig | 1 + arch/loongarch/include/asm/paravirt.h | 10 ---------- arch/loongarch/kernel/paravirt.c | 7 ------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index f0abc38c40ac..06bebad41c6f 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -678,6 +678,7 @@ source "kernel/livepatch/Kconfig" config PARAVIRT bool "Enable paravirtualization code" depends on AS_HAS_LVZ_EXTENSION + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/loongarch/include/asm/paravirt.h b/arch/loongarch/include= /asm/paravirt.h index d219ea0d98ac..0111f0ad5f73 100644 --- a/arch/loongarch/include/asm/paravirt.h +++ b/arch/loongarch/include/asm/paravirt.h @@ -4,16 +4,6 @@ =20 #ifdef CONFIG_PARAVIRT =20 -#include - -u64 dummy_steal_clock(int cpu); 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Wed, 17 Sep 2025 14:53:23 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id EGUqOGPLymg2EwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:53:23 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, virtualization@lists.linux.dev, x86@kernel.org Cc: Juergen Gross , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , "Peter Zijlstra (Intel)" Subject: [PATCH v2 10/21] riscv/paravirt: Use common code for paravirt_steal_clock() Date: Wed, 17 Sep 2025 16:52:09 +0200 Message-ID: <20250917145220.31064-11-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_TWELVE(0.00)[13]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,imap1.dmz-prg2.suse.org:helo]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Level: X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) Reviewed-by: Andrew Jones --- arch/riscv/Kconfig | 1 + arch/riscv/include/asm/paravirt.h | 10 ---------- arch/riscv/kernel/paravirt.c | 7 ------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 51dcd8eaa243..8a7573aebaca 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -1108,6 +1108,7 @@ config COMPAT config PARAVIRT bool "Enable paravirtualization code" depends on RISCV_SBI + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/riscv/include/asm/paravirt.h b/arch/riscv/include/asm/par= avirt.h index 17e5e39c72c0..c49c55b266f3 100644 --- a/arch/riscv/include/asm/paravirt.h +++ b/arch/riscv/include/asm/paravirt.h @@ -3,16 +3,6 @@ #define _ASM_RISCV_PARAVIRT_H =20 #ifdef CONFIG_PARAVIRT -#include - -u64 dummy_steal_clock(int cpu); - -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); - -static inline u64 paravirt_steal_clock(int cpu) -{ - return static_call(pv_steal_clock)(cpu); -} =20 int __init pv_time_init(void); =20 diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c index d3c334f16172..5f56be79cd06 100644 --- a/arch/riscv/kernel/paravirt.c +++ b/arch/riscv/kernel/paravirt.c @@ -23,13 +23,6 @@ #include #include =20 -static u64 native_steal_clock(int cpu) -{ - return 0; -} - -DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); - static bool steal_acc =3D true; static int __init parse_no_stealacc(char *arg) { --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0DED9332A2C for ; Wed, 17 Sep 2025 14:53:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120813; cv=none; b=W938Fm59udvnMmQZeDHGaNsYKShmZFxmaG08Wv6DiyigF4TPDx/UTRm8DM5yHhQHHxh5u5cZ/fgBdANeBtAd7rXFtFKvfPT818XfFJScwiC6p7DAjx4vwultCS1A2cIl83R3o8m3HDX5vCbj57MqAoDdY9Rf0TWQBDtPOZMkgio= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120813; c=relaxed/simple; bh=Gc0HztLWw1A41TEwPisANuAj7pvY2lNBZ4Fk2z1LJR8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GhRVkQF2BnV3hNwWXmQCRpocL1Hkknksw2obMFskProg3O+E06O2bkNtV45HiM9v6LJ0pXdHpZEoBqpUfT+qRCO49baSN5ZSg50g5nFUuFTkMg5kBiqaQm7u8tqVEutjci3MSebHXW3AfbrULdm4XoSVCqsvVDqFxygxFUHbE70= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 8727433842; Wed, 17 Sep 2025 14:53:30 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 1256C1368D; Wed, 17 Sep 2025 14:53:30 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id FWccA2rLymg7EwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:53:30 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Boris Ostrovsky , Stefano Stabellini , Oleksandr Tyshchenko , xen-devel@lists.xenproject.org, "Peter Zijlstra (Intel)" Subject: [PATCH v2 11/21] x86/paravirt: Use common code for paravirt_steal_clock() Date: Wed, 17 Sep 2025 16:52:10 +0200 Message-ID: <20250917145220.31064-12-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Level: X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 8727433842 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -4.00 Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. With all archs supporting Xen now having been switched to the common variant, including paravirt.h can be dropped from drivers/xen/time.c. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/Kconfig | 1 + arch/x86/include/asm/paravirt.h | 7 ------- arch/x86/kernel/paravirt.c | 6 ------ arch/x86/xen/time.c | 1 + drivers/xen/time.c | 3 --- 5 files changed, 2 insertions(+), 16 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 023963a597d9..5e9c7458ac50 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -784,6 +784,7 @@ if HYPERVISOR_GUEST config PARAVIRT bool "Enable paravirtualization code" depends on HAVE_STATIC_CALL + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 0ef797ea8440..766a7cee3d64 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -17,10 +17,8 @@ #include #include =20 -u64 dummy_steal_clock(int cpu); u64 dummy_sched_clock(void); =20 -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock); =20 void paravirt_set_sched_clock(u64 (*func)(void)); @@ -35,11 +33,6 @@ bool pv_is_native_spin_unlock(void); __visible bool __native_vcpu_is_preempted(long cpu); bool pv_is_native_vcpu_is_preempted(void); =20 -static inline u64 paravirt_steal_clock(int cpu) -{ - return static_call(pv_steal_clock)(cpu); -} - #ifdef CONFIG_PARAVIRT_SPINLOCKS void __init paravirt_set_cap(void); #endif diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index a3ba4747be1c..42991d471bf3 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -60,12 +60,6 @@ void __init native_pv_lock_init(void) static_branch_enable(&virt_spin_lock_key); } =20 -static u64 native_steal_clock(int cpu) -{ - return 0; -} - -DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock); =20 void paravirt_set_sched_clock(u64 (*func)(void)) diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 96521b1874ac..e4754b2fa900 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 #include #include diff --git a/drivers/xen/time.c b/drivers/xen/time.c index 53b12f5ac465..0b18d8a5a2dd 100644 --- a/drivers/xen/time.c +++ b/drivers/xen/time.c @@ -10,9 +10,6 @@ #include #include =20 -#ifndef CONFIG_HAVE_PV_STEAL_CLOCK_GEN -#include -#endif #include #include =20 --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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s=susede1; t=1758120816; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gztxpq9DX+nPOLwjlXTO5zTcC6KXOoTlESO5Ptm2kQY=; b=DjHHRNFlyxPa5V7hkd/f7bmc7195g1GjRLuYDDswEVlLP5Nx1z73ZQygsSLzkDHTWbSgZN PgiZRfmQBbt5R6HSFhFXCmsudbl2C/uhCuhWpJiA/KitXqfOAS4RSLKiti3aiqhZoKgpZF 2jhCs/l+46nohVfezAUN3NsLp8Pd2q8= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Paolo Bonzini , Vitaly Kuznetsov , Boris Ostrovsky , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Daniel Lezcano , xen-devel@lists.xenproject.org, "Peter Zijlstra (Intel)" Subject: [PATCH v2 12/21] x86/paravirt: Move paravirt_sched_clock() related code into tsc.c Date: Wed, 17 Sep 2025 16:52:11 +0200 Message-ID: <20250917145220.31064-13-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:helo]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[24]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -6.80 X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1758120836891116600 Content-Type: text/plain; charset="utf-8" The only user of paravirt_sched_clock() is in tsc.c, so move the code from paravirt.c and paravirt.h to tsc.c. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/paravirt.h | 12 ------------ arch/x86/include/asm/timer.h | 1 + arch/x86/kernel/kvmclock.c | 1 + arch/x86/kernel/paravirt.c | 7 ------- arch/x86/kernel/tsc.c | 10 +++++++++- arch/x86/xen/time.c | 1 + drivers/clocksource/hyperv_timer.c | 2 ++ 7 files changed, 14 insertions(+), 20 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 766a7cee3d64..b69e75a5c872 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -14,20 +14,8 @@ #ifndef __ASSEMBLER__ #include #include -#include #include =20 -u64 dummy_sched_clock(void); - -DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock); - -void paravirt_set_sched_clock(u64 (*func)(void)); - -static __always_inline u64 paravirt_sched_clock(void) -{ - return static_call(pv_sched_clock)(); -} - __visible void __native_queued_spin_unlock(struct qspinlock *lock); bool pv_is_native_spin_unlock(void); __visible bool __native_vcpu_is_preempted(long cpu); diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index 23baf8c9b34c..fda18bcb19b4 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -12,6 +12,7 @@ extern void recalibrate_cpu_khz(void); extern int no_timer_check; =20 extern bool using_native_sched_clock(void); +void paravirt_set_sched_clock(u64 (*func)(void)); =20 /* * We use the full linear equation: f(x) =3D a + b*x, in order to allow diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index ca0a49eeac4a..b5991d53fc0e 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -19,6 +19,7 @@ #include =20 #include +#include #include #include =20 diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 42991d471bf3..4e37db8073f9 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -60,13 +60,6 @@ void __init native_pv_lock_init(void) static_branch_enable(&virt_spin_lock_key); } =20 -DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock); - -void paravirt_set_sched_clock(u64 (*func)(void)) -{ - static_call_update(pv_sched_clock, func); -} - static noinstr void pv_native_safe_halt(void) { native_safe_halt(); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 87e749106dda..554b54783a04 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -266,19 +266,27 @@ u64 native_sched_clock_from_tsc(u64 tsc) /* We need to define a real function for sched_clock, to override the weak default version */ #ifdef CONFIG_PARAVIRT +DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock); + noinstr u64 sched_clock_noinstr(void) { - return paravirt_sched_clock(); + return static_call(pv_sched_clock)(); } =20 bool using_native_sched_clock(void) { return static_call_query(pv_sched_clock) =3D=3D native_sched_clock; } + +void paravirt_set_sched_clock(u64 (*func)(void)) +{ + static_call_update(pv_sched_clock, func); +} #else u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); 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Wed, 17 Sep 2025 14:53:42 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id daJiCXbLymhaEwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:53:42 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Oleg Nesterov Subject: [PATCH v2 13/21] x86/paravirt: Introduce new paravirt-base.h header Date: Wed, 17 Sep 2025 16:52:12 +0200 Message-ID: <20250917145220.31064-14-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:helo]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[13]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" Move the pv_info related definitions and the declarations of the global paravirt function primitives into a new header file paravirt-base.h. This enables to use that header instead of paravirt_types.h in ptrace.h. Additionally it is in preparation of reducing include hell with paravirt enabled. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/include/asm/paravirt-base.h | 29 +++++++++++++++++++++++++++ arch/x86/include/asm/paravirt.h | 4 +++- arch/x86/include/asm/paravirt_types.h | 23 +-------------------- arch/x86/include/asm/ptrace.h | 2 +- 4 files changed, 34 insertions(+), 24 deletions(-) create mode 100644 arch/x86/include/asm/paravirt-base.h diff --git a/arch/x86/include/asm/paravirt-base.h b/arch/x86/include/asm/pa= ravirt-base.h new file mode 100644 index 000000000000..3827ea20de18 --- /dev/null +++ b/arch/x86/include/asm/paravirt-base.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ASM_X86_PARAVIRT_BASE_H +#define _ASM_X86_PARAVIRT_BASE_H + +/* + * Wrapper type for pointers to code which uses the non-standard + * calling convention. See PV_CALL_SAVE_REGS_THUNK below. + */ +struct paravirt_callee_save { + void *func; +}; + +struct pv_info { +#ifdef CONFIG_PARAVIRT_XXL + u16 extra_user_64bit_cs; /* __USER_CS if none */ +#endif + const char *name; +}; + +void default_banner(void); +extern struct pv_info pv_info; +unsigned long paravirt_ret0(void); +#ifdef CONFIG_PARAVIRT_XXL +u64 _paravirt_ident_64(u64); +#endif +#define paravirt_nop ((void *)nop_func) + +#endif /* _ASM_X86_PARAVIRT_BASE_H */ diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index b69e75a5c872..62399f5d037d 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -4,6 +4,9 @@ /* Various instructions on x86 need to be replaced for * para-virtualization: those hooks are defined here. */ =20 +#ifndef __ASSEMBLER__ +#include +#endif #include =20 #ifdef CONFIG_PARAVIRT @@ -601,7 +604,6 @@ static __always_inline unsigned long arch_local_irq_sav= e(void) #undef PVOP_VCALL4 #undef PVOP_CALL4 =20 -extern void default_banner(void); void native_pv_lock_init(void) __init; =20 #else /* __ASSEMBLER__ */ diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 7acff40cc159..148d157e2a4a 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -7,6 +7,7 @@ #ifndef __ASSEMBLER__ #include =20 +#include #include #include #include @@ -18,23 +19,6 @@ struct cpumask; struct flush_tlb_info; struct vm_area_struct; =20 -/* - * Wrapper type for pointers to code which uses the non-standard - * calling convention. See PV_CALL_SAVE_REGS_THUNK below. - */ -struct paravirt_callee_save { - void *func; -}; - -/* general info */ -struct pv_info { -#ifdef CONFIG_PARAVIRT_XXL - u16 extra_user_64bit_cs; /* __USER_CS if none */ -#endif - - const char *name; -}; - #ifdef CONFIG_PARAVIRT_XXL struct pv_lazy_ops { /* Set deferred update mode, used for batching operations. */ @@ -226,7 +210,6 @@ struct paravirt_patch_template { struct pv_lock_ops lock; } __no_randomize_layout; =20 -extern struct pv_info pv_info; extern struct paravirt_patch_template pv_ops; =20 #define paravirt_ptr(op) [paravirt_opptr] "m" (pv_ops.op) @@ -497,17 +480,13 @@ extern struct paravirt_patch_template pv_ops; __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) =20 -unsigned long paravirt_ret0(void); #ifdef CONFIG_PARAVIRT_XXL -u64 _paravirt_ident_64(u64); unsigned long pv_native_save_fl(void); void pv_native_irq_disable(void); void pv_native_irq_enable(void); unsigned long pv_native_read_cr2(void); #endif =20 -#define paravirt_nop ((void *)nop_func) - #endif /* __ASSEMBLER__ */ =20 #define ALT_NOT_XEN ALT_NOT(X86_FEATURE_XENPV) diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h index 50f75467f73d..fe2dab7d74e3 100644 --- a/arch/x86/include/asm/ptrace.h +++ b/arch/x86/include/asm/ptrace.h @@ -172,7 +172,7 @@ struct pt_regs { #endif /* !__i386__ */ =20 #ifdef CONFIG_PARAVIRT -#include +#include #endif =20 #include --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 766BD3397D9 for ; Wed, 17 Sep 2025 14:53:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120832; cv=none; b=qybYdKS/x+7p8bqGPmvh5mx/ZwWZ3syEPAF1fHiLse//8IW8hdaxXQXjAbDxJcJ0hJefdWnii9SDyztinmW/V902y032NRnaD2MGTBg/e68qKPBMZeRgVy0EATyTxVIYiMRv8h9dqGjqds9G/IOhZw/PBPG1xu0b9SIZkPt13tY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120832; c=relaxed/simple; bh=KS8fe3tcaEWBMDARocb/nL7jL4ZSZt3fJ4pVwL98WBA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Fi9myDSqzG27EwQXcwPhMTvOELCgecTDfb7jF7KD1dT0Vz8opcrRWHxoW0DGopQBtMsBSVrVzbCcBu9o1dZqxg17a7XmXusZE9KeduqQs+yRF9n1xFAvHKw/jWo6ebD59xKlSeINJBhIsuu5ClejAqMgCokVOWngR2CM88eFQO4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id C2B8C33849; Wed, 17 Sep 2025 14:53:48 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 5F8CD1368D; Wed, 17 Sep 2025 14:53:48 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id Kce7FXzLymhmEwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:53:48 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH v2 14/21] x86/paravirt: Move pv_native_*() prototypes to paravirt.c Date: Wed, 17 Sep 2025 16:52:13 +0200 Message-ID: <20250917145220.31064-15-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Level: X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: C2B8C33849 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Score: -4.00 Content-Type: text/plain; charset="utf-8" The only reason the pv_native_*() prototypes are needed is the complete definition of those functions via an asm() statement, which makes it impossible to have those functions as static ones. Move the prototypes from paravirt_types.h into paravirt.c, which is the only source referencing the functions. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/include/asm/paravirt_types.h | 7 ------- arch/x86/kernel/paravirt.c | 5 +++++ 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 148d157e2a4a..1e50f13e6543 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -480,13 +480,6 @@ extern struct paravirt_patch_template pv_ops; __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) =20 -#ifdef CONFIG_PARAVIRT_XXL -unsigned long pv_native_save_fl(void); -void pv_native_irq_disable(void); -void pv_native_irq_enable(void); -unsigned long pv_native_read_cr2(void); -#endif - #endif /* __ASSEMBLER__ */ =20 #define ALT_NOT_XEN ALT_NOT(X86_FEATURE_XENPV) diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 4e37db8073f9..5dfbd3f55792 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -45,6 +45,11 @@ void __init default_banner(void) } =20 #ifdef CONFIG_PARAVIRT_XXL +unsigned long pv_native_save_fl(void); +void pv_native_irq_disable(void); +void pv_native_irq_enable(void); +unsigned long pv_native_read_cr2(void); + DEFINE_ASM_FUNC(_paravirt_ident_64, "mov %rdi, %rax", .text); DEFINE_ASM_FUNC(pv_native_save_fl, "pushf; pop %rax", .noinstr.text); DEFINE_ASM_FUNC(pv_native_irq_disable, "cli", .noinstr.text); --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 959C4332A57 for ; Wed, 17 Sep 2025 14:53:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120838; cv=none; b=dMpiMNSG5qYvcvCC/7kp504c6poaIpZrSiA2THzxIKYjQ0Hy8NWcE5hU9c+M7FPH9ZZ/dYkWJk8uuQguzI8QCUmKO8vaO8OrwUP/wrhTY6/M/6x80r9eegX5ObJqHYH6OxOgXXjfJzntWUxi29JfHCwGHc/LenrIOGtq7D99bE8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120838; c=relaxed/simple; bh=T+qZM9nE4R6tsVR3YFgIup3isCYSSKfJaQV+FLx2MmI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kk53RBuF7SSlXzqvmZBzHREg4Gsu0j2YyXAC/4ONr4lZYfUZnHSVp49douMYFJMTOcB6PkvxCQdnAQTbNhurVnFty/cS2NHugma1l+rAff5PLtC6naqDkmDtil1sVV24WrStKQ3WH4iLRyCz5LP0FKzI1PLceeKdCKNIt3tnsNg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 8E77C3383C; Wed, 17 Sep 2025 14:53:54 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 349C61368D; Wed, 17 Sep 2025 14:53:54 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id oFNnC4LLymhwEwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:53:54 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v2 15/21] x86/xen: Drop xen_irq_ops Date: Wed, 17 Sep 2025 16:52:14 +0200 Message-ID: <20250917145220.31064-16-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Level: X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 8E77C3383C X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Score: -4.00 Content-Type: text/plain; charset="utf-8" Instead of having a pre-filled array xen_irq_ops for Xen PV paravirt functions, drop the array and assign each element individually. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/xen/irq.c | 20 +++++++------------- tools/objtool/check.c | 1 - 2 files changed, 7 insertions(+), 14 deletions(-) diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c index 39982f955cfe..d8678c3d3971 100644 --- a/arch/x86/xen/irq.c +++ b/arch/x86/xen/irq.c @@ -40,20 +40,14 @@ static void xen_halt(void) xen_safe_halt(); } =20 -static const typeof(pv_ops) xen_irq_ops __initconst =3D { - .irq =3D { - /* Initial interrupt flag handling only called while interrupts off. */ - .save_fl =3D __PV_IS_CALLEE_SAVE(paravirt_ret0), - .irq_disable =3D __PV_IS_CALLEE_SAVE(paravirt_nop), - .irq_enable =3D __PV_IS_CALLEE_SAVE(BUG_func), - - .safe_halt =3D xen_safe_halt, - .halt =3D xen_halt, - }, -}; - void __init xen_init_irq_ops(void) { - pv_ops.irq =3D xen_irq_ops.irq; + /* Initial interrupt flag handling only called while interrupts off. */ + pv_ops.irq.save_fl =3D __PV_IS_CALLEE_SAVE(paravirt_ret0); + pv_ops.irq.irq_disable =3D __PV_IS_CALLEE_SAVE(paravirt_nop); + pv_ops.irq.irq_enable =3D __PV_IS_CALLEE_SAVE(BUG_func); + pv_ops.irq.safe_halt =3D xen_safe_halt; + pv_ops.irq.halt =3D xen_halt; + x86_init.irqs.intr_init =3D xen_init_IRQ; } diff --git a/tools/objtool/check.c b/tools/objtool/check.c index d14f20ef1db1..14ae91cc246a 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -593,7 +593,6 @@ static int init_pv_ops(struct objtool_file *file) static const char *pv_ops_tables[] =3D { "pv_ops", "xen_cpu_ops", - "xen_irq_ops", "xen_mmu_ops", NULL, }; --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0AAB432E72F for ; Wed, 17 Sep 2025 14:54:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120845; cv=none; b=JFk8OeNM8Pee9pxBrOFbnP3D46giZr2lnTV6McHYuTh/J3NtNBjYxR6Dc+Z4CAa2lIByAJGnUs2/mdmr7sXZzOGzkWiQqWJz8oF3ckrpc7v3+zqqTEkb3kRTQgKt1muFnruH4VgCMby3pCjVqv9WkiQB8/NckRINoEiC3ZN8mO8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120845; c=relaxed/simple; bh=2dSVmAT6pf6K/tKli03cHD9SNoWE8VVA05u0bvqnNDQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZlTXodmJkMtFuwmg+k5WJa0Ki+47HFWqUCsleE5N/DUPDEzti4me6wHTX8ubGGJNlVNfdgoBsuLoHAe1b4PXBOWimwZMWBrUrfHqya40dKzh1/j4AH3HgxOSh8Lad6jmsl3zxPDwzWPqprel4wbazvN8X7cUGZbpqwbsJIDgFg4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 5BF222073D; Wed, 17 Sep 2025 14:54:00 +0000 (UTC) Authentication-Results: smtp-out2.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 009E11368D; Wed, 17 Sep 2025 14:53:59 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id Ng47OofLymh3EwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:53:59 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v2 16/21] x86/xen: Drop xen_cpu_ops Date: Wed, 17 Sep 2025 16:52:15 +0200 Message-ID: <20250917145220.31064-17-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Level: X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 5BF222073D X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -4.00 Content-Type: text/plain; charset="utf-8" Instead of having a pre-filled array xen_cpu_ops for Xen PV paravirt functions, drop the array and assign each element individually. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/xen/enlighten_pv.c | 82 +++++++++++++++---------------------- tools/objtool/check.c | 1 - 2 files changed, 33 insertions(+), 50 deletions(-) diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 26bbaf4b7330..45ce2be41628 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1213,54 +1213,6 @@ static const struct pv_info xen_info __initconst =3D= { .name =3D "Xen", }; =20 -static const typeof(pv_ops) xen_cpu_ops __initconst =3D { - .cpu =3D { - .cpuid =3D xen_cpuid, - - .set_debugreg =3D xen_set_debugreg, - .get_debugreg =3D xen_get_debugreg, - - .read_cr0 =3D xen_read_cr0, - .write_cr0 =3D xen_write_cr0, - - .write_cr4 =3D xen_write_cr4, - - .read_msr =3D xen_read_msr, - .write_msr =3D xen_write_msr, - - .read_msr_safe =3D xen_read_msr_safe, - .write_msr_safe =3D xen_write_msr_safe, - - .read_pmc =3D xen_read_pmc, - - .load_tr_desc =3D paravirt_nop, - .set_ldt =3D xen_set_ldt, - .load_gdt =3D xen_load_gdt, - .load_idt =3D xen_load_idt, - .load_tls =3D xen_load_tls, - .load_gs_index =3D xen_load_gs_index, - - .alloc_ldt =3D xen_alloc_ldt, - .free_ldt =3D xen_free_ldt, - - .store_tr =3D xen_store_tr, - - .write_ldt_entry =3D xen_write_ldt_entry, - .write_gdt_entry =3D xen_write_gdt_entry, - .write_idt_entry =3D xen_write_idt_entry, - .load_sp0 =3D xen_load_sp0, - -#ifdef CONFIG_X86_IOPL_IOPERM - .invalidate_io_bitmap =3D xen_invalidate_io_bitmap, - .update_io_bitmap =3D xen_update_io_bitmap, -#endif - .io_delay =3D xen_io_delay, - - .start_context_switch =3D xen_start_context_switch, - .end_context_switch =3D xen_end_context_switch, - }, -}; - static void xen_restart(char *msg) { xen_reboot(SHUTDOWN_reboot); @@ -1411,7 +1363,39 @@ asmlinkage __visible void __init xen_start_kernel(st= ruct start_info *si) =20 /* Install Xen paravirt ops */ pv_info =3D xen_info; - pv_ops.cpu =3D xen_cpu_ops.cpu; + + pv_ops.cpu.cpuid =3D xen_cpuid; + pv_ops.cpu.set_debugreg =3D xen_set_debugreg; + pv_ops.cpu.get_debugreg =3D xen_get_debugreg; + pv_ops.cpu.read_cr0 =3D xen_read_cr0; + pv_ops.cpu.write_cr0 =3D xen_write_cr0; + pv_ops.cpu.write_cr4 =3D xen_write_cr4; + pv_ops.cpu.read_msr =3D xen_read_msr; + pv_ops.cpu.write_msr =3D xen_write_msr; + pv_ops.cpu.read_msr_safe =3D xen_read_msr_safe; + pv_ops.cpu.write_msr_safe =3D xen_write_msr_safe; + pv_ops.cpu.read_pmc =3D xen_read_pmc; + pv_ops.cpu.load_tr_desc =3D paravirt_nop; + pv_ops.cpu.set_ldt =3D xen_set_ldt; + pv_ops.cpu.load_gdt =3D xen_load_gdt; + pv_ops.cpu.load_idt =3D xen_load_idt; + pv_ops.cpu.load_tls =3D xen_load_tls; + pv_ops.cpu.load_gs_index =3D xen_load_gs_index; + pv_ops.cpu.alloc_ldt =3D xen_alloc_ldt; + pv_ops.cpu.free_ldt =3D xen_free_ldt; + pv_ops.cpu.store_tr =3D xen_store_tr; + pv_ops.cpu.write_ldt_entry =3D xen_write_ldt_entry; + pv_ops.cpu.write_gdt_entry =3D xen_write_gdt_entry; + pv_ops.cpu.write_idt_entry =3D xen_write_idt_entry; + pv_ops.cpu.load_sp0 =3D xen_load_sp0; +#ifdef CONFIG_X86_IOPL_IOPERM + pv_ops.cpu.invalidate_io_bitmap =3D xen_invalidate_io_bitmap; + pv_ops.cpu.update_io_bitmap =3D xen_update_io_bitmap; +#endif + pv_ops.cpu.io_delay =3D xen_io_delay; + pv_ops.cpu.start_context_switch =3D xen_start_context_switch; + pv_ops.cpu.end_context_switch =3D xen_end_context_switch; + xen_init_irq_ops(); =20 /* diff --git a/tools/objtool/check.c b/tools/objtool/check.c index 14ae91cc246a..c2a3079fe5f8 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -592,7 +592,6 @@ static int init_pv_ops(struct objtool_file *file) { static const char *pv_ops_tables[] =3D { "pv_ops", - "xen_cpu_ops", "xen_mmu_ops", NULL, }; --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24CAB32E72F for ; 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Wed, 17 Sep 2025 14:54:05 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v2 17/21] x86/xen: Drop xen_mmu_ops Date: Wed, 17 Sep 2025 16:52:16 +0200 Message-ID: <20250917145220.31064-18-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Level: X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 6AA9A219ED X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Score: -4.00 Content-Type: text/plain; charset="utf-8" Instead of having a pre-filled array xen_mmu_ops for Xen PV paravirt functions, drop the array and assign each element individually. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/xen/mmu_pv.c | 100 ++++++++++++++++-------------------------- tools/objtool/check.c | 1 - 2 files changed, 38 insertions(+), 63 deletions(-) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 2a4a8deaf612..9fa00c4a8858 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -2175,73 +2175,49 @@ static void xen_leave_lazy_mmu(void) preempt_enable(); } =20 -static const typeof(pv_ops) xen_mmu_ops __initconst =3D { - .mmu =3D { - .read_cr2 =3D __PV_IS_CALLEE_SAVE(xen_read_cr2), - .write_cr2 =3D xen_write_cr2, - - .read_cr3 =3D xen_read_cr3, - .write_cr3 =3D xen_write_cr3_init, - - .flush_tlb_user =3D xen_flush_tlb, - .flush_tlb_kernel =3D xen_flush_tlb, - .flush_tlb_one_user =3D xen_flush_tlb_one_user, - .flush_tlb_multi =3D xen_flush_tlb_multi, - - .pgd_alloc =3D xen_pgd_alloc, - .pgd_free =3D xen_pgd_free, - - .alloc_pte =3D xen_alloc_pte_init, - .release_pte =3D xen_release_pte_init, - .alloc_pmd =3D xen_alloc_pmd_init, - .release_pmd =3D xen_release_pmd_init, - - .set_pte =3D xen_set_pte_init, - .set_pmd =3D xen_set_pmd_hyper, - - .ptep_modify_prot_start =3D xen_ptep_modify_prot_start, - .ptep_modify_prot_commit =3D xen_ptep_modify_prot_commit, - - .pte_val =3D PV_CALLEE_SAVE(xen_pte_val), - .pgd_val =3D PV_CALLEE_SAVE(xen_pgd_val), - - .make_pte =3D PV_CALLEE_SAVE(xen_make_pte_init), - .make_pgd =3D PV_CALLEE_SAVE(xen_make_pgd), - - .set_pud =3D xen_set_pud_hyper, - - .make_pmd =3D PV_CALLEE_SAVE(xen_make_pmd), - .pmd_val =3D PV_CALLEE_SAVE(xen_pmd_val), - - .pud_val =3D PV_CALLEE_SAVE(xen_pud_val), - .make_pud =3D PV_CALLEE_SAVE(xen_make_pud), - .set_p4d =3D xen_set_p4d_hyper, - - .alloc_pud =3D xen_alloc_pmd_init, - .release_pud =3D xen_release_pmd_init, - - .p4d_val =3D PV_CALLEE_SAVE(xen_p4d_val), - .make_p4d =3D PV_CALLEE_SAVE(xen_make_p4d), - - .enter_mmap =3D xen_enter_mmap, - .exit_mmap =3D xen_exit_mmap, - - .lazy_mode =3D { - .enter =3D xen_enter_lazy_mmu, - .leave =3D xen_leave_lazy_mmu, - .flush =3D xen_flush_lazy_mmu, - }, - - .set_fixmap =3D xen_set_fixmap, - }, -}; - void __init xen_init_mmu_ops(void) { x86_init.paging.pagetable_init =3D xen_pagetable_init; x86_init.hyper.init_after_bootmem =3D xen_after_bootmem; =20 - pv_ops.mmu =3D xen_mmu_ops.mmu; + pv_ops.mmu.read_cr2 =3D __PV_IS_CALLEE_SAVE(xen_read_cr2); + pv_ops.mmu.write_cr2 =3D xen_write_cr2; + pv_ops.mmu.read_cr3 =3D xen_read_cr3; + pv_ops.mmu.write_cr3 =3D xen_write_cr3_init; + pv_ops.mmu.flush_tlb_user =3D xen_flush_tlb; + pv_ops.mmu.flush_tlb_kernel =3D xen_flush_tlb; + pv_ops.mmu.flush_tlb_one_user =3D xen_flush_tlb_one_user; + pv_ops.mmu.flush_tlb_multi =3D xen_flush_tlb_multi; + pv_ops.mmu.pgd_alloc =3D xen_pgd_alloc; + pv_ops.mmu.pgd_free =3D xen_pgd_free; + pv_ops.mmu.alloc_pte =3D xen_alloc_pte_init; + pv_ops.mmu.release_pte =3D xen_release_pte_init; + pv_ops.mmu.alloc_pmd =3D xen_alloc_pmd_init; + pv_ops.mmu.release_pmd =3D xen_release_pmd_init; + pv_ops.mmu.set_pte =3D xen_set_pte_init; + pv_ops.mmu.set_pmd =3D xen_set_pmd_hyper; + pv_ops.mmu.ptep_modify_prot_start =3D xen_ptep_modify_prot_start; + pv_ops.mmu.ptep_modify_prot_commit =3D xen_ptep_modify_prot_commit; + pv_ops.mmu.pte_val =3D PV_CALLEE_SAVE(xen_pte_val); + pv_ops.mmu.pgd_val =3D PV_CALLEE_SAVE(xen_pgd_val); + pv_ops.mmu.make_pte =3D PV_CALLEE_SAVE(xen_make_pte_init); + pv_ops.mmu.make_pgd =3D PV_CALLEE_SAVE(xen_make_pgd); + pv_ops.mmu.set_pud =3D xen_set_pud_hyper; + pv_ops.mmu.make_pmd =3D PV_CALLEE_SAVE(xen_make_pmd); + pv_ops.mmu.pmd_val =3D PV_CALLEE_SAVE(xen_pmd_val); + pv_ops.mmu.pud_val =3D PV_CALLEE_SAVE(xen_pud_val); + pv_ops.mmu.make_pud =3D PV_CALLEE_SAVE(xen_make_pud); + pv_ops.mmu.set_p4d =3D xen_set_p4d_hyper; + pv_ops.mmu.alloc_pud =3D xen_alloc_pmd_init; + pv_ops.mmu.release_pud =3D xen_release_pmd_init; + pv_ops.mmu.p4d_val =3D PV_CALLEE_SAVE(xen_p4d_val); + pv_ops.mmu.make_p4d =3D PV_CALLEE_SAVE(xen_make_p4d); + pv_ops.mmu.enter_mmap =3D xen_enter_mmap; + pv_ops.mmu.exit_mmap =3D xen_exit_mmap; + pv_ops.mmu.lazy_mode.enter =3D xen_enter_lazy_mmu; + pv_ops.mmu.lazy_mode.leave =3D xen_leave_lazy_mmu; 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REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCPT_COUNT_THREE(0.00)[4]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:mid]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" Having a single large pv_ops array has the main disadvantage of needing all prototypes of the single array members in one header file. This is adding up to the need to include lots of otherwise unrelated headers. In order to allow multiple smaller pv_ops arrays dedicated to one area of the kernel each, allow multiple arrays in objtool. For better performance limit the possible names of the arrays to start with "pv_ops". Signed-off-by: Juergen Gross --- V2: - new patch --- tools/objtool/arch/x86/decode.c | 8 ++- tools/objtool/check.c | 74 +++++++++++++++++++++------ tools/objtool/include/objtool/check.h | 2 + 3 files changed, 66 insertions(+), 18 deletions(-) diff --git a/tools/objtool/arch/x86/decode.c b/tools/objtool/arch/x86/decod= e.c index 98c4713c1b09..4117a2c6f486 100644 --- a/tools/objtool/arch/x86/decode.c +++ b/tools/objtool/arch/x86/decode.c @@ -649,10 +649,14 @@ int arch_decode_instruction(struct objtool_file *file= , const struct section *sec immr =3D find_reloc_by_dest(elf, (void *)sec, offset+3); disp =3D find_reloc_by_dest(elf, (void *)sec, offset+7); =20 - if (!immr || strcmp(immr->sym->name, "pv_ops")) + if (!immr || strncmp(immr->sym->name, "pv_ops", 6)) break; =20 - idx =3D (reloc_addend(immr) + 8) / sizeof(void *); + idx =3D pv_ops_idx_off(immr->sym->name); + if (idx < 0) + break; + + idx +=3D (reloc_addend(immr) + 8) / sizeof(void *); =20 func =3D disp->sym; if (disp->sym->type =3D=3D STT_SECTION) diff --git a/tools/objtool/check.c b/tools/objtool/check.c index e2736b462c90..ca6ad92618d8 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -542,21 +542,57 @@ static int decode_instructions(struct objtool_file *f= ile) } =20 /* - * Read the pv_ops[] .data table to find the static initialized values. + * Known pv_ops*[] arrays. */ -static int add_pv_ops(struct objtool_file *file, const char *symname) +static struct { + const char *name; + int idx_off; +} pv_ops_tables[] =3D { + { .name =3D "pv_ops", }, + { .name =3D NULL, .idx_off =3D -1 } +}; + +/* + * Get index offset for a pv_ops* array. + */ +int pv_ops_idx_off(const char *symname) +{ + int idx; + + for (idx =3D 0; pv_ops_tables[idx].name; idx++) { + if (!strcmp(symname, pv_ops_tables[idx].name)) + break; + } + + return pv_ops_tables[idx].idx_off; +} + +/* + * Read a pv_ops*[] .data table to find the static initialized values. + */ +static int add_pv_ops(struct objtool_file *file, int pv_ops_idx) { struct symbol *sym, *func; unsigned long off, end; struct reloc *reloc; - int idx; + int idx, idx_off; + const char *symname; =20 + symname =3D pv_ops_tables[pv_ops_idx].name; sym =3D find_symbol_by_name(file->elf, symname); - if (!sym) - return 0; + if (!sym) { + ERROR("Unknown pv_ops array %s", symname); + return -1; + } =20 off =3D sym->offset; end =3D off + sym->len; + idx_off =3D pv_ops_tables[pv_ops_idx].idx_off; + if (idx_off < 0) { + ERROR("pv_ops array %s has unknown index offset", symname); + return -1; + } + for (;;) { reloc =3D find_reloc_by_dest_range(file->elf, sym->sec, off, end - off); if (!reloc) @@ -574,7 +610,7 @@ static int add_pv_ops(struct objtool_file *file, const = char *symname) return -1; } =20 - if (objtool_pv_add(file, idx, func)) + if (objtool_pv_add(file, idx + idx_off, func)) return -1; =20 off =3D reloc_offset(reloc) + 1; @@ -590,11 +626,6 @@ static int add_pv_ops(struct objtool_file *file, const= char *symname) */ static int init_pv_ops(struct objtool_file *file) { - static const char *pv_ops_tables[] =3D { - "pv_ops", - NULL, - }; - const char *pv_ops; struct symbol *sym; int idx, nr, ret; =20 @@ -603,11 +634,20 @@ static int init_pv_ops(struct objtool_file *file) =20 file->pv_ops =3D NULL; =20 - sym =3D find_symbol_by_name(file->elf, "pv_ops"); - if (!sym) + nr =3D 0; + for (idx =3D 0; pv_ops_tables[idx].name; idx++) { + sym =3D find_symbol_by_name(file->elf, pv_ops_tables[idx].name); + if (!sym) { + pv_ops_tables[idx].idx_off =3D -1; + continue; + } + pv_ops_tables[idx].idx_off =3D nr; + nr +=3D sym->len / sizeof(unsigned long); + } + + if (nr =3D=3D 0) return 0; =20 - nr =3D sym->len / sizeof(unsigned long); file->pv_ops =3D calloc(sizeof(struct pv_state), nr); if (!file->pv_ops) { ERROR_GLIBC("calloc"); @@ -617,8 +657,10 @@ static int init_pv_ops(struct objtool_file *file) for (idx =3D 0; idx < nr; idx++) INIT_LIST_HEAD(&file->pv_ops[idx].targets); =20 - for (idx =3D 0; (pv_ops =3D pv_ops_tables[idx]); idx++) { - ret =3D add_pv_ops(file, pv_ops); + for (idx =3D 0; pv_ops_tables[idx].name; idx++) { + if (pv_ops_tables[idx].idx_off < 0) + continue; + ret =3D add_pv_ops(file, idx); if (ret) return ret; } diff --git a/tools/objtool/include/objtool/check.h b/tools/objtool/include/= objtool/check.h index 00fb745e7233..51f2396c5943 100644 --- a/tools/objtool/include/objtool/check.h +++ b/tools/objtool/include/objtool/check.h @@ -125,4 +125,6 @@ struct instruction *next_insn_same_sec(struct objtool_f= ile *file, struct instruc insn && insn->sec =3D=3D _sec; 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Peter Anvin" Subject: [PATCH v2 19/21] x86/paravirt: Allow pv-calls outside paravirt.h Date: Wed, 17 Sep 2025 16:52:18 +0200 Message-ID: <20250917145220.31064-20-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:mid]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[12]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" In order to prepare for defining paravirt functions outside of paravirt.h, don't #undef the paravirt call macros. Signed-off-by: Juergen Gross --- arch/x86/include/asm/paravirt.h | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 62399f5d037d..ba6b14b6f36a 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -588,22 +588,6 @@ static __always_inline unsigned long arch_local_irq_sa= ve(void) } #endif =20 - -/* Make sure as little as possible of this mess escapes. */ -#undef PARAVIRT_CALL -#undef __PVOP_CALL -#undef __PVOP_VCALL -#undef PVOP_VCALL0 -#undef PVOP_CALL0 -#undef PVOP_VCALL1 -#undef PVOP_CALL1 -#undef PVOP_VCALL2 -#undef PVOP_CALL2 -#undef PVOP_VCALL3 -#undef PVOP_CALL3 -#undef PVOP_VCALL4 -#undef PVOP_CALL4 - void native_pv_lock_init(void) __init; =20 #else /* __ASSEMBLER__ */ --=20 2.51.0 From nobody Thu Oct 2 10:58:01 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C913C333ABC for ; Wed, 17 Sep 2025 14:54:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120871; cv=none; b=NGmbzIQ0xGOGxtP/ArBN7J6shsANqOaqxdjZpKjOGDDoeaV8akHwJdGf95umvTdiJ39IrpOTTiQCnY+newRolMV0ANhM6Hfi9VxRpjN3vnH3Qdhe4AjUfXGQdGldOudn8GxaelfNbYnwj9U/eXfBAYT2VO6Kfiy6pYGhdx1y1ZI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758120871; c=relaxed/simple; bh=k38cYc1Ip9S/bqj4xsIIBTbOHiwesPhXlvxcbLMeoeY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ruW49wrbBs3CZPNYtO7wYCpRPSTJEdBgvPAyc+hgt2mb47K1Xt87bd0uccEh+4m2rkOp+1+C0PaOOxVhN/iREbfV6rRA66q2WQxfTkSdIoaLk/dpKZNJwhLb2CYGPwC43eU+mFKKENcdqdkXGK7TH1lpKkhglAcWjXmsEegnPkc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=XHrWM/Ww; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=XHrWM/Ww; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="XHrWM/Ww"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="XHrWM/Ww" Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id A0B4822801; Wed, 17 Sep 2025 14:54:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1758120863; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/aImX120WIX3OxAQ8XVXjQ/wotZtRL1VJpjpoDvr/EQ=; b=XHrWM/WwiA+l6tNwDlybR+tcfGKoi09un7IyA62x2qkqoo6q22ZSHaWogSD9ZrnvmRSEya un/ryC/409Nl20L/WbQPrWIiTKKSucu+D2AiZiOCzJNhDwFz+cWNF8UywUWaG3ey8dVSEH VBAhQt2dOTGoyMHGGRfrt1liKBL6u04= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1758120863; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/aImX120WIX3OxAQ8XVXjQ/wotZtRL1VJpjpoDvr/EQ=; b=XHrWM/WwiA+l6tNwDlybR+tcfGKoi09un7IyA62x2qkqoo6q22ZSHaWogSD9ZrnvmRSEya un/ryC/409Nl20L/WbQPrWIiTKKSucu+D2AiZiOCzJNhDwFz+cWNF8UywUWaG3ey8dVSEH VBAhQt2dOTGoyMHGGRfrt1liKBL6u04= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 3AB371368D; Wed, 17 Sep 2025 14:54:23 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 8Em/DJ/LymiWEwAAD6G6ig (envelope-from ); Wed, 17 Sep 2025 14:54:23 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH v2 20/21] x86/paravirt: Specify pv_ops array in paravirt macros Date: Wed, 17 Sep 2025 16:52:19 +0200 Message-ID: <20250917145220.31064-21-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:mid,suse.com:email]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[12]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Level: X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" In order to prepare having multiple pv_ops arrays, specify the array in the paravirt macros. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/include/asm/paravirt.h | 166 +++++++++++++------------- arch/x86/include/asm/paravirt_types.h | 140 +++++++++++----------- 2 files changed, 153 insertions(+), 153 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index ba6b14b6f36a..ec274d13bae0 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -31,11 +31,11 @@ void __init paravirt_set_cap(void); /* The paravirtualized I/O functions */ static inline void slow_down_io(void) { - PVOP_VCALL0(cpu.io_delay); + PVOP_VCALL0(pv_ops, cpu.io_delay); #ifdef REALLY_SLOW_IO - PVOP_VCALL0(cpu.io_delay); - PVOP_VCALL0(cpu.io_delay); - PVOP_VCALL0(cpu.io_delay); + PVOP_VCALL0(pv_ops, cpu.io_delay); + PVOP_VCALL0(pv_ops, cpu.io_delay); + PVOP_VCALL0(pv_ops, cpu.io_delay); #endif } =20 @@ -47,57 +47,57 @@ void native_flush_tlb_multi(const struct cpumask *cpuma= sk, =20 static inline void __flush_tlb_local(void) { - PVOP_VCALL0(mmu.flush_tlb_user); + PVOP_VCALL0(pv_ops, mmu.flush_tlb_user); } =20 static inline void __flush_tlb_global(void) { - PVOP_VCALL0(mmu.flush_tlb_kernel); + PVOP_VCALL0(pv_ops, mmu.flush_tlb_kernel); } =20 static inline void __flush_tlb_one_user(unsigned long addr) { - PVOP_VCALL1(mmu.flush_tlb_one_user, addr); + PVOP_VCALL1(pv_ops, mmu.flush_tlb_one_user, addr); } =20 static inline void __flush_tlb_multi(const struct cpumask *cpumask, const struct flush_tlb_info *info) { - PVOP_VCALL2(mmu.flush_tlb_multi, cpumask, info); + PVOP_VCALL2(pv_ops, mmu.flush_tlb_multi, cpumask, info); } =20 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm) { - PVOP_VCALL1(mmu.exit_mmap, mm); + PVOP_VCALL1(pv_ops, mmu.exit_mmap, mm); } =20 static inline void notify_page_enc_status_changed(unsigned long pfn, int npages, bool enc) { - PVOP_VCALL3(mmu.notify_page_enc_status_changed, pfn, npages, enc); + PVOP_VCALL3(pv_ops, mmu.notify_page_enc_status_changed, pfn, npages, enc); } =20 static __always_inline void arch_safe_halt(void) { - PVOP_VCALL0(irq.safe_halt); + PVOP_VCALL0(pv_ops, irq.safe_halt); } =20 static inline void halt(void) { - PVOP_VCALL0(irq.halt); + PVOP_VCALL0(pv_ops, irq.halt); } =20 #ifdef CONFIG_PARAVIRT_XXL static inline void load_sp0(unsigned long sp0) { - PVOP_VCALL1(cpu.load_sp0, sp0); + PVOP_VCALL1(pv_ops, cpu.load_sp0, sp0); } =20 /* The paravirtualized CPUID instruction. */ static inline void __cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx) { - PVOP_VCALL4(cpu.cpuid, eax, ebx, ecx, edx); + PVOP_VCALL4(pv_ops, cpu.cpuid, eax, ebx, ecx, edx); } =20 /* @@ -105,69 +105,69 @@ static inline void __cpuid(unsigned int *eax, unsigne= d int *ebx, */ static __always_inline unsigned long paravirt_get_debugreg(int reg) { - return PVOP_CALL1(unsigned long, cpu.get_debugreg, reg); + return PVOP_CALL1(unsigned long, pv_ops, cpu.get_debugreg, reg); } #define get_debugreg(var, reg) var =3D paravirt_get_debugreg(reg) static __always_inline void set_debugreg(unsigned long val, int reg) { - PVOP_VCALL2(cpu.set_debugreg, reg, val); + PVOP_VCALL2(pv_ops, cpu.set_debugreg, reg, val); } =20 static inline unsigned long read_cr0(void) { - return PVOP_CALL0(unsigned long, cpu.read_cr0); + return PVOP_CALL0(unsigned long, pv_ops, cpu.read_cr0); } =20 static inline void write_cr0(unsigned long x) { - PVOP_VCALL1(cpu.write_cr0, x); + PVOP_VCALL1(pv_ops, cpu.write_cr0, x); } =20 static __always_inline unsigned long read_cr2(void) { - return PVOP_ALT_CALLEE0(unsigned long, mmu.read_cr2, + return PVOP_ALT_CALLEE0(unsigned long, pv_ops, mmu.read_cr2, "mov %%cr2, %%rax;", ALT_NOT_XEN); } =20 static __always_inline void write_cr2(unsigned long x) { - PVOP_VCALL1(mmu.write_cr2, x); + PVOP_VCALL1(pv_ops, mmu.write_cr2, x); } =20 static inline unsigned long __read_cr3(void) { - return PVOP_ALT_CALL0(unsigned long, mmu.read_cr3, + return PVOP_ALT_CALL0(unsigned long, pv_ops, mmu.read_cr3, "mov %%cr3, %%rax;", ALT_NOT_XEN); } =20 static inline void write_cr3(unsigned long x) { - PVOP_ALT_VCALL1(mmu.write_cr3, x, "mov %%rdi, %%cr3", ALT_NOT_XEN); + PVOP_ALT_VCALL1(pv_ops, mmu.write_cr3, x, "mov %%rdi, %%cr3", ALT_NOT_XEN= ); } =20 static inline void __write_cr4(unsigned long x) { - PVOP_VCALL1(cpu.write_cr4, x); + PVOP_VCALL1(pv_ops, cpu.write_cr4, x); } =20 static inline u64 paravirt_read_msr(u32 msr) { - return PVOP_CALL1(u64, cpu.read_msr, msr); + return PVOP_CALL1(u64, pv_ops, cpu.read_msr, msr); } =20 static inline void paravirt_write_msr(u32 msr, u64 val) { - PVOP_VCALL2(cpu.write_msr, msr, val); + PVOP_VCALL2(pv_ops, cpu.write_msr, msr, val); } =20 static inline int paravirt_read_msr_safe(u32 msr, u64 *val) { - return PVOP_CALL2(int, cpu.read_msr_safe, msr, val); + return PVOP_CALL2(int, pv_ops, cpu.read_msr_safe, msr, val); } =20 static inline int paravirt_write_msr_safe(u32 msr, u64 val) { - return PVOP_CALL2(int, cpu.write_msr_safe, msr, val); + return PVOP_CALL2(int, pv_ops, cpu.write_msr_safe, msr, val); } =20 #define rdmsr(msr, val1, val2) \ @@ -214,154 +214,154 @@ static __always_inline int rdmsrq_safe(u32 msr, u64= *p) =20 static __always_inline u64 rdpmc(int counter) { - return PVOP_CALL1(u64, cpu.read_pmc, counter); + return PVOP_CALL1(u64, pv_ops, cpu.read_pmc, counter); } =20 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned en= tries) { - PVOP_VCALL2(cpu.alloc_ldt, ldt, entries); + PVOP_VCALL2(pv_ops, cpu.alloc_ldt, ldt, entries); } =20 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned ent= ries) { - PVOP_VCALL2(cpu.free_ldt, ldt, entries); + PVOP_VCALL2(pv_ops, cpu.free_ldt, ldt, entries); } =20 static inline void load_TR_desc(void) { - PVOP_VCALL0(cpu.load_tr_desc); + PVOP_VCALL0(pv_ops, cpu.load_tr_desc); } static inline void load_gdt(const struct desc_ptr *dtr) { - PVOP_VCALL1(cpu.load_gdt, dtr); + PVOP_VCALL1(pv_ops, cpu.load_gdt, dtr); } static inline void load_idt(const struct desc_ptr *dtr) { - PVOP_VCALL1(cpu.load_idt, dtr); + PVOP_VCALL1(pv_ops, cpu.load_idt, dtr); } static inline void set_ldt(const void *addr, unsigned entries) { - PVOP_VCALL2(cpu.set_ldt, addr, entries); + PVOP_VCALL2(pv_ops, cpu.set_ldt, addr, entries); } static inline unsigned long paravirt_store_tr(void) { - return PVOP_CALL0(unsigned long, cpu.store_tr); + return PVOP_CALL0(unsigned long, pv_ops, cpu.store_tr); } =20 #define store_tr(tr) ((tr) =3D paravirt_store_tr()) static inline void load_TLS(struct thread_struct *t, unsigned cpu) { - PVOP_VCALL2(cpu.load_tls, t, cpu); + PVOP_VCALL2(pv_ops, cpu.load_tls, t, cpu); } =20 static inline void load_gs_index(unsigned int gs) { - PVOP_VCALL1(cpu.load_gs_index, gs); + PVOP_VCALL1(pv_ops, cpu.load_gs_index, gs); } =20 static inline void write_ldt_entry(struct desc_struct *dt, int entry, const void *desc) { - PVOP_VCALL3(cpu.write_ldt_entry, dt, entry, desc); + PVOP_VCALL3(pv_ops, cpu.write_ldt_entry, dt, entry, desc); } =20 static inline void write_gdt_entry(struct desc_struct *dt, int entry, void *desc, int type) { - PVOP_VCALL4(cpu.write_gdt_entry, dt, entry, desc, type); + PVOP_VCALL4(pv_ops, cpu.write_gdt_entry, dt, entry, desc, type); } =20 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_de= sc *g) { - PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g); + PVOP_VCALL3(pv_ops, cpu.write_idt_entry, dt, entry, g); } =20 #ifdef CONFIG_X86_IOPL_IOPERM static inline void tss_invalidate_io_bitmap(void) { - PVOP_VCALL0(cpu.invalidate_io_bitmap); + PVOP_VCALL0(pv_ops, cpu.invalidate_io_bitmap); } =20 static inline void tss_update_io_bitmap(void) { - PVOP_VCALL0(cpu.update_io_bitmap); + PVOP_VCALL0(pv_ops, cpu.update_io_bitmap); } #endif =20 static inline void paravirt_enter_mmap(struct mm_struct *next) { - PVOP_VCALL1(mmu.enter_mmap, next); + PVOP_VCALL1(pv_ops, mmu.enter_mmap, next); } =20 static inline int paravirt_pgd_alloc(struct mm_struct *mm) { - return PVOP_CALL1(int, mmu.pgd_alloc, mm); + return PVOP_CALL1(int, pv_ops, mmu.pgd_alloc, mm); } =20 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd) { - PVOP_VCALL2(mmu.pgd_free, mm, pgd); + PVOP_VCALL2(pv_ops, mmu.pgd_free, mm, pgd); } =20 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long = pfn) { - PVOP_VCALL2(mmu.alloc_pte, mm, pfn); + PVOP_VCALL2(pv_ops, mmu.alloc_pte, mm, pfn); } static inline void paravirt_release_pte(unsigned long pfn) { - PVOP_VCALL1(mmu.release_pte, pfn); + PVOP_VCALL1(pv_ops, mmu.release_pte, pfn); } =20 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long = pfn) { - PVOP_VCALL2(mmu.alloc_pmd, mm, pfn); + PVOP_VCALL2(pv_ops, mmu.alloc_pmd, mm, pfn); } =20 static inline void paravirt_release_pmd(unsigned long pfn) { - PVOP_VCALL1(mmu.release_pmd, pfn); + PVOP_VCALL1(pv_ops, mmu.release_pmd, pfn); } =20 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long = pfn) { - PVOP_VCALL2(mmu.alloc_pud, mm, pfn); + PVOP_VCALL2(pv_ops, mmu.alloc_pud, mm, pfn); } static inline void paravirt_release_pud(unsigned long pfn) { - PVOP_VCALL1(mmu.release_pud, pfn); + PVOP_VCALL1(pv_ops, mmu.release_pud, pfn); } =20 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long = pfn) { - PVOP_VCALL2(mmu.alloc_p4d, mm, pfn); + PVOP_VCALL2(pv_ops, mmu.alloc_p4d, mm, pfn); } =20 static inline void paravirt_release_p4d(unsigned long pfn) { - PVOP_VCALL1(mmu.release_p4d, pfn); + PVOP_VCALL1(pv_ops, mmu.release_p4d, pfn); } =20 static inline pte_t __pte(pteval_t val) { - return (pte_t) { PVOP_ALT_CALLEE1(pteval_t, mmu.make_pte, val, + return (pte_t) { PVOP_ALT_CALLEE1(pteval_t, pv_ops, mmu.make_pte, val, "mov %%rdi, %%rax", ALT_NOT_XEN) }; } =20 static inline pteval_t pte_val(pte_t pte) { - return PVOP_ALT_CALLEE1(pteval_t, mmu.pte_val, pte.pte, + return PVOP_ALT_CALLEE1(pteval_t, pv_ops, mmu.pte_val, pte.pte, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 static inline pgd_t __pgd(pgdval_t val) { - return (pgd_t) { PVOP_ALT_CALLEE1(pgdval_t, mmu.make_pgd, val, + return (pgd_t) { PVOP_ALT_CALLEE1(pgdval_t, pv_ops, mmu.make_pgd, val, "mov %%rdi, %%rax", ALT_NOT_XEN) }; } =20 static inline pgdval_t pgd_val(pgd_t pgd) { - return PVOP_ALT_CALLEE1(pgdval_t, mmu.pgd_val, pgd.pgd, + return PVOP_ALT_CALLEE1(pgdval_t, pv_ops, mmu.pgd_val, pgd.pgd, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 @@ -371,7 +371,7 @@ static inline pte_t ptep_modify_prot_start(struct vm_ar= ea_struct *vma, unsigned { pteval_t ret; =20 - ret =3D PVOP_CALL3(pteval_t, mmu.ptep_modify_prot_start, vma, addr, ptep); + ret =3D PVOP_CALL3(pteval_t, pv_ops, mmu.ptep_modify_prot_start, vma, add= r, ptep); =20 return (pte_t) { .pte =3D ret }; } @@ -380,41 +380,41 @@ static inline void ptep_modify_prot_commit(struct vm_= area_struct *vma, unsigned pte_t *ptep, pte_t old_pte, pte_t pte) { =20 - PVOP_VCALL4(mmu.ptep_modify_prot_commit, vma, addr, ptep, pte.pte); + PVOP_VCALL4(pv_ops, mmu.ptep_modify_prot_commit, vma, addr, ptep, pte.pte= ); } =20 static inline void set_pte(pte_t *ptep, pte_t pte) { - PVOP_VCALL2(mmu.set_pte, ptep, pte.pte); + PVOP_VCALL2(pv_ops, mmu.set_pte, ptep, pte.pte); } =20 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) { - PVOP_VCALL2(mmu.set_pmd, pmdp, native_pmd_val(pmd)); + PVOP_VCALL2(pv_ops, mmu.set_pmd, pmdp, native_pmd_val(pmd)); } =20 static inline pmd_t __pmd(pmdval_t val) { - return (pmd_t) { PVOP_ALT_CALLEE1(pmdval_t, mmu.make_pmd, val, + return (pmd_t) { PVOP_ALT_CALLEE1(pmdval_t, pv_ops, mmu.make_pmd, val, "mov %%rdi, %%rax", ALT_NOT_XEN) }; } =20 static inline pmdval_t pmd_val(pmd_t pmd) { - return PVOP_ALT_CALLEE1(pmdval_t, mmu.pmd_val, pmd.pmd, + return PVOP_ALT_CALLEE1(pmdval_t, pv_ops, mmu.pmd_val, pmd.pmd, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 static inline void set_pud(pud_t *pudp, pud_t pud) { - PVOP_VCALL2(mmu.set_pud, pudp, native_pud_val(pud)); + PVOP_VCALL2(pv_ops, mmu.set_pud, pudp, native_pud_val(pud)); } =20 static inline pud_t __pud(pudval_t val) { pudval_t ret; =20 - ret =3D PVOP_ALT_CALLEE1(pudval_t, mmu.make_pud, val, + ret =3D PVOP_ALT_CALLEE1(pudval_t, pv_ops, mmu.make_pud, val, "mov %%rdi, %%rax", ALT_NOT_XEN); =20 return (pud_t) { ret }; @@ -422,7 +422,7 @@ static inline pud_t __pud(pudval_t val) =20 static inline pudval_t pud_val(pud_t pud) { - return PVOP_ALT_CALLEE1(pudval_t, mmu.pud_val, pud.pud, + return PVOP_ALT_CALLEE1(pudval_t, pv_ops, mmu.pud_val, pud.pud, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 @@ -435,12 +435,12 @@ static inline void set_p4d(p4d_t *p4dp, p4d_t p4d) { p4dval_t val =3D native_p4d_val(p4d); =20 - PVOP_VCALL2(mmu.set_p4d, p4dp, val); + PVOP_VCALL2(pv_ops, mmu.set_p4d, p4dp, val); } =20 static inline p4d_t __p4d(p4dval_t val) { - p4dval_t ret =3D PVOP_ALT_CALLEE1(p4dval_t, mmu.make_p4d, val, + p4dval_t ret =3D PVOP_ALT_CALLEE1(p4dval_t, pv_ops, mmu.make_p4d, val, "mov %%rdi, %%rax", ALT_NOT_XEN); =20 return (p4d_t) { ret }; @@ -448,13 +448,13 @@ static inline p4d_t __p4d(p4dval_t val) =20 static inline p4dval_t p4d_val(p4d_t p4d) { - return PVOP_ALT_CALLEE1(p4dval_t, mmu.p4d_val, p4d.p4d, + return PVOP_ALT_CALLEE1(p4dval_t, pv_ops, mmu.p4d_val, p4d.p4d, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd) { - PVOP_VCALL2(mmu.set_pgd, pgdp, native_pgd_val(pgd)); + PVOP_VCALL2(pv_ops, mmu.set_pgd, pgdp, native_pgd_val(pgd)); } =20 #define set_pgd(pgdp, pgdval) do { \ @@ -493,28 +493,28 @@ static inline void pmd_clear(pmd_t *pmdp) #define __HAVE_ARCH_START_CONTEXT_SWITCH static inline void arch_start_context_switch(struct task_struct *prev) { - PVOP_VCALL1(cpu.start_context_switch, prev); + PVOP_VCALL1(pv_ops, cpu.start_context_switch, prev); } =20 static inline void arch_end_context_switch(struct task_struct *next) { - PVOP_VCALL1(cpu.end_context_switch, next); + PVOP_VCALL1(pv_ops, cpu.end_context_switch, next); } =20 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE static inline void arch_enter_lazy_mmu_mode(void) { - PVOP_VCALL0(mmu.lazy_mode.enter); + PVOP_VCALL0(pv_ops, mmu.lazy_mode.enter); } =20 static inline void arch_leave_lazy_mmu_mode(void) { - PVOP_VCALL0(mmu.lazy_mode.leave); + PVOP_VCALL0(pv_ops, mmu.lazy_mode.leave); } =20 static inline void arch_flush_lazy_mmu_mode(void) { - PVOP_VCALL0(mmu.lazy_mode.flush); + PVOP_VCALL0(pv_ops, mmu.lazy_mode.flush); } =20 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, @@ -529,29 +529,29 @@ static inline void __set_fixmap(unsigned /* enum fixe= d_addresses */ idx, static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock = *lock, u32 val) { - PVOP_VCALL2(lock.queued_spin_lock_slowpath, lock, val); + PVOP_VCALL2(pv_ops, lock.queued_spin_lock_slowpath, lock, val); } =20 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock) { - PVOP_ALT_VCALLEE1(lock.queued_spin_unlock, lock, + PVOP_ALT_VCALLEE1(pv_ops, lock.queued_spin_unlock, lock, "movb $0, (%%" _ASM_ARG1 ");", ALT_NOT(X86_FEATURE_PVUNLOCK)); } =20 static __always_inline void pv_wait(u8 *ptr, u8 val) { - PVOP_VCALL2(lock.wait, ptr, val); + PVOP_VCALL2(pv_ops, lock.wait, ptr, val); } =20 static __always_inline void pv_kick(int cpu) { - PVOP_VCALL1(lock.kick, cpu); + PVOP_VCALL1(pv_ops, lock.kick, cpu); } =20 static __always_inline bool pv_vcpu_is_preempted(long cpu) { - return PVOP_ALT_CALLEE1(bool, lock.vcpu_is_preempted, cpu, + return PVOP_ALT_CALLEE1(bool, pv_ops, lock.vcpu_is_preempted, cpu, "xor %%" _ASM_AX ", %%" _ASM_AX ";", ALT_NOT(X86_FEATURE_VCPUPREEMPT)); } @@ -564,18 +564,18 @@ bool __raw_callee_save___native_vcpu_is_preempted(lon= g cpu); #ifdef CONFIG_PARAVIRT_XXL static __always_inline unsigned long arch_local_save_flags(void) { - return PVOP_ALT_CALLEE0(unsigned long, irq.save_fl, "pushf; pop %%rax;", + return PVOP_ALT_CALLEE0(unsigned long, pv_ops, irq.save_fl, "pushf; pop %= %rax;", ALT_NOT_XEN); } =20 static __always_inline void arch_local_irq_disable(void) { - PVOP_ALT_VCALLEE0(irq.irq_disable, "cli;", ALT_NOT_XEN); + PVOP_ALT_VCALLEE0(pv_ops, irq.irq_disable, "cli;", ALT_NOT_XEN); } =20 static __always_inline void arch_local_irq_enable(void) { - PVOP_ALT_VCALLEE0(irq.irq_enable, "sti;", ALT_NOT_XEN); + PVOP_ALT_VCALLEE0(pv_ops, irq.irq_enable, "sti;", ALT_NOT_XEN); } =20 static __always_inline unsigned long arch_local_irq_save(void) diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 1e50f13e6543..01a485f1a7f1 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -212,7 +212,7 @@ struct paravirt_patch_template { =20 extern struct paravirt_patch_template pv_ops; =20 -#define paravirt_ptr(op) [paravirt_opptr] "m" (pv_ops.op) +#define paravirt_ptr(array, op) [paravirt_opptr] "m" (array.op) =20 /* * This generates an indirect call based on the operation type number. @@ -362,19 +362,19 @@ extern struct paravirt_patch_template pv_ops; * feature is not active, the direct call is used as above via the * ALT_FLAG_DIRECT_CALL special case and the "always on" feature. */ -#define ____PVOP_CALL(ret, op, call_clbr, extra_clbr, ...) \ +#define ____PVOP_CALL(ret, array, op, call_clbr, extra_clbr, ...) \ ({ \ PVOP_CALL_ARGS; \ asm volatile(ALTERNATIVE(PARAVIRT_CALL, ALT_CALL_INSTR, \ ALT_CALL_ALWAYS) \ : call_clbr, ASM_CALL_CONSTRAINT \ - : paravirt_ptr(op), \ + : paravirt_ptr(array, op), \ ##__VA_ARGS__ \ : "memory", "cc" extra_clbr); \ ret; \ }) =20 -#define ____PVOP_ALT_CALL(ret, op, alt, cond, call_clbr, \ +#define ____PVOP_ALT_CALL(ret, array, op, alt, cond, call_clbr, \ extra_clbr, ...) \ ({ \ PVOP_CALL_ARGS; \ @@ -382,102 +382,102 @@ extern struct paravirt_patch_template pv_ops; ALT_CALL_INSTR, ALT_CALL_ALWAYS, \ alt, cond) \ : call_clbr, ASM_CALL_CONSTRAINT \ - : paravirt_ptr(op), \ + : paravirt_ptr(array, op), \ ##__VA_ARGS__ \ : "memory", "cc" extra_clbr); \ ret; \ }) =20 -#define __PVOP_CALL(rettype, op, ...) \ - ____PVOP_CALL(PVOP_RETVAL(rettype), op, \ +#define __PVOP_CALL(rettype, array, op, ...) \ + ____PVOP_CALL(PVOP_RETVAL(rettype), array, op, \ PVOP_CALL_CLOBBERS, EXTRA_CLOBBERS, ##__VA_ARGS__) =20 -#define __PVOP_ALT_CALL(rettype, op, alt, cond, ...) \ - ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), op, alt, cond, \ +#define __PVOP_ALT_CALL(rettype, array, op, alt, cond, ...) \ + ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), array, op, alt, cond, \ PVOP_CALL_CLOBBERS, EXTRA_CLOBBERS, \ ##__VA_ARGS__) =20 -#define __PVOP_CALLEESAVE(rettype, op, ...) \ - ____PVOP_CALL(PVOP_RETVAL(rettype), op.func, \ +#define __PVOP_CALLEESAVE(rettype, array, op, ...) \ + ____PVOP_CALL(PVOP_RETVAL(rettype), array, op.func, \ PVOP_CALLEE_CLOBBERS, , ##__VA_ARGS__) =20 -#define __PVOP_ALT_CALLEESAVE(rettype, op, alt, cond, ...) \ - ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), op.func, alt, cond, \ +#define __PVOP_ALT_CALLEESAVE(rettype, array, op, alt, cond, ...) \ + ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), array, op.func, alt, cond, \ PVOP_CALLEE_CLOBBERS, , ##__VA_ARGS__) =20 =20 -#define __PVOP_VCALL(op, ...) \ - (void)____PVOP_CALL(, op, PVOP_VCALL_CLOBBERS, \ +#define __PVOP_VCALL(array, op, ...) \ + (void)____PVOP_CALL(, array, op, PVOP_VCALL_CLOBBERS, \ VEXTRA_CLOBBERS, ##__VA_ARGS__) =20 -#define __PVOP_ALT_VCALL(op, alt, cond, ...) \ - (void)____PVOP_ALT_CALL(, op, alt, cond, \ +#define __PVOP_ALT_VCALL(array, op, alt, cond, ...) \ + (void)____PVOP_ALT_CALL(, array, op, alt, cond, \ PVOP_VCALL_CLOBBERS, VEXTRA_CLOBBERS, \ ##__VA_ARGS__) =20 -#define __PVOP_VCALLEESAVE(op, ...) \ - (void)____PVOP_CALL(, op.func, \ +#define __PVOP_VCALLEESAVE(array, op, ...) \ + (void)____PVOP_CALL(, array, op.func, \ PVOP_VCALLEE_CLOBBERS, , ##__VA_ARGS__) =20 -#define __PVOP_ALT_VCALLEESAVE(op, alt, cond, ...) \ - (void)____PVOP_ALT_CALL(, op.func, alt, cond, \ +#define __PVOP_ALT_VCALLEESAVE(array, op, alt, cond, ...) \ + (void)____PVOP_ALT_CALL(, array, op.func, alt, cond, \ PVOP_VCALLEE_CLOBBERS, , ##__VA_ARGS__) =20 =20 -#define PVOP_CALL0(rettype, op) \ - __PVOP_CALL(rettype, op) -#define PVOP_VCALL0(op) \ - __PVOP_VCALL(op) -#define PVOP_ALT_CALL0(rettype, op, alt, cond) \ - __PVOP_ALT_CALL(rettype, op, alt, cond) -#define PVOP_ALT_VCALL0(op, alt, cond) \ - __PVOP_ALT_VCALL(op, alt, cond) - -#define PVOP_CALLEE0(rettype, op) \ - __PVOP_CALLEESAVE(rettype, op) -#define PVOP_VCALLEE0(op) \ - __PVOP_VCALLEESAVE(op) -#define PVOP_ALT_CALLEE0(rettype, op, alt, cond) \ - __PVOP_ALT_CALLEESAVE(rettype, op, alt, cond) -#define PVOP_ALT_VCALLEE0(op, alt, cond) \ - __PVOP_ALT_VCALLEESAVE(op, alt, cond) - - -#define PVOP_CALL1(rettype, op, arg1) \ - __PVOP_CALL(rettype, op, PVOP_CALL_ARG1(arg1)) -#define PVOP_VCALL1(op, arg1) \ - __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1)) -#define PVOP_ALT_VCALL1(op, arg1, alt, cond) \ - __PVOP_ALT_VCALL(op, alt, cond, PVOP_CALL_ARG1(arg1)) - -#define PVOP_CALLEE1(rettype, op, arg1) \ - __PVOP_CALLEESAVE(rettype, op, PVOP_CALL_ARG1(arg1)) -#define PVOP_VCALLEE1(op, arg1) \ - __PVOP_VCALLEESAVE(op, PVOP_CALL_ARG1(arg1)) -#define PVOP_ALT_CALLEE1(rettype, op, arg1, alt, cond) \ - __PVOP_ALT_CALLEESAVE(rettype, op, alt, cond, PVOP_CALL_ARG1(arg1)) -#define PVOP_ALT_VCALLEE1(op, arg1, alt, cond) \ - __PVOP_ALT_VCALLEESAVE(op, alt, cond, PVOP_CALL_ARG1(arg1)) - - -#define PVOP_CALL2(rettype, op, arg1, arg2) \ - __PVOP_CALL(rettype, op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2)) -#define PVOP_VCALL2(op, arg1, arg2) \ - __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2)) - -#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ - __PVOP_CALL(rettype, op, PVOP_CALL_ARG1(arg1), \ +#define PVOP_CALL0(rettype, array, op) \ + __PVOP_CALL(rettype, array, op) +#define PVOP_VCALL0(array, op) \ + __PVOP_VCALL(array, op) +#define PVOP_ALT_CALL0(rettype, array, op, alt, cond) \ + __PVOP_ALT_CALL(rettype, array, op, alt, cond) +#define PVOP_ALT_VCALL0(array, op, alt, cond) \ + __PVOP_ALT_VCALL(array, op, alt, cond) + +#define PVOP_CALLEE0(rettype, array, op) \ + __PVOP_CALLEESAVE(rettype, array, op) +#define PVOP_VCALLEE0(array, op) \ + __PVOP_VCALLEESAVE(array, op) +#define PVOP_ALT_CALLEE0(rettype, array, op, alt, cond) \ + __PVOP_ALT_CALLEESAVE(rettype, array, op, alt, cond) +#define PVOP_ALT_VCALLEE0(array, op, alt, cond) \ + __PVOP_ALT_VCALLEESAVE(array, op, alt, cond) + + +#define PVOP_CALL1(rettype, array, op, arg1) \ + __PVOP_CALL(rettype, array, op, PVOP_CALL_ARG1(arg1)) +#define PVOP_VCALL1(array, op, arg1) \ + __PVOP_VCALL(array, op, PVOP_CALL_ARG1(arg1)) +#define PVOP_ALT_VCALL1(array, op, arg1, alt, cond) \ + __PVOP_ALT_VCALL(array, op, alt, cond, PVOP_CALL_ARG1(arg1)) + +#define PVOP_CALLEE1(rettype, array, op, arg1) \ + __PVOP_CALLEESAVE(rettype, array, op, PVOP_CALL_ARG1(arg1)) +#define PVOP_VCALLEE1(array, op, arg1) \ + __PVOP_VCALLEESAVE(array, op, PVOP_CALL_ARG1(arg1)) +#define PVOP_ALT_CALLEE1(rettype, array, op, arg1, alt, cond) \ + __PVOP_ALT_CALLEESAVE(rettype, array, op, alt, cond, PVOP_CALL_ARG1(arg1)) +#define PVOP_ALT_VCALLEE1(array, op, arg1, alt, cond) \ + __PVOP_ALT_VCALLEESAVE(array, op, alt, cond, PVOP_CALL_ARG1(arg1)) + + +#define PVOP_CALL2(rettype, array, op, arg1, arg2) \ + __PVOP_CALL(rettype, array, op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2= )) +#define PVOP_VCALL2(array, op, arg1, arg2) \ + __PVOP_VCALL(array, op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2)) + +#define PVOP_CALL3(rettype, array, op, arg1, arg2, arg3) \ + __PVOP_CALL(rettype, array, op, PVOP_CALL_ARG1(arg1), \ PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) -#define PVOP_VCALL3(op, arg1, arg2, arg3) \ - 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Boris Ostrovsky , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v2 21/21] x86/pvlocks: Move paravirt spinlock functions into own header Date: Wed, 17 Sep 2025 16:52:20 +0200 Message-ID: <20250917145220.31064-22-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250917145220.31064-1-jgross@suse.com> References: <20250917145220.31064-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:mid]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[24]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -6.80 Content-Type: text/plain; charset="utf-8" Instead of having the pv spinlock function definitions in paravirt.h, move them into the new header paravirt-spinlock.h. Signed-off-by: Juergen Gross --- V2: - use new header instead of qspinlock.h - use dedicated pv_ops_lock array - move more paravirt related lock code --- arch/x86/hyperv/hv_spinlock.c | 10 +- arch/x86/include/asm/paravirt-spinlock.h | 146 +++++++++++++++++++++++ arch/x86/include/asm/paravirt.h | 61 ---------- arch/x86/include/asm/paravirt_types.h | 17 --- arch/x86/include/asm/qspinlock.h | 89 ++------------ arch/x86/kernel/Makefile | 2 +- arch/x86/kernel/kvm.c | 10 +- arch/x86/kernel/paravirt-spinlocks.c | 24 +++- arch/x86/kernel/paravirt.c | 21 ---- arch/x86/xen/spinlock.c | 10 +- tools/objtool/check.c | 1 + 11 files changed, 192 insertions(+), 199 deletions(-) create mode 100644 arch/x86/include/asm/paravirt-spinlock.h diff --git a/arch/x86/hyperv/hv_spinlock.c b/arch/x86/hyperv/hv_spinlock.c index 2a3c2afb0154..210b494e4de0 100644 --- a/arch/x86/hyperv/hv_spinlock.c +++ b/arch/x86/hyperv/hv_spinlock.c @@ -78,11 +78,11 @@ void __init hv_init_spinlocks(void) pr_info("PV spinlocks enabled\n"); =20 __pv_init_lock_hash(); - pv_ops.lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; - pv_ops.lock.queued_spin_unlock =3D PV_CALLEE_SAVE(__pv_queued_spin_unlock= ); - pv_ops.lock.wait =3D hv_qlock_wait; - pv_ops.lock.kick =3D hv_qlock_kick; - pv_ops.lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(hv_vcpu_is_preempted); + pv_ops_lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; + pv_ops_lock.queued_spin_unlock =3D PV_CALLEE_SAVE(__pv_queued_spin_unlock= ); + pv_ops_lock.wait =3D hv_qlock_wait; + pv_ops_lock.kick =3D hv_qlock_kick; + pv_ops_lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(hv_vcpu_is_preempted); } =20 static __init int hv_parse_nopvspin(char *arg) diff --git a/arch/x86/include/asm/paravirt-spinlock.h b/arch/x86/include/as= m/paravirt-spinlock.h new file mode 100644 index 000000000000..ed3ed343903d --- /dev/null +++ b/arch/x86/include/asm/paravirt-spinlock.h @@ -0,0 +1,146 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_X86_PARAVIRT_SPINLOCK_H +#define _ASM_X86_PARAVIRT_SPINLOCK_H + +#include + +#ifdef CONFIG_SMP +#include +#endif + +struct qspinlock; + +struct pv_lock_ops { + void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); + struct paravirt_callee_save queued_spin_unlock; + + void (*wait)(u8 *ptr, u8 val); + void (*kick)(int cpu); + + struct paravirt_callee_save vcpu_is_preempted; +} __no_randomize_layout; + +extern struct pv_lock_ops pv_ops_lock; + +#ifdef CONFIG_PARAVIRT_SPINLOCKS +void __init paravirt_set_cap(void); +extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 v= al); +extern void __pv_init_lock_hash(void); +extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val= ); +extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lo= ck); +extern bool nopvspin; + +static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock = *lock, + u32 val) +{ + PVOP_VCALL2(pv_ops_lock, queued_spin_lock_slowpath, lock, val); +} + +static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock) +{ + PVOP_ALT_VCALLEE1(pv_ops_lock, queued_spin_unlock, lock, + "movb $0, (%%" _ASM_ARG1 ");", + ALT_NOT(X86_FEATURE_PVUNLOCK)); +} + +static __always_inline bool pv_vcpu_is_preempted(long cpu) +{ + return PVOP_ALT_CALLEE1(bool, pv_ops_lock, vcpu_is_preempted, cpu, + "xor %%" _ASM_AX ", %%" _ASM_AX ";", + ALT_NOT(X86_FEATURE_VCPUPREEMPT)); +} + +#define queued_spin_unlock queued_spin_unlock +/** + * queued_spin_unlock - release a queued spinlock + * @lock : Pointer to queued spinlock structure + * + * A smp_store_release() on the least-significant byte. + */ +static inline void native_queued_spin_unlock(struct qspinlock *lock) +{ + smp_store_release(&lock->locked, 0); +} + +static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 v= al) +{ + pv_queued_spin_lock_slowpath(lock, val); +} + +static inline void queued_spin_unlock(struct qspinlock *lock) +{ + kcsan_release(); + pv_queued_spin_unlock(lock); +} + +#define vcpu_is_preempted vcpu_is_preempted +static inline bool vcpu_is_preempted(long cpu) +{ + return pv_vcpu_is_preempted(cpu); +} + +static __always_inline void pv_wait(u8 *ptr, u8 val) +{ + PVOP_VCALL2(pv_ops_lock, wait, ptr, val); +} + +static __always_inline void pv_kick(int cpu) +{ + PVOP_VCALL1(pv_ops_lock, kick, cpu); +} + +void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock); +bool __raw_callee_save___native_vcpu_is_preempted(long cpu); +#endif /* CONFIG_PARAVIRT_SPINLOCKS */ + +void __init native_pv_lock_init(void); +__visible void __native_queued_spin_unlock(struct qspinlock *lock); +bool pv_is_native_spin_unlock(void); +__visible bool __native_vcpu_is_preempted(long cpu); +bool pv_is_native_vcpu_is_preempted(void); + +/* + * virt_spin_lock_key - disables by default the virt_spin_lock() hijack. + * + * Native (and PV wanting native due to vCPU pinning) should keep this key + * disabled. Native does not touch the key. + * + * When in a guest then native_pv_lock_init() enables the key first and + * KVM/XEN might conditionally disable it later in the boot process again. + */ +DECLARE_STATIC_KEY_FALSE(virt_spin_lock_key); + +/* + * Shortcut for the queued_spin_lock_slowpath() function that allows + * virt to hijack it. + * + * Returns: + * true - lock has been negotiated, all done; + * false - queued_spin_lock_slowpath() will do its thing. + */ +#define virt_spin_lock virt_spin_lock +static inline bool virt_spin_lock(struct qspinlock *lock) +{ + int val; + + if (!static_branch_likely(&virt_spin_lock_key)) + return false; + + /* + * On hypervisors without PARAVIRT_SPINLOCKS support we fall + * back to a Test-and-Set spinlock, because fair locks have + * horrible lock 'holder' preemption issues. + */ + + __retry: + val =3D atomic_read(&lock->val); + + if (val || !atomic_try_cmpxchg(&lock->val, &val, _Q_LOCKED_VAL)) { + cpu_relax(); + goto __retry; + } + + return true; +} + +#endif /* _ASM_X86_PARAVIRT_SPINLOCK_H */ diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index ec274d13bae0..b21072af731d 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -19,15 +19,6 @@ #include #include =20 -__visible void __native_queued_spin_unlock(struct qspinlock *lock); -bool pv_is_native_spin_unlock(void); -__visible bool __native_vcpu_is_preempted(long cpu); -bool pv_is_native_vcpu_is_preempted(void); - -#ifdef CONFIG_PARAVIRT_SPINLOCKS -void __init paravirt_set_cap(void); -#endif - /* The paravirtualized I/O functions */ static inline void slow_down_io(void) { @@ -522,46 +513,7 @@ static inline void __set_fixmap(unsigned /* enum fixed= _addresses */ idx, { pv_ops.mmu.set_fixmap(idx, phys, flags); } -#endif - -#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS) - -static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock = *lock, - u32 val) -{ - PVOP_VCALL2(pv_ops, lock.queued_spin_lock_slowpath, lock, val); -} - -static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock) -{ - PVOP_ALT_VCALLEE1(pv_ops, lock.queued_spin_unlock, lock, - "movb $0, (%%" _ASM_ARG1 ");", - ALT_NOT(X86_FEATURE_PVUNLOCK)); -} - -static __always_inline void pv_wait(u8 *ptr, u8 val) -{ - PVOP_VCALL2(pv_ops, lock.wait, ptr, val); -} - -static __always_inline void pv_kick(int cpu) -{ - PVOP_VCALL1(pv_ops, lock.kick, cpu); -} - -static __always_inline bool pv_vcpu_is_preempted(long cpu) -{ - return PVOP_ALT_CALLEE1(bool, pv_ops, lock.vcpu_is_preempted, cpu, - "xor %%" _ASM_AX ", %%" _ASM_AX ";", - ALT_NOT(X86_FEATURE_VCPUPREEMPT)); -} =20 -void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock); -bool __raw_callee_save___native_vcpu_is_preempted(long cpu); - -#endif /* SMP && PARAVIRT_SPINLOCKS */ - -#ifdef CONFIG_PARAVIRT_XXL static __always_inline unsigned long arch_local_save_flags(void) { return PVOP_ALT_CALLEE0(unsigned long, pv_ops, irq.save_fl, "pushf; pop %= %rax;", @@ -588,8 +540,6 @@ static __always_inline unsigned long arch_local_irq_sav= e(void) } #endif =20 -void native_pv_lock_init(void) __init; - #else /* __ASSEMBLER__ */ =20 #ifdef CONFIG_X86_64 @@ -613,12 +563,6 @@ void native_pv_lock_init(void) __init; #endif /* __ASSEMBLER__ */ #else /* CONFIG_PARAVIRT */ # define default_banner x86_init_noop - -#ifndef __ASSEMBLER__ -static inline void native_pv_lock_init(void) -{ -} -#endif #endif /* !CONFIG_PARAVIRT */ =20 #ifndef __ASSEMBLER__ @@ -634,10 +578,5 @@ static inline void paravirt_arch_exit_mmap(struct mm_s= truct *mm) } #endif =20 -#ifndef CONFIG_PARAVIRT_SPINLOCKS -static inline void paravirt_set_cap(void) -{ -} -#endif #endif /* __ASSEMBLER__ */ #endif /* _ASM_X86_PARAVIRT_H */ diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 01a485f1a7f1..e2b487d35d14 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -184,22 +184,6 @@ struct pv_mmu_ops { #endif } __no_randomize_layout; =20 -#ifdef CONFIG_SMP -#include -#endif - -struct qspinlock; - -struct pv_lock_ops { - void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); - struct paravirt_callee_save queued_spin_unlock; - - void (*wait)(u8 *ptr, u8 val); - void (*kick)(int cpu); - - struct paravirt_callee_save vcpu_is_preempted; -} __no_randomize_layout; - /* This contains all the paravirt structures: we get a convenient * number for each function using the offset which we use to indicate * what to patch. */ @@ -207,7 +191,6 @@ struct paravirt_patch_template { struct pv_cpu_ops cpu; struct pv_irq_ops irq; struct pv_mmu_ops mmu; - struct pv_lock_ops lock; } __no_randomize_layout; =20 extern struct paravirt_patch_template pv_ops; diff --git a/arch/x86/include/asm/qspinlock.h b/arch/x86/include/asm/qspinl= ock.h index 68da67df304d..a2668bdf4c84 100644 --- a/arch/x86/include/asm/qspinlock.h +++ b/arch/x86/include/asm/qspinlock.h @@ -7,6 +7,9 @@ #include #include #include +#ifdef CONFIG_PARAVIRT +#include +#endif =20 #define _Q_PENDING_LOOPS (1 << 9) =20 @@ -27,89 +30,13 @@ static __always_inline u32 queued_fetch_set_pending_acq= uire(struct qspinlock *lo return val; } =20 -#ifdef CONFIG_PARAVIRT_SPINLOCKS -extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 v= al); -extern void __pv_init_lock_hash(void); -extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val= ); -extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lo= ck); -extern bool nopvspin; - -#define queued_spin_unlock queued_spin_unlock -/** - * queued_spin_unlock - release a queued spinlock - * @lock : Pointer to queued spinlock structure - * - * A smp_store_release() on the least-significant byte. - */ -static inline void native_queued_spin_unlock(struct qspinlock *lock) -{ - smp_store_release(&lock->locked, 0); -} - -static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 v= al) -{ - pv_queued_spin_lock_slowpath(lock, val); -} - -static inline void queued_spin_unlock(struct qspinlock *lock) -{ - kcsan_release(); - pv_queued_spin_unlock(lock); -} - -#define vcpu_is_preempted vcpu_is_preempted -static inline bool vcpu_is_preempted(long cpu) -{ - return pv_vcpu_is_preempted(cpu); -} +#ifndef CONFIG_PARAVIRT_SPINLOCKS +static inline void paravirt_set_cap(void) { } #endif =20 -#ifdef CONFIG_PARAVIRT -/* - * virt_spin_lock_key - disables by default the virt_spin_lock() hijack. - * - * Native (and PV wanting native due to vCPU pinning) should keep this key - * disabled. Native does not touch the key. - * - * When in a guest then native_pv_lock_init() enables the key first and - * KVM/XEN might conditionally disable it later in the boot process again. - */ -DECLARE_STATIC_KEY_FALSE(virt_spin_lock_key); - -/* - * Shortcut for the queued_spin_lock_slowpath() function that allows - * virt to hijack it. - * - * Returns: - * true - lock has been negotiated, all done; - * false - queued_spin_lock_slowpath() will do its thing. - */ -#define virt_spin_lock virt_spin_lock -static inline bool virt_spin_lock(struct qspinlock *lock) -{ - int val; - - if (!static_branch_likely(&virt_spin_lock_key)) - return false; - - /* - * On hypervisors without PARAVIRT_SPINLOCKS support we fall - * back to a Test-and-Set spinlock, because fair locks have - * horrible lock 'holder' preemption issues. - */ - - __retry: - val =3D atomic_read(&lock->val); - - if (val || !atomic_try_cmpxchg(&lock->val, &val, _Q_LOCKED_VAL)) { - cpu_relax(); - goto __retry; - } - - return true; -} - -#endif /* CONFIG_PARAVIRT */ +#ifndef CONFIG_PARAVIRT +static inline void native_pv_lock_init(void) { } +#endif =20 #include =20 diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 0d2a6d953be9..56d57944fa4b 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -126,7 +126,7 @@ obj-$(CONFIG_DEBUG_NMI_SELFTEST) +=3D nmi_selftest.o =20 obj-$(CONFIG_KVM_GUEST) +=3D kvm.o kvmclock.o obj-$(CONFIG_PARAVIRT) +=3D paravirt.o -obj-$(CONFIG_PARAVIRT_SPINLOCKS)+=3D paravirt-spinlocks.o +obj-$(CONFIG_PARAVIRT) +=3D paravirt-spinlocks.o obj-$(CONFIG_PARAVIRT_CLOCK) +=3D pvclock.o obj-$(CONFIG_X86_PMEM_LEGACY_DEVICE) +=3D pmem.o =20 diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index a23211eaaeed..a94376d04dca 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -825,7 +825,7 @@ static void __init kvm_guest_init(void) has_steal_clock =3D 1; static_call_update(pv_steal_clock, kvm_steal_clock); =20 - pv_ops.lock.vcpu_is_preempted =3D + pv_ops_lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(__kvm_vcpu_is_preempted); } =20 @@ -1105,11 +1105,11 @@ void __init kvm_spinlock_init(void) pr_info("PV spinlocks enabled\n"); =20 __pv_init_lock_hash(); - pv_ops.lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; - pv_ops.lock.queued_spin_unlock =3D + pv_ops_lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; + pv_ops_lock.queued_spin_unlock =3D PV_CALLEE_SAVE(__pv_queued_spin_unlock); - pv_ops.lock.wait =3D kvm_wait; - pv_ops.lock.kick =3D kvm_kick_cpu; + pv_ops_lock.wait =3D kvm_wait; + pv_ops_lock.kick =3D kvm_kick_cpu; =20 /* * When PV spinlock is enabled which is preferred over diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravir= t-spinlocks.c index 9e1ea99ad9df..f9cf6f71395a 100644 --- a/arch/x86/kernel/paravirt-spinlocks.c +++ b/arch/x86/kernel/paravirt-spinlocks.c @@ -3,12 +3,20 @@ * Split spinlock implementation out into its own file, so it can be * compiled in a FTRACE-compatible way. */ +#include #include #include #include =20 -#include +DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); =20 +void __init native_pv_lock_init(void) +{ + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) + static_branch_enable(&virt_spin_lock_key); +} + +#ifdef CONFIG_PARAVIRT_SPINLOCKS __visible void __native_queued_spin_unlock(struct qspinlock *lock) { native_queued_spin_unlock(lock); @@ -17,7 +25,7 @@ PV_CALLEE_SAVE_REGS_THUNK(__native_queued_spin_unlock); =20 bool pv_is_native_spin_unlock(void) { - return pv_ops.lock.queued_spin_unlock.func =3D=3D + return pv_ops_lock.queued_spin_unlock.func =3D=3D __raw_callee_save___native_queued_spin_unlock; } =20 @@ -29,7 +37,7 @@ PV_CALLEE_SAVE_REGS_THUNK(__native_vcpu_is_preempted); =20 bool pv_is_native_vcpu_is_preempted(void) { - return pv_ops.lock.vcpu_is_preempted.func =3D=3D + return pv_ops_lock.vcpu_is_preempted.func =3D=3D __raw_callee_save___native_vcpu_is_preempted; } =20 @@ -41,3 +49,13 @@ void __init paravirt_set_cap(void) if (!pv_is_native_vcpu_is_preempted()) setup_force_cpu_cap(X86_FEATURE_VCPUPREEMPT); } + +struct pv_lock_ops pv_ops_lock =3D { + .queued_spin_lock_slowpath =3D native_queued_spin_lock_slowpath, + .queued_spin_unlock =3D PV_CALLEE_SAVE(__native_queued_spin_unlock), + .wait =3D paravirt_nop, + .kick =3D paravirt_nop, + .vcpu_is_preempted =3D PV_CALLEE_SAVE(__native_vcpu_is_preempted), +}; +EXPORT_SYMBOL(pv_ops_lock); +#endif diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 5dfbd3f55792..a6ed52cae003 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -57,14 +57,6 @@ DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.te= xt); DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text); #endif =20 -DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); - -void __init native_pv_lock_init(void) -{ - if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) - static_branch_enable(&virt_spin_lock_key); -} - static noinstr void pv_native_safe_halt(void) { native_safe_halt(); @@ -221,19 +213,6 @@ struct paravirt_patch_template pv_ops =3D { =20 .mmu.set_fixmap =3D native_set_fixmap, #endif /* CONFIG_PARAVIRT_XXL */ - -#if defined(CONFIG_PARAVIRT_SPINLOCKS) - /* Lock ops. */ -#ifdef CONFIG_SMP - .lock.queued_spin_lock_slowpath =3D native_queued_spin_lock_slowpath, - .lock.queued_spin_unlock =3D - PV_CALLEE_SAVE(__native_queued_spin_unlock), - .lock.wait =3D paravirt_nop, - .lock.kick =3D paravirt_nop, - .lock.vcpu_is_preempted =3D - PV_CALLEE_SAVE(__native_vcpu_is_preempted), -#endif /* SMP */ -#endif }; =20 #ifdef CONFIG_PARAVIRT_XXL diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c index fe56646d6919..83ac24ead289 100644 --- a/arch/x86/xen/spinlock.c +++ b/arch/x86/xen/spinlock.c @@ -134,10 +134,10 @@ void __init xen_init_spinlocks(void) printk(KERN_DEBUG "xen: PV spinlocks enabled\n"); =20 __pv_init_lock_hash(); - pv_ops.lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; - pv_ops.lock.queued_spin_unlock =3D + pv_ops_lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; + pv_ops_lock.queued_spin_unlock =3D PV_CALLEE_SAVE(__pv_queued_spin_unlock); - pv_ops.lock.wait =3D xen_qlock_wait; - pv_ops.lock.kick =3D xen_qlock_kick; - pv_ops.lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(xen_vcpu_stolen); + pv_ops_lock.wait =3D xen_qlock_wait; + pv_ops_lock.kick =3D xen_qlock_kick; + pv_ops_lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(xen_vcpu_stolen); } diff --git a/tools/objtool/check.c b/tools/objtool/check.c index ca6ad92618d8..e9e1b5d321e5 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -549,6 +549,7 @@ static struct { int idx_off; } pv_ops_tables[] =3D { { .name =3D "pv_ops", }, + { .name =3D "pv_ops_lock", }, { .name =3D NULL, .idx_off =3D -1 } }; =20 --=20 2.51.0