From nobody Thu Oct 2 11:50:46 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 73C9E2222D1; Wed, 17 Sep 2025 10:15:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758104130; cv=none; b=OB9YdHf+tiiSAbMGY5bJrF0umtchy2qGPTnMdYMAf35xHIY9b9zkRIjcdncHaEnvcWCk6QIMjT47CcsVDVWqxl1eMKmrb3yf6Wbck/FAz3a+t3qaPclPwhdstxje1XahxJnABrox18NCXwAcULnXs6OujGVSFpjc3lDz/VAzHJI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758104130; c=relaxed/simple; bh=NUKM72dsQsPVocfi0VrAIryfe6vjKQ5F2Pt17V7EWkc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qasIaLwQnASIKqPGC4AxGx+tdBXCF6muTSzIQhgd4FVLYABxg7xcAXGpEjlBn0+XIRuapje/KEu/NuVpQX6G/RlXRU85RnEuP5gpSJh+NyOwjTTnvDaOj2M9/MOb4OrnxMLCVZqgjRUyRV4w7NT1VCEkr9jK1nQKqtnQ/mwx32w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nvXcqzdj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nvXcqzdj" Received: by smtp.kernel.org (Postfix) with ESMTPS id 1F1DDC4CEF7; Wed, 17 Sep 2025 10:15:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1758104130; bh=NUKM72dsQsPVocfi0VrAIryfe6vjKQ5F2Pt17V7EWkc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=nvXcqzdjK5+hLjE6Tht7GpZdRxuJcN3Cd2qi9t0iZURMhLqU5ckgcKCbAaVJj1J4q dHPQzqNECICQPmDjqSdWBjqe1sAm+flPkHE9AqWuXz0xqRA/udOe3bcDxfk6h/VOxw UJLIAvRX8fht13glhS0AjQN3iRx39UmkBaoa/nHva3kg8jkXHPa3wHPnla1b7sIO0N nWvv3J6Nv3W6BrHRtIAlCfJFCz0X7q9Vo4By94EsOodtjuFv6WaqDdVS+m6OUpraMn m7L/035IDDikytHgOCJfwSt+qp7apF+WlPls9sAX8qsBW2Unsbvfz9VqEu7AaK7naj EE5fmHg05iIiw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07F69CAC598; Wed, 17 Sep 2025 10:15:30 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Wed, 17 Sep 2025 18:15:14 +0800 Subject: [PATCH v5 1/9] power: supply: core: Add resistance power supply property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250917-qcom_battmgr_update-v5-1-270ade9ffe13@oss.qualcomm.com> References: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> In-Reply-To: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> To: Sebastian Reichel , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heikki Krogerus , Greg Kroah-Hartman , Dmitry Baryshkov , Bryan O'Donoghue , Konrad Dybcio Cc: Subbaraman Narayanamurthy , David Collins , =?utf-8?q?Gy=C3=B6rgy_Kurucz?= , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@oss.qualcomm.com, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758104128; l=2838; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=PTxob4cVzRUR26yIMTWBec2QDLrpnnMTw9w6sqWmfeM=; b=iGK26AJvMnEB1U6pqbrTAVBKD/VM9E0r4i/umxn9oJIWg+LyIBuQ8Izdrz/OUASRENano95Ru sFlk8lJdI2mCnBVu5izMIXO6Pe3q1rpB50l6YrZ12F5gnSlfRm46wfU X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu Some battery drivers provide the ability to export internal resistance as a parameter. Add internal_resistance power supply property for that purpose. Signed-off-by: Fenglin Wu --- Documentation/ABI/testing/sysfs-class-power | 16 ++++++++++++++++ drivers/power/supply/power_supply_sysfs.c | 1 + include/linux/power_supply.h | 1 + 3 files changed, 18 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/AB= I/testing/sysfs-class-power index 560124cc31770cde03bcdbbba0d85a5bd78b15a0..cea1a38f5a8fb754d4e6323967e= f6cf2e20a68ce 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -552,6 +552,22 @@ Description: Integer > 0: representing full cycles Integer =3D 0: cycle_count info is not available =20 +What: /sys/class/power_supply//internal_resistance +Date: August 2025 +Contact: linux-arm-msm@vger.kernel.org +Description: + Represent the battery's internal resistance, often referred + to as Equivalent Series Resistance (ESR). It is a dynamic + parameter that reflects the opposition to current flow within + the cell. It is not a fixed value but varies significantly + based on several operational conditions, including battery + state of charge (SoC), temperature, and whether the battery + is in a charging or discharging state. + + Access: Read + + Valid values: Represented in microohms + **USB Properties** =20 What: /sys/class/power_supply//input_current_limit diff --git a/drivers/power/supply/power_supply_sysfs.c b/drivers/power/supp= ly/power_supply_sysfs.c index a438f7983d4f6a832e9d479184c7c35453e1757c..cfa8f90a88ebc8fc1c7447198f1= 38e5d2e699e5a 100644 --- a/drivers/power/supply/power_supply_sysfs.c +++ b/drivers/power/supply/power_supply_sysfs.c @@ -220,6 +220,7 @@ static struct power_supply_attr power_supply_attrs[] __= ro_after_init =3D { POWER_SUPPLY_ATTR(MANUFACTURE_YEAR), POWER_SUPPLY_ATTR(MANUFACTURE_MONTH), POWER_SUPPLY_ATTR(MANUFACTURE_DAY), + POWER_SUPPLY_ATTR(INTERNAL_RESISTANCE), /* Properties of type `const char *' */ POWER_SUPPLY_ATTR(MODEL_NAME), POWER_SUPPLY_ATTR(MANUFACTURER), diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h index c4cb854971f53a244ba7742a15ce7a5515da6199..8bc3b7a67eb5693a16db9b7d123= e7881711c6bf4 100644 --- a/include/linux/power_supply.h +++ b/include/linux/power_supply.h @@ -174,6 +174,7 @@ enum power_supply_property { POWER_SUPPLY_PROP_MANUFACTURE_YEAR, POWER_SUPPLY_PROP_MANUFACTURE_MONTH, POWER_SUPPLY_PROP_MANUFACTURE_DAY, + POWER_SUPPLY_PROP_INTERNAL_RESISTANCE, /* Properties of type `const char *' */ POWER_SUPPLY_PROP_MODEL_NAME, POWER_SUPPLY_PROP_MANUFACTURER, --=20 2.34.1 From nobody Thu Oct 2 11:50:46 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 73D0E285077; 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a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu Add state_of_health power supply property to represent battery health percentage. Signed-off-by: Fenglin Wu --- Documentation/ABI/testing/sysfs-class-power | 21 +++++++++++++++++++++ drivers/power/supply/power_supply_sysfs.c | 1 + include/linux/power_supply.h | 1 + 3 files changed, 23 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/AB= I/testing/sysfs-class-power index cea1a38f5a8fb754d4e6323967ef6cf2e20a68ce..d9e1ad7646f14892bb7ed55ac72= d0de7569f104e 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -568,6 +568,27 @@ Description: =20 Valid values: Represented in microohms =20 +What: /sys/class/power_supply//state_of_health +Date: August 2025 +Contact: linux-arm-msm@vger.kernel.org +Description: + The state_of_health parameter quantifies the overall condition + of a battery as a percentage, reflecting its ability to deliver + rated performance relative to its original specifications. It is + dynamically computed using a combination of learned capacity + and impedance-based degradation indicators, both of which evolve + over the battery's lifecycle. + Note that the exact algorithms are kept secret by most battery + vendors and the value from different battery vendors cannot be + compared with each other as there is no vendor-agnostic definition + of "performance". Also this usually cannot be used for any + calculations (i.e. this is not the factor between charge_full and + charge_full_design). + + Access: Read + + Valid values: 0 - 100 (percent) + **USB Properties** =20 What: /sys/class/power_supply//input_current_limit diff --git a/drivers/power/supply/power_supply_sysfs.c b/drivers/power/supp= ly/power_supply_sysfs.c index cfa8f90a88ebc8fc1c7447198f138e5d2e699e5a..d96a8578308e3af60cc1a352845= 662aa922c29b3 100644 --- a/drivers/power/supply/power_supply_sysfs.c +++ b/drivers/power/supply/power_supply_sysfs.c @@ -221,6 +221,7 @@ static struct power_supply_attr power_supply_attrs[] __= ro_after_init =3D { POWER_SUPPLY_ATTR(MANUFACTURE_MONTH), POWER_SUPPLY_ATTR(MANUFACTURE_DAY), POWER_SUPPLY_ATTR(INTERNAL_RESISTANCE), + POWER_SUPPLY_ATTR(STATE_OF_HEALTH), /* Properties of type `const char *' */ POWER_SUPPLY_ATTR(MODEL_NAME), POWER_SUPPLY_ATTR(MANUFACTURER), diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h index 8bc3b7a67eb5693a16db9b7d123e7881711c6bf4..ccb43fe44381965069dc3bd9505= d45050b9b1bd8 100644 --- a/include/linux/power_supply.h +++ b/include/linux/power_supply.h @@ -175,6 +175,7 @@ enum power_supply_property { POWER_SUPPLY_PROP_MANUFACTURE_MONTH, POWER_SUPPLY_PROP_MANUFACTURE_DAY, POWER_SUPPLY_PROP_INTERNAL_RESISTANCE, + POWER_SUPPLY_PROP_STATE_OF_HEALTH, /* Properties of type `const char *' */ POWER_SUPPLY_PROP_MODEL_NAME, POWER_SUPPLY_PROP_MANUFACTURER, --=20 2.34.1 From nobody Thu Oct 2 11:50:46 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0045303A05; 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Signed-off-by: Fenglin Wu --- drivers/power/supply/qcom_battmgr.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qco= m_battmgr.c index fe27676fbc7cd12292caa6fb3b5b46a18c426e6d..6026266907c9dfd902240d451a0= d1c50fa5dbc59 100644 --- a/drivers/power/supply/qcom_battmgr.c +++ b/drivers/power/supply/qcom_battmgr.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2022, Linaro Ltd + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include #include @@ -254,6 +255,7 @@ struct qcom_battmgr_status { unsigned int voltage_now; unsigned int voltage_ocv; unsigned int temperature; + unsigned int resistance; =20 unsigned int discharge_time; unsigned int charge_time; @@ -418,6 +420,7 @@ static const u8 sm8350_bat_prop_map[] =3D { [POWER_SUPPLY_PROP_MODEL_NAME] =3D BATT_MODEL_NAME, [POWER_SUPPLY_PROP_TIME_TO_FULL_AVG] =3D BATT_TTF_AVG, [POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG] =3D BATT_TTE_AVG, + [POWER_SUPPLY_PROP_INTERNAL_RESISTANCE] =3D BATT_RESISTANCE, [POWER_SUPPLY_PROP_POWER_NOW] =3D BATT_POWER_NOW, }; =20 @@ -582,6 +585,9 @@ static int qcom_battmgr_bat_get_property(struct power_s= upply *psy, case POWER_SUPPLY_PROP_TEMP: val->intval =3D battmgr->status.temperature; break; + case POWER_SUPPLY_PROP_INTERNAL_RESISTANCE: + val->intval =3D battmgr->status.resistance; + break; case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG: val->intval =3D battmgr->status.discharge_time; break; @@ -665,6 +671,7 @@ static const enum power_supply_property sm8350_bat_prop= s[] =3D { POWER_SUPPLY_PROP_MODEL_NAME, POWER_SUPPLY_PROP_TIME_TO_FULL_AVG, POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, + POWER_SUPPLY_PROP_INTERNAL_RESISTANCE, POWER_SUPPLY_PROP_POWER_NOW, }; =20 @@ -1174,6 +1181,9 @@ static void qcom_battmgr_sm8350_callback(struct qcom_= battmgr *battmgr, case BATT_TTE_AVG: battmgr->status.discharge_time =3D le32_to_cpu(resp->intval.value); break; + case BATT_RESISTANCE: + battmgr->status.resistance =3D le32_to_cpu(resp->intval.value); + break; case BATT_POWER_NOW: battmgr->status.power_now =3D le32_to_cpu(resp->intval.value); break; --=20 2.34.1 From nobody Thu Oct 2 11:50:46 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FF792F83CD; Wed, 17 Sep 2025 10:15:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu Add state_of_health property to read battery health percentage from battery management firmware. Signed-off-by: Fenglin Wu --- drivers/power/supply/qcom_battmgr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qco= m_battmgr.c index 6026266907c9dfd902240d451a0d1c50fa5dbc59..8d66f4dc95e3c141788189799b6= e371e293d1d54 100644 --- a/drivers/power/supply/qcom_battmgr.c +++ b/drivers/power/supply/qcom_battmgr.c @@ -256,6 +256,7 @@ struct qcom_battmgr_status { unsigned int voltage_ocv; unsigned int temperature; unsigned int resistance; + unsigned int soh_percent; =20 unsigned int discharge_time; unsigned int charge_time; @@ -421,6 +422,7 @@ static const u8 sm8350_bat_prop_map[] =3D { [POWER_SUPPLY_PROP_TIME_TO_FULL_AVG] =3D BATT_TTF_AVG, [POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG] =3D BATT_TTE_AVG, [POWER_SUPPLY_PROP_INTERNAL_RESISTANCE] =3D BATT_RESISTANCE, + [POWER_SUPPLY_PROP_STATE_OF_HEALTH] =3D BATT_SOH, [POWER_SUPPLY_PROP_POWER_NOW] =3D BATT_POWER_NOW, }; =20 @@ -588,6 +590,9 @@ static int qcom_battmgr_bat_get_property(struct power_s= upply *psy, case POWER_SUPPLY_PROP_INTERNAL_RESISTANCE: val->intval =3D battmgr->status.resistance; break; + case POWER_SUPPLY_PROP_STATE_OF_HEALTH: + val->intval =3D battmgr->status.soh_percent; + break; case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG: val->intval =3D battmgr->status.discharge_time; break; @@ -672,6 +677,7 @@ static const enum power_supply_property sm8350_bat_prop= s[] =3D { POWER_SUPPLY_PROP_TIME_TO_FULL_AVG, POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, POWER_SUPPLY_PROP_INTERNAL_RESISTANCE, + POWER_SUPPLY_PROP_STATE_OF_HEALTH, POWER_SUPPLY_PROP_POWER_NOW, }; =20 @@ -1141,6 +1147,9 @@ static void qcom_battmgr_sm8350_callback(struct qcom_= battmgr *battmgr, case BATT_CAPACITY: battmgr->status.percent =3D le32_to_cpu(resp->intval.value) / 100; break; + case BATT_SOH: + battmgr->status.soh_percent =3D le32_to_cpu(resp->intval.value); + break; case BATT_VOLT_OCV: battmgr->status.voltage_ocv =3D le32_to_cpu(resp->intval.value); break; --=20 2.34.1 From nobody Thu Oct 2 11:50:46 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB7BA30F55F; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250917-qcom_battmgr_update-v5-5-270ade9ffe13@oss.qualcomm.com> References: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> In-Reply-To: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> To: Sebastian Reichel , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heikki Krogerus , Greg Kroah-Hartman , Dmitry Baryshkov , Bryan O'Donoghue , Konrad Dybcio Cc: Subbaraman Narayanamurthy , David Collins , =?utf-8?q?Gy=C3=B6rgy_Kurucz?= , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@oss.qualcomm.com, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758104128; l=4187; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=YzdvjtW+H6Rd6cLEcLCqEtAb9Cj2In+fOxNkmN6NA/Q=; b=HX/XQi5yvSoxRr5KXYiGjK9ysc+ESDzXNA5Jd8Zxo7a2fujbUdLC1j2QH6TAKRM+mspNCD6gU 9YVao+uR3DNDg2Kn9t+KlQy0/to+ey8/wJnr1fN4nBPV8w2rxGX0EtA X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu The SM8550 and X1E80100 platforms now include charge control functionality in battery management firmware, allowing charging to stop when the battery reaches a set level and resume when it drops below another level. To support this in the qcom_battmgr driver, CHARGE_CONTROL_START/END_THRESHOLD power supply properties can be added to manage these levels. This results in the battery power supply properties for SM8550 and X1E80100 differing from those for SM8350 and SC8280XP. Therefore, separate compatible entries for SM8550 and X1E80100 are introduced, each with their own variant definitions as match data. Signed-off-by: Fenglin Wu --- drivers/power/supply/qcom_battmgr.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qco= m_battmgr.c index 8d66f4dc95e3c141788189799b6e371e293d1d54..c4144839b2989d92085e605c96d= 7a71918d3d737 100644 --- a/drivers/power/supply/qcom_battmgr.c +++ b/drivers/power/supply/qcom_battmgr.c @@ -19,8 +19,10 @@ #define BATTMGR_STRING_LEN 128 =20 enum qcom_battmgr_variant { - QCOM_BATTMGR_SM8350, QCOM_BATTMGR_SC8280XP, + QCOM_BATTMGR_SM8350, + QCOM_BATTMGR_SM8550, + QCOM_BATTMGR_X1E80100, }; =20 #define BATTMGR_BAT_STATUS 0x1 @@ -494,7 +496,8 @@ static int qcom_battmgr_bat_get_property(struct power_s= upply *psy, if (!battmgr->service_up) return -EAGAIN; =20 - if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) + if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) ret =3D qcom_battmgr_bat_sc8280xp_update(battmgr, psp); else ret =3D qcom_battmgr_bat_sm8350_update(battmgr, psp); @@ -764,7 +767,8 @@ static int qcom_battmgr_usb_get_property(struct power_s= upply *psy, if (!battmgr->service_up) return -EAGAIN; =20 - if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) + if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) ret =3D qcom_battmgr_bat_sc8280xp_update(battmgr, psp); else ret =3D qcom_battmgr_usb_sm8350_update(battmgr, psp); @@ -886,7 +890,8 @@ static int qcom_battmgr_wls_get_property(struct power_s= upply *psy, if (!battmgr->service_up) return -EAGAIN; =20 - if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) + if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) ret =3D qcom_battmgr_bat_sc8280xp_update(battmgr, psp); else ret =3D qcom_battmgr_wls_sm8350_update(battmgr, psp); @@ -1297,7 +1302,8 @@ static void qcom_battmgr_callback(const void *data, s= ize_t len, void *priv) =20 if (opcode =3D=3D BATTMGR_NOTIFICATION) qcom_battmgr_notification(battmgr, data, len); - else if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP) + else if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || + battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) qcom_battmgr_sc8280xp_callback(battmgr, data, len); else qcom_battmgr_sm8350_callback(battmgr, data, len); @@ -1333,7 +1339,8 @@ static void qcom_battmgr_pdr_notify(void *priv, int s= tate) static const struct of_device_id qcom_battmgr_of_variants[] =3D { { .compatible =3D "qcom,sc8180x-pmic-glink", .data =3D (void *)QCOM_BATTM= GR_SC8280XP }, { .compatible =3D "qcom,sc8280xp-pmic-glink", .data =3D (void *)QCOM_BATT= MGR_SC8280XP }, - { .compatible =3D "qcom,x1e80100-pmic-glink", .data =3D (void *)QCOM_BATT= MGR_SC8280XP }, + { .compatible =3D "qcom,sm8550-pmic-glink", .data =3D (void *)QCOM_BATTMG= R_SM8550 }, + { .compatible =3D "qcom,x1e80100-pmic-glink", .data =3D (void *)QCOM_BATT= MGR_X1E80100 }, /* Unmatched devices falls back to QCOM_BATTMGR_SM8350 */ {} }; @@ -1373,7 +1380,8 @@ static int qcom_battmgr_probe(struct auxiliary_device= *adev, else battmgr->variant =3D QCOM_BATTMGR_SM8350; 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b=vN9ANTZ14V7lWA/MHAzhiQpzlL8OP8lZwgZPImjeVxxSwSEaKyB6rd0Ur2rBx1yf4 a0zgQyYuQ2peKArSuCqG9B74J3WEKpdRdhkAF9KF6hen+BFldPFW8Zitl/+iF4Zp5B aeWS/+GwFAkDuCxlafaifgb8CDiSBKnhHKGvkJHnLA1WkIg77HmAwUoa3LnekY5+6W mOF0npLn2eua+Lbf/ov+CF5QtUP1Y7MmOB0yzhGQ3FtsAq728nJeZ+zNfIiaAduypD x4Pgd3V8yCWG1LcBnKIwrmJypaOAf2SmNK5id22OrXRcDr7BE/qa1LSqETa20NkV2J dxHXe6ixxQQvw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6788FCAC5A0; Wed, 17 Sep 2025 10:15:30 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Wed, 17 Sep 2025 18:15:19 +0800 Subject: [PATCH v5 6/9] dt-bindings: soc: qcom,pmic-glink: Add charge limit nvmem properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250917-qcom_battmgr_update-v5-6-270ade9ffe13@oss.qualcomm.com> References: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> In-Reply-To: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> To: Sebastian Reichel , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heikki Krogerus , Greg Kroah-Hartman , Dmitry Baryshkov , Bryan O'Donoghue , Konrad Dybcio Cc: Subbaraman Narayanamurthy , David Collins , =?utf-8?q?Gy=C3=B6rgy_Kurucz?= , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@oss.qualcomm.com, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758104128; l=1492; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=syVkWNhKr/v3G53QSZl0QAKviU7LNwqoaGefZ15M1Gg=; b=hk7aW7xod0FO652j9fJjiP6d0Lw8GRt3CSfWPkWAGFgEpHLEtYfJsVC78uaV+KPAicyalsQja 9NxNTkqR9m9Acc4vbyNkahOLZ9e3qAflwx8pAiirfFU9jNtoFB3m019 X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu Add nvmem properties to retrieve charge control configurations from the PMIC SDAM registers. Acked-by: Rob Herring (Arm) Signed-off-by: Fenglin Wu --- .../devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 14 ++++++++++= ++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yam= l b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml index 4c9e78f29523e3d77aacb4299f64ab96f9b1a831..9d6db4825da389aa14d77f653d2= f8a3442e22162 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml @@ -55,6 +55,20 @@ properties: The array should contain a gpio entry for each PMIC Glink connector,= in reg order. It is defined that GPIO active level means "CC2" or Reversed/Flipped= orientation. =20 + nvmem-cells: + minItems: 3 + maxItems: 3 + description: + The nvmem cells contain the charge control settings, including the c= harge control + enable status, the battery state of charge (SoC) threshold for stopp= ing charging, + and the battery SoC delta required to restart charging. + + nvmem-cell-names: + items: + - const: charge_limit_en + - const: charge_limit_end + - const: charge_limit_delta + patternProperties: '^connector@\d$': $ref: /schemas/connector/usb-connector.yaml# --=20 2.34.1 From nobody Thu Oct 2 11:50:46 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D543431B821; Wed, 17 Sep 2025 10:15:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758104131; cv=none; b=b9j3Pc51K72CZcgxsXS374EpmkRUtGA8R+a0bzRXcdGGqTBonM74ldv0QkZzGIJ7DPRyxO+2E8y5xLgB1LIwZg6Te1sP7YbPV3SOvofWu2vprM70DBG1hvn+xDJQuYk4Km0ELfWGH9KRLhryuYECE4vCTZIp8sGIg6PCejQQWvQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758104131; c=relaxed/simple; bh=abX2lkK/naqt5m2SiBvhX1liqLhyoC6tFHR95sZXKZw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bpljDBbjZ4d94bzcsswk19WojkIh2pV1rMCN+87p3Y8XoZ3zz/5G2OtWoVU+Q6zN6zG+oxJgP+YOsSKe6kWE8Iyooc1QYdYQb6e/FKDLu+pvwrEY5+CneqbVsZZqXzuo2dKctPbo97rIXMtUwjXdqMEFqu2+t/F2FWcQj1xKm0k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Sap60pkr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Sap60pkr" Received: by smtp.kernel.org (Postfix) with ESMTPS id 87289C4CEFB; Wed, 17 Sep 2025 10:15:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1758104130; bh=abX2lkK/naqt5m2SiBvhX1liqLhyoC6tFHR95sZXKZw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Sap60pkr6h3aNIDO1BYl8Ok7SXTfZ8XN6kQSMx+RCiKq7piqHIr9r8Pwphq2zPGCX DB4rZoIp024apzoMjzVFAVTOY0BtgjFCQzuiIWa3mKliLQFDprlunTQigj4Tdz2nwo /AqimnbLgNJga05VAmP+NV2rnqguP2Bl0hRzkgUN6T6ahHhyFulTT0Ont0T2ixpo6p b/b2RKwJX1mjjACqrjT2/sEJH3ixTgeC+bLxqsswSdgyIem2ClPIoRYkPNVnN1Pe0B 2ATzFVdyJr9u+V+nEPEke019UkHV6AMDwBOxCUODie2QNml5hE+ASMARLTKjdfSkfG m+mXbTHIGW8ow== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78E04CA0EE8; Wed, 17 Sep 2025 10:15:30 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Wed, 17 Sep 2025 18:15:20 +0800 Subject: [PATCH v5 7/9] power: supply: qcom_battmgr: Add charge control support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250917-qcom_battmgr_update-v5-7-270ade9ffe13@oss.qualcomm.com> References: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> In-Reply-To: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> To: Sebastian Reichel , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heikki Krogerus , Greg Kroah-Hartman , Dmitry Baryshkov , Bryan O'Donoghue , Konrad Dybcio Cc: Subbaraman Narayanamurthy , David Collins , =?utf-8?q?Gy=C3=B6rgy_Kurucz?= , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@oss.qualcomm.com, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Fenglin Wu , Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758104128; l=14635; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=jzSCE05POFXfIP7n7nMn80KBdyQaeAna7NpNfboIVy4=; b=YbjkIyRevfanQJC4HpYCPt0870qCoALmSSCCxKiNTz+OiD4KYR8ZRvoiy4vzIXfT/9vAjm+w/ VQZ+4ISzPSkABNP009oOfJeMAA+j0lzD/Gqc5IdHDfoKeTXSUc2vXeR X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu Add charge control support for SM8550 and X1E80100. It's supported with below two power supply properties: charge_control_end_threshold: The battery SoC (State of Charge) threshold at which the charging should be terminated. charge_control_start_threshold: The battery SoC threshold at which the charging should be resumed. Tested-by: Neil Armstrong # on Thinkpad T14S OL= ED Reviewed-by: Neil Armstrong Signed-off-by: Fenglin Wu --- drivers/power/supply/qcom_battmgr.c | 275 ++++++++++++++++++++++++++++++++= +++- 1 file changed, 273 insertions(+), 2 deletions(-) diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qco= m_battmgr.c index c4144839b2989d92085e605c96d7a71918d3d737..151cd5618ca5c70f941245e4df5= a18d4778f1349 100644 --- a/drivers/power/supply/qcom_battmgr.c +++ b/drivers/power/supply/qcom_battmgr.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -68,6 +69,9 @@ enum qcom_battmgr_variant { #define BATT_RESISTANCE 21 #define BATT_POWER_NOW 22 #define BATT_POWER_AVG 23 +#define BATT_CHG_CTRL_EN 24 +#define BATT_CHG_CTRL_START_THR 25 +#define BATT_CHG_CTRL_END_THR 26 =20 #define BATTMGR_USB_PROPERTY_GET 0x32 #define BATTMGR_USB_PROPERTY_SET 0x33 @@ -92,6 +96,13 @@ enum qcom_battmgr_variant { #define WLS_TYPE 5 #define WLS_BOOST_EN 6 =20 +#define BATTMGR_CHG_CTRL_LIMIT_EN 0x48 +#define CHARGE_CTRL_START_THR_MIN 50 +#define CHARGE_CTRL_START_THR_MAX 95 +#define CHARGE_CTRL_END_THR_MIN 55 +#define CHARGE_CTRL_END_THR_MAX 100 +#define CHARGE_CTRL_DELTA_SOC 5 + struct qcom_battmgr_enable_request { struct pmic_glink_hdr hdr; __le32 battery_id; @@ -126,6 +137,13 @@ struct qcom_battmgr_discharge_time_request { __le32 reserved; }; =20 +struct qcom_battmgr_charge_ctrl_request { + struct pmic_glink_hdr hdr; + __le32 enable; + __le32 target_soc; + __le32 delta_soc; +}; + struct qcom_battmgr_message { struct pmic_glink_hdr hdr; union { @@ -238,6 +256,8 @@ struct qcom_battmgr_info { unsigned int capacity_warning; unsigned int cycle_count; unsigned int charge_count; + unsigned int charge_ctrl_start; + unsigned int charge_ctrl_end; char model_number[BATTMGR_STRING_LEN]; char serial_number[BATTMGR_STRING_LEN]; char oem_info[BATTMGR_STRING_LEN]; @@ -426,6 +446,8 @@ static const u8 sm8350_bat_prop_map[] =3D { [POWER_SUPPLY_PROP_INTERNAL_RESISTANCE] =3D BATT_RESISTANCE, [POWER_SUPPLY_PROP_STATE_OF_HEALTH] =3D BATT_SOH, [POWER_SUPPLY_PROP_POWER_NOW] =3D BATT_POWER_NOW, + [POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD] =3D BATT_CHG_CTRL_STAR= T_THR, + [POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD] =3D BATT_CHG_CTRL_END_TH= R, }; =20 static int qcom_battmgr_bat_sm8350_update(struct qcom_battmgr *battmgr, @@ -602,6 +624,12 @@ static int qcom_battmgr_bat_get_property(struct power_= supply *psy, case POWER_SUPPLY_PROP_TIME_TO_FULL_AVG: val->intval =3D battmgr->status.charge_time; break; + case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD: + val->intval =3D battmgr->info.charge_ctrl_start; + break; + case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: + val->intval =3D battmgr->info.charge_ctrl_end; + break; case POWER_SUPPLY_PROP_MANUFACTURE_YEAR: val->intval =3D battmgr->info.year; break; @@ -627,6 +655,149 @@ static int qcom_battmgr_bat_get_property(struct power= _supply *psy, return 0; } =20 +static int qcom_battmgr_set_charge_control(struct qcom_battmgr *battmgr, + u32 target_soc, u32 delta_soc) +{ + struct qcom_battmgr_charge_ctrl_request request =3D { + .hdr.owner =3D cpu_to_le32(PMIC_GLINK_OWNER_BATTMGR), + .hdr.type =3D cpu_to_le32(PMIC_GLINK_REQ_RESP), + .hdr.opcode =3D cpu_to_le32(BATTMGR_CHG_CTRL_LIMIT_EN), + .enable =3D cpu_to_le32(1), + .target_soc =3D cpu_to_le32(target_soc), + .delta_soc =3D cpu_to_le32(delta_soc), + }; + + return qcom_battmgr_request(battmgr, &request, sizeof(request)); +} + +static int qcom_battmgr_set_charge_start_threshold(struct qcom_battmgr *ba= ttmgr, int start_soc) +{ + u32 target_soc, delta_soc; + int ret; + + if (start_soc < CHARGE_CTRL_START_THR_MIN || + start_soc > CHARGE_CTRL_START_THR_MAX) { + dev_err(battmgr->dev, "charge control start threshold exceed range: [%u = - %u]\n", + CHARGE_CTRL_START_THR_MIN, CHARGE_CTRL_START_THR_MAX); + return -EINVAL; + } + + /* + * If the new start threshold is larger than the old end threshold, + * move the end threshold one step (DELTA_SOC) after the new start + * threshold. + */ + if (start_soc > battmgr->info.charge_ctrl_end) { + target_soc =3D start_soc + CHARGE_CTRL_DELTA_SOC; + target_soc =3D min_t(u32, target_soc, CHARGE_CTRL_END_THR_MAX); + delta_soc =3D target_soc - start_soc; + delta_soc =3D min_t(u32, delta_soc, CHARGE_CTRL_DELTA_SOC); + } else { + target_soc =3D battmgr->info.charge_ctrl_end; + delta_soc =3D battmgr->info.charge_ctrl_end - start_soc; + } + + mutex_lock(&battmgr->lock); + ret =3D qcom_battmgr_set_charge_control(battmgr, target_soc, delta_soc); + mutex_unlock(&battmgr->lock); + if (!ret) { + battmgr->info.charge_ctrl_start =3D start_soc; + battmgr->info.charge_ctrl_end =3D target_soc; + } + + return 0; +} + +static int qcom_battmgr_set_charge_end_threshold(struct qcom_battmgr *batt= mgr, int end_soc) +{ + u32 delta_soc =3D CHARGE_CTRL_DELTA_SOC; + int ret; + + if (end_soc < CHARGE_CTRL_END_THR_MIN || + end_soc > CHARGE_CTRL_END_THR_MAX) { + dev_err(battmgr->dev, "charge control end threshold exceed range: [%u - = %u]\n", + CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_MAX); + return -EINVAL; + } + + if (battmgr->info.charge_ctrl_start && end_soc > battmgr->info.charge_ctr= l_start) + delta_soc =3D end_soc - battmgr->info.charge_ctrl_start; + + mutex_lock(&battmgr->lock); + ret =3D qcom_battmgr_set_charge_control(battmgr, end_soc, delta_soc); + mutex_unlock(&battmgr->lock); + if (!ret) { + battmgr->info.charge_ctrl_start =3D end_soc - delta_soc; + battmgr->info.charge_ctrl_end =3D end_soc; + } + + return 0; +} + +static int qcom_battmgr_charge_control_thresholds_init(struct qcom_battmgr= *battmgr) +{ + int ret; + u8 en, end_soc, start_soc, delta_soc; + + ret =3D nvmem_cell_read_u8(battmgr->dev->parent, "charge_limit_en", &en); + if (!ret && en !=3D 0) { + ret =3D nvmem_cell_read_u8(battmgr->dev->parent, "charge_limit_end", &en= d_soc); + if (ret < 0) + return ret; + + ret =3D nvmem_cell_read_u8(battmgr->dev->parent, "charge_limit_delta", &= delta_soc); + if (ret < 0) + return ret; + + if (delta_soc >=3D end_soc) + return -EINVAL; + + start_soc =3D end_soc - delta_soc; + end_soc =3D clamp(end_soc, CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_= MAX); + start_soc =3D clamp(start_soc, CHARGE_CTRL_START_THR_MIN, CHARGE_CTRL_ST= ART_THR_MAX); + + battmgr->info.charge_ctrl_start =3D start_soc; + battmgr->info.charge_ctrl_end =3D end_soc; + } + + return 0; +} + +static int qcom_battmgr_bat_is_writeable(struct power_supply *psy, + enum power_supply_property psp) +{ + switch (psp) { + case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD: + case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: + return 1; + default: + return 0; + } + + return 0; +} + +static int qcom_battmgr_bat_set_property(struct power_supply *psy, + enum power_supply_property psp, + const union power_supply_propval *pval) +{ + struct qcom_battmgr *battmgr =3D power_supply_get_drvdata(psy); + + if (!battmgr->service_up) + return -EAGAIN; + + switch (psp) { + case POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD: + return qcom_battmgr_set_charge_start_threshold(battmgr, pval->intval); + case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: + return qcom_battmgr_set_charge_end_threshold(battmgr, pval->intval); + default: + return -EINVAL; + } + + return 0; +} + static const enum power_supply_property sc8280xp_bat_props[] =3D { POWER_SUPPLY_PROP_STATUS, POWER_SUPPLY_PROP_PRESENT, @@ -660,6 +831,43 @@ static const struct power_supply_desc sc8280xp_bat_psy= _desc =3D { .get_property =3D qcom_battmgr_bat_get_property, }; =20 +static const enum power_supply_property x1e80100_bat_props[] =3D { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_TECHNOLOGY, + POWER_SUPPLY_PROP_CYCLE_COUNT, + POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_POWER_NOW, + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, + POWER_SUPPLY_PROP_CHARGE_FULL, + POWER_SUPPLY_PROP_CHARGE_EMPTY, + POWER_SUPPLY_PROP_CHARGE_NOW, + POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN, + POWER_SUPPLY_PROP_ENERGY_FULL, + POWER_SUPPLY_PROP_ENERGY_EMPTY, + POWER_SUPPLY_PROP_ENERGY_NOW, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_MANUFACTURE_YEAR, + POWER_SUPPLY_PROP_MANUFACTURE_MONTH, + POWER_SUPPLY_PROP_MANUFACTURE_DAY, + POWER_SUPPLY_PROP_MODEL_NAME, + POWER_SUPPLY_PROP_MANUFACTURER, + POWER_SUPPLY_PROP_SERIAL_NUMBER, + POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD, + POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD, +}; + +static const struct power_supply_desc x1e80100_bat_psy_desc =3D { + .name =3D "qcom-battmgr-bat", + .type =3D POWER_SUPPLY_TYPE_BATTERY, + .properties =3D x1e80100_bat_props, + .num_properties =3D ARRAY_SIZE(x1e80100_bat_props), + .get_property =3D qcom_battmgr_bat_get_property, + .set_property =3D qcom_battmgr_bat_set_property, + .property_is_writeable =3D qcom_battmgr_bat_is_writeable, +}; + static const enum power_supply_property sm8350_bat_props[] =3D { POWER_SUPPLY_PROP_STATUS, POWER_SUPPLY_PROP_HEALTH, @@ -692,6 +900,42 @@ static const struct power_supply_desc sm8350_bat_psy_d= esc =3D { .get_property =3D qcom_battmgr_bat_get_property, }; =20 +static const enum power_supply_property sm8550_bat_props[] =3D { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_CHARGE_TYPE, + POWER_SUPPLY_PROP_CAPACITY, + POWER_SUPPLY_PROP_VOLTAGE_OCV, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_VOLTAGE_MAX, + POWER_SUPPLY_PROP_CURRENT_NOW, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_TECHNOLOGY, + POWER_SUPPLY_PROP_CHARGE_COUNTER, + POWER_SUPPLY_PROP_CYCLE_COUNT, + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, + POWER_SUPPLY_PROP_CHARGE_FULL, + POWER_SUPPLY_PROP_MODEL_NAME, + POWER_SUPPLY_PROP_TIME_TO_FULL_AVG, + POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, + POWER_SUPPLY_PROP_INTERNAL_RESISTANCE, + POWER_SUPPLY_PROP_STATE_OF_HEALTH, + POWER_SUPPLY_PROP_POWER_NOW, + POWER_SUPPLY_PROP_CHARGE_CONTROL_START_THRESHOLD, + POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD, +}; + +static const struct power_supply_desc sm8550_bat_psy_desc =3D { + .name =3D "qcom-battmgr-bat", + .type =3D POWER_SUPPLY_TYPE_BATTERY, + .properties =3D sm8550_bat_props, + .num_properties =3D ARRAY_SIZE(sm8550_bat_props), + .get_property =3D qcom_battmgr_bat_get_property, + .set_property =3D qcom_battmgr_bat_set_property, + .property_is_writeable =3D qcom_battmgr_bat_is_writeable, +}; + static int qcom_battmgr_ac_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) @@ -1088,6 +1332,9 @@ static void qcom_battmgr_sc8280xp_callback(struct qco= m_battmgr *battmgr, case BATTMGR_BAT_CHARGE_TIME: battmgr->status.charge_time =3D le32_to_cpu(resp->time); break; + case BATTMGR_CHG_CTRL_LIMIT_EN: + battmgr->error =3D 0; + break; default: dev_warn(battmgr->dev, "unknown message %#x\n", opcode); break; @@ -1201,6 +1448,12 @@ static void qcom_battmgr_sm8350_callback(struct qcom= _battmgr *battmgr, case BATT_POWER_NOW: battmgr->status.power_now =3D le32_to_cpu(resp->intval.value); break; + case BATT_CHG_CTRL_START_THR: + battmgr->info.charge_ctrl_start =3D le32_to_cpu(resp->intval.value); + break; + case BATT_CHG_CTRL_END_THR: + battmgr->info.charge_ctrl_end =3D le32_to_cpu(resp->intval.value); + break; default: dev_warn(battmgr->dev, "unknown property %#x\n", property); break; @@ -1283,6 +1536,7 @@ static void qcom_battmgr_sm8350_callback(struct qcom_= battmgr *battmgr, } break; case BATTMGR_REQUEST_NOTIFICATION: + case BATTMGR_CHG_CTRL_LIMIT_EN: battmgr->error =3D 0; break; default: @@ -1350,11 +1604,13 @@ static char *qcom_battmgr_battery[] =3D { "battery"= }; static int qcom_battmgr_probe(struct auxiliary_device *adev, const struct auxiliary_device_id *id) { + const struct power_supply_desc *psy_desc; struct power_supply_config psy_cfg_supply =3D {}; struct power_supply_config psy_cfg =3D {}; const struct of_device_id *match; struct qcom_battmgr *battmgr; struct device *dev =3D &adev->dev; + int ret; =20 battmgr =3D devm_kzalloc(dev, sizeof(*battmgr), GFP_KERNEL); if (!battmgr) @@ -1380,9 +1636,19 @@ static int qcom_battmgr_probe(struct auxiliary_devic= e *adev, else battmgr->variant =3D QCOM_BATTMGR_SM8350; =20 + ret =3D qcom_battmgr_charge_control_thresholds_init(battmgr); + if (ret < 0) + return dev_err_probe(dev, ret, + "failed to init battery charge control thresholds\n"); + if (battmgr->variant =3D=3D QCOM_BATTMGR_SC8280XP || battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) { - battmgr->bat_psy =3D devm_power_supply_register(dev, &sc8280xp_bat_psy_d= esc, &psy_cfg); + if (battmgr->variant =3D=3D QCOM_BATTMGR_X1E80100) + psy_desc =3D &x1e80100_bat_psy_desc; + else + psy_desc =3D &sc8280xp_bat_psy_desc; + + battmgr->bat_psy =3D devm_power_supply_register(dev, psy_desc, &psy_cfg); if (IS_ERR(battmgr->bat_psy)) return dev_err_probe(dev, PTR_ERR(battmgr->bat_psy), "failed to register battery power supply\n"); @@ -1402,7 +1668,12 @@ static int qcom_battmgr_probe(struct auxiliary_devic= e *adev, return dev_err_probe(dev, PTR_ERR(battmgr->wls_psy), "failed to register wireless charing power supply\n"); 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a=ed25519-sha256; t=1758104128; l=2081; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=xJkmh8H8fqVeUkTKnSTN4qTVDnBNRbRfNDN7UjY4z8w=; b=GOkbgr4Y7240IXrxDPsyFhRguTh2EIsmP4Qnth0enjb3H6q8a1D36MyVCreJk6IKbwYi1CuZy yegMO5awAR9AXOqATkVFPj2h2Lat7WLFs5RsC/5hpb3it2Rp0ULmEP3 X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu Add nvmem cells for getting charge control thresholds if they have been set previously. Tested-by: Neil Armstrong # on Thinkpad T14S OL= ED Reviewed-by: Konrad Dybcio Signed-off-by: Fenglin Wu --- arch/arm64/boot/dts/qcom/x1-crd.dtsi | 7 +++++++ arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi | 20 ++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qco= m/x1-crd.dtsi index c9f0d505267081af66b0973fe6c1e33832a2c86b..cd3c071624ce66f8c28ee4521fe= 3db8b737757a6 100644 --- a/arch/arm64/boot/dts/qcom/x1-crd.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-crd.dtsi @@ -82,6 +82,13 @@ pmic-glink { <&tlmm 123 GPIO_ACTIVE_HIGH>, <&tlmm 125 GPIO_ACTIVE_HIGH>; =20 + nvmem-cells =3D <&charge_limit_en>, + <&charge_limit_end>, + <&charge_limit_delta>; + nvmem-cell-names =3D "charge_limit_en", + "charge_limit_end", + "charge_limit_delta"; + /* Left-side rear port */ connector@0 { compatible =3D "usb-c-connector"; diff --git a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi b/arch/arm64/boot= /dts/qcom/x1e80100-pmics.dtsi index c02fd4d15c9649c222caaafa5ed2c777a10fb4f5..eb5562e4393c88faa16d9172ee2= a1ceabef076ff 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi @@ -239,6 +239,26 @@ reboot_reason: reboot-reason@48 { }; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250917-qcom_battmgr_update-v5-9-270ade9ffe13@oss.qualcomm.com> References: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> In-Reply-To: <20250917-qcom_battmgr_update-v5-0-270ade9ffe13@oss.qualcomm.com> To: Sebastian Reichel , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heikki Krogerus , Greg Kroah-Hartman , Dmitry Baryshkov , Bryan O'Donoghue , Konrad Dybcio Cc: Subbaraman Narayanamurthy , David Collins , =?utf-8?q?Gy=C3=B6rgy_Kurucz?= , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@oss.qualcomm.com, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758104128; l=2037; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=u/UsvrdOaH8FPPbaWz45xYUdDcRqs2rzsPnEOVbRCYQ=; b=fajsAkYwMy2+oxB6R/muS3GvMix4qIVRZwPtunicG8Ju8jmojarqCRdEnoWvFtAkses3lSYhR NMBwF3eGbozDIjQDpJmCsaKSmxJxlrkqkISyZsTJ/XOLE4FpRiTrRDL X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu The X1E80100 battery management firmware sends a notification with code 0x83 when the battery charging state changes, such as switching between fast charge, taper charge, end of charge, or any other error charging states. The same notification code is used with bit[16] set if charging stops due to reaching the charge control end threshold. Additionally, a 2-bit value is added in bit[18:17] with the same code and used to indicate the charging source capability: a value of 2 represents a strong charger, 1 is a weak charger, and 0 is no charging source. The 3-MSB [18:16] in the notification code is not much useful for now, hence just ignore them and trigger a power supply change event whenever 0x83 notification code is received. This helps to eliminate the unknown notification error messages. Signed-off-by: Fenglin Wu Reported-by: Sebastian Reichel --- drivers/power/supply/qcom_battmgr.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qco= m_battmgr.c index 151cd5618ca5c70f941245e4df5a18d4778f1349..4056290b5d737f762d9adb2783d= 26bb50ec5a664 100644 --- a/drivers/power/supply/qcom_battmgr.c +++ b/drivers/power/supply/qcom_battmgr.c @@ -34,8 +34,9 @@ enum qcom_battmgr_variant { #define NOTIF_BAT_PROPERTY 0x30 #define NOTIF_USB_PROPERTY 0x32 #define NOTIF_WLS_PROPERTY 0x34 -#define NOTIF_BAT_INFO 0x81 #define NOTIF_BAT_STATUS 0x80 +#define NOTIF_BAT_INFO 0x81 +#define NOTIF_BAT_CHARGING_STATE 0x83 =20 #define BATTMGR_BAT_INFO 0x9 =20 @@ -1206,12 +1207,14 @@ static void qcom_battmgr_notification(struct qcom_b= attmgr *battmgr, } =20 notification =3D le32_to_cpu(msg->notification); + notification &=3D 0xff; switch (notification) { case NOTIF_BAT_INFO: battmgr->info.valid =3D false; fallthrough; case NOTIF_BAT_STATUS: case NOTIF_BAT_PROPERTY: + case NOTIF_BAT_CHARGING_STATE: power_supply_changed(battmgr->bat_psy); break; case NOTIF_USB_PROPERTY: --=20 2.34.1