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Wed, 17 Sep 2025 14:04:27 -0700 (PDT) From: Denzeel Oliva Date: Wed, 17 Sep 2025 21:04:26 +0000 Subject: [PATCH v3 6/7] arm64: dts: exynos990: Add UART nodes for PERIC0/1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250917-perics-add-usinodes-v3-6-a3629e4666ef@gmail.com> References: <20250917-perics-add-usinodes-v3-0-a3629e4666ef@gmail.com> In-Reply-To: <20250917-perics-add-usinodes-v3-0-a3629e4666ef@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sam Protsenko , Greg Kroah-Hartman , Jiri Slaby , Andi Shyti Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Denzeel Oliva X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758143062; l=16400; i=wachiturroxd150@gmail.com; s=20250831; h=from:subject:message-id; bh=DBBt0vuoZHxkg10PT7Lp8HKgoYQtduGWj6/5hVjFlpA=; b=mdduh2kK9o0j59gybqrKdSRfW24iRU1IakD37/4RbOpUCXCU/QSpUd78VSL8IwyYoZXt9eJMT iTDSzzVZ/n3ACHbvMbdi6bwXygh8kUHzUmJFylvJ32mqyLbx7iIrmAh X-Developer-Key: i=wachiturroxd150@gmail.com; a=ed25519; pk=3fZmF8+BzoNPhZuzL19/BkBXzCDwLBPlLqQYILU0U5k= Add UART serial nodes for the PERIC0 and PERIC1 blocks. Signed-off-by: Denzeel Oliva --- arch/arm64/boot/dts/exynos/exynos990.dtsi | 323 ++++++++++++++++++++++++++= ++++ 1 file changed, 323 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dt= s/exynos/exynos990.dtsi index 1e09f3efe685748789ffd346cd914f9a8ba68f8b..8ed534d738ec58873dfba9d5cc4= 6c358c4f6e647 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -7,6 +7,7 @@ =20 #include #include +#include =20 / { compatible =3D "samsung,exynos990"; @@ -272,6 +273,34 @@ pinctrl_peric0: pinctrl@10430000 { interrupts =3D ; }; =20 + usi_uart: usi@105400c0 { + compatible =3D "samsung,exynos990-usi", "samsung,exynos850-usi"; + reg =3D <0x105400c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_4>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric0 0x1000>; + samsung,mode =3D ; + status =3D "disabled"; + + serial_0: serial@10540000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10540000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_4>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_4>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart0_bus>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; + }; + usi0: usi@105500c0 { compatible =3D "samsung,exynos990-usi", "samsung,exynos850-usi"; reg =3D <0x105500c0 0x20>; @@ -283,6 +312,20 @@ usi0: usi@105500c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x1004>; status =3D "disabled"; + + serial_2: serial@10550000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10550000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_5>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart2_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi1: usi@105700c0 { @@ -296,6 +339,20 @@ usi1: usi@105700c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x100c>; status =3D "disabled"; + + serial_3: serial@10570000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10570000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_7>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_7>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart3_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi2: usi@105900c0 { @@ -309,6 +366,20 @@ usi2: usi@105900c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x1014>; status =3D "disabled"; + + serial_4: serial@10590000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10590000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_9>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_9>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart4_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi3: usi@105b00c0 { @@ -322,6 +393,20 @@ usi3: usi@105b00c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x101c>; status =3D "disabled"; + + serial_5: serial@105b0000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x105b0000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_11>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_11>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart5_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi4: usi@105d00c0 { @@ -335,6 +420,20 @@ usi4: usi@105d00c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x1024>; status =3D "disabled"; + + serial_6: serial@105d0000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x105d0000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_13>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_13>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart6_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi5: usi@105f00c0 { @@ -348,6 +447,20 @@ usi5: usi@105f00c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x102c>; status =3D "disabled"; + + serial_7: serial@105f0000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x105f0000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_15>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_15>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart7_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi13: usi@106300c0 { @@ -361,6 +474,20 @@ usi13: usi@106300c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x103c>; status =3D "disabled"; + + serial_15: serial@10630000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10630000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_PCLK_3>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_IPCLK_3>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart15_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi14: usi@106500c0 { @@ -374,6 +501,20 @@ usi14: usi@106500c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x1044>; status =3D "disabled"; + + serial_16: serial@10650000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10650000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_PCLK_5>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_IPCLK_5>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart16_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi15: usi@106700c0 { @@ -387,6 +528,20 @@ usi15: usi@106700c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric0 0x104c>; status =3D "disabled"; + + serial_17: serial@10670000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10670000 0xc0>; + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_PCLK_7>, + <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_IPCLK_7>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart17_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 cmu_peric1: clock-controller@10700000 { @@ -412,6 +567,34 @@ pinctrl_peric1: pinctrl@10730000 { interrupts =3D ; }; =20 + usi_bt_uart: usi@108400c0 { + compatible =3D "samsung,exynos990-usi", "samsung,exynos850-usi"; + reg =3D <0x108400c0 0x20>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_4>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&sysreg_peric1 0x1000>; + samsung,mode =3D ; + status =3D "disabled"; + + serial_1: serial@10840000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10840000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_4>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart1_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; + }; + usi6: usi@108a00c0 { compatible =3D "samsung,exynos990-usi", "samsung,exynos850-usi"; reg =3D <0x108a00c0 0x20>; @@ -423,6 +606,20 @@ usi6: usi@108a00c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x1018>; status =3D "disabled"; + + serial_8: serial@108a0000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x108a0000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_10>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_10>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart8_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi7: usi@108c00c0 { @@ -436,6 +633,20 @@ usi7: usi@108c00c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x1020>; status =3D "disabled"; + + serial_9: serial@108c0000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x108c0000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_12>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_12>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart9_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi8: usi@108e00c0 { @@ -449,6 +660,20 @@ usi8: usi@108e00c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x1028>; status =3D "disabled"; + + serial_10: serial@108e0000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x108e0000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_14>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_14>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart10_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; }; =20 usi9: usi@109000c0 { @@ -462,6 +687,20 @@ usi9: usi@109000c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x1030>; status =3D "disabled"; + + serial_11: serial@10900000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10900000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_0>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_0>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart11_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; }; =20 usi10: usi@109200c0 { @@ -475,6 +714,20 @@ usi10: usi@109200c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x1038>; status =3D "disabled"; + + serial_12: serial@10920000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10920000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_2>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_2>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart12_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; }; =20 usi11: usi@109400c0 { @@ -488,6 +741,20 @@ usi11: usi@109400c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x1040>; status =3D "disabled"; + + serial_13: serial@10940000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10940000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_4>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_4>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart13_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi12: usi@109c00c0 { @@ -501,6 +768,20 @@ usi12: usi@109c00c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x2000>; status =3D "disabled"; + + serial_14: serial@109c0000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x109c0000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_12>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_12>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart14_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi16: usi@109600c0 { @@ -514,6 +795,20 @@ usi16: usi@109600c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x1048>; status =3D "disabled"; + + serial_18: serial@10960000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10960000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_6>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_6>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart18_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi17: usi@109900c0 { @@ -527,6 +822,20 @@ usi17: usi@109900c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x1050>; status =3D "disabled"; + + serial_19: serial@10990000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x10990000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_9>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_9>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart19_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 usi18: usi@109e00c0 { @@ -540,6 +849,20 @@ usi18: usi@109e00c0 { clock-names =3D "pclk", "ipclk"; samsung,sysreg =3D <&sysreg_peric1 0x2008>; status =3D "disabled"; + + serial_20: serial@109e0000 { + compatible =3D "samsung,exynos990-uart", + "samsung,exynos8895-uart"; + reg =3D <0x109e0000 0xc0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_14>, + <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_14>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart20_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; }; =20 cmu_hsi0: clock-controller@10a00000 { --=20 2.50.1