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[217.127.72.94]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3eb9a95d225sm10117552f8f.54.2025.09.17.01.54.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Sep 2025 01:54:24 -0700 (PDT) From: Bartosz Golaszewski Date: Wed, 17 Sep 2025 10:54:06 +0200 Subject: [PATCH 2/2] gpio: generic: move GPIO_GENERIC_ flags to the correct header Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250917-gpio-generic-flags-v1-2-69f51fee8c89@linaro.org> References: <20250917-gpio-generic-flags-v1-0-69f51fee8c89@linaro.org> In-Reply-To: <20250917-gpio-generic-flags-v1-0-69f51fee8c89@linaro.org> To: Linus Walleij Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2434; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; bh=1Leh/9DOGiKOvWd/T3NGcZK2HnnCJt97WGZWNHoUPG8=; b=owEBbQKS/ZANAwAKARGnLqAUcddyAcsmYgBoync8gbutJJklv+3wEtvzITBKOjLrT+rIER/VD FiS/3PyRFOJAjMEAAEKAB0WIQQWnetsC8PEYBPSx58Rpy6gFHHXcgUCaMp3PAAKCRARpy6gFHHX cpiEEADd3wIA+21YzIr9XWN3l5geUdfcMThZQZhNtSB6PuCz0Oqv+FdWGE+2mFK2lYShwvs5IOE hMxnTstjjZSTJo8WDW66pCzecjMCNqnNkFNcwCnJqy8fhqb2yMgAat6QBArtu4DOV4hgdlAFZ+j WNnD8RTQKAnaOZI7PIZOxKGiD2gu50QRYMfskAVLVKaLpDTS1pPYhERlDpKaDTr3ASrAEJEo/0u NoIp6RqLXDRStYnnGcXK8dlP83lzKJ1M3fYMZ8Vikhfn0U1f1rhTq+mgUFb3Nh+spFepYnejATV TRL7uRcWerEpLMJzLYXrSgmQte2rpXWKtBJmhEHcvBOhTU/aVyHgzgMqEkzSVxatMpZPjlN7Ycs tqmjq244SsXVQvpxAEsD4kBPmNA0gOW93iPVVWqmcy1U3HIZIK47EQC0/CH1reGWOqru3vS+Ejq fTuJie7R/PVeeJ4nRgoeJ4/WeeEDk+EwHVrZCzYsOjwsdFc+EKUY7l6FuF8H2bHNuguczx95dBi rVAuw26Q3fwg8wKIeNlV8+sQm/P1Q6HSO4I8c2MBSW83I9hfADIWg6eUsUfiCdxWNcS8pQkbvv6 FqEng/T5DqnG2F3o5MADNm769gjpFjLLomGrZjGOVlpd24JrKSPm0xwffVYl+5AgOliKZV3cf1S GMZpshF30uo6oHg== X-Developer-Key: i=bartosz.golaszewski@linaro.org; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski These flags are specific to gpio-mmio and belong in linux/gpio/generic.h so move them there. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- include/linux/gpio/driver.h | 10 ---------- include/linux/gpio/generic.h | 10 ++++++++++ 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index e62622e42cad378f6c0bee12fb9a0b29eff1f471..fabe2baf7b509059c9d05cddb3c= 63eaf8b6f0542 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -684,16 +684,6 @@ int gpiochip_populate_parent_fwspec_fourcell(struct gp= io_chip *gc, =20 #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ =20 -#define GPIO_GENERIC_BIG_ENDIAN BIT(0) -#define GPIO_GENERIC_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ -#define GPIO_GENERIC_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ -#define GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER BIT(3) -#define GPIO_GENERIC_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output v= alue */ -#define GPIO_GENERIC_NO_OUTPUT BIT(5) /* only input */ -#define GPIO_GENERIC_NO_SET_ON_INPUT BIT(6) -#define GPIO_GENERIC_PINCTRL_BACKEND BIT(7) /* Call pinctrl direction set= ters */ -#define GPIO_GENERIC_NO_INPUT BIT(8) /* only output */ - #ifdef CONFIG_GPIOLIB_IRQCHIP int gpiochip_irqchip_add_domain(struct gpio_chip *gc, struct irq_domain *domain); diff --git a/include/linux/gpio/generic.h b/include/linux/gpio/generic.h index 162430d96660e96b995eb4a2e64183503fc618e3..ff566dc9c3cbed31bbc4e2d5958= 95f20641f8c12 100644 --- a/include/linux/gpio/generic.h +++ b/include/linux/gpio/generic.h @@ -9,6 +9,16 @@ =20 struct device; =20 +#define GPIO_GENERIC_BIG_ENDIAN BIT(0) +#define GPIO_GENERIC_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ +#define GPIO_GENERIC_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ +#define GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER BIT(3) +#define GPIO_GENERIC_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output v= alue */ +#define GPIO_GENERIC_NO_OUTPUT BIT(5) /* only input */ +#define GPIO_GENERIC_NO_SET_ON_INPUT BIT(6) +#define GPIO_GENERIC_PINCTRL_BACKEND BIT(7) /* Call pinctrl direction set= ters */ +#define GPIO_GENERIC_NO_INPUT BIT(8) /* only output */ + /** * struct gpio_generic_chip_config - Generic GPIO chip configuration data * @dev: Parent device of the new GPIO chip (compulsory). --=20 2.48.1