From nobody Thu Oct 2 14:27:45 2025 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E055D37428A; Tue, 16 Sep 2025 16:05:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=108.161.129.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758038734; cv=none; b=GhVki+LtUcLAH5yyDHP02GPg200GKABBfxF+UBfv3k02FC5q5OwV7W8RqRA/9i9vYsR3XT+Zl+nmF3mYCX/+QcuqTUNaIieoqfBQPnSILXR3sIN/drdH2hRUWs/w72IdoVi72gP0uf05F/2I2cyvDQJheTyLKJ7fenJvPE5LdmE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758038734; c=relaxed/simple; bh=mxrtv/69/+bXmmAeqkI7fArQfAwows48YYy0GhlgOLE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WqcRRCBSxo+U9w00G4qgH7gvMx4EZgAobwHiqqn6lyyb9Pq1sw+V7R141Ia/WyMh7BXQUm6SPQVSTu+cZig7pSHSaCS2zVkrdfJ3gLh2bGRpUrubzUXOT8kY40ZtsUr1Cw7l1VsdJq+KBP8x5sxQjANc6nOK9r6V5Y1YuWv8byY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gateworks.com; spf=pass smtp.mailfrom=gateworks.com; arc=none smtp.client-ip=108.161.129.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gateworks.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gateworks.com Received: from syn-068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.95) (envelope-from ) id 1uyXfM-00Aysu-1P; Tue, 16 Sep 2025 15:32:24 +0000 From: Tim Harvey To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tim Harvey Subject: [PATCH 6/7] arm64: dts: imx8mp-venice-gw702x: remove off-board uart Date: Tue, 16 Sep 2025 08:32:15 -0700 Message-Id: <20250916153216.1042625-7-tharvey@gateworks.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250916153216.1042625-1-tharvey@gateworks.com> References: <20250916153216.1042625-1-tharvey@gateworks.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" UART1 and UART3 go to a connector for use on a baseboard and as such are defined in the baseboard device-trees. Remove them from the gw702x SOM device-tree. Fixes: 0d5b288c2110 ("arm64: dts: freescale: Add imx8mp-venice-gw7905-2x") Signed-off-by: Tim Harvey Reviewed-by: Peng Fan --- .../dts/freescale/imx8mp-venice-gw702x.dtsi | 28 ------------------- 1 file changed, 28 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch= /arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi index dd9eeb3479fd..dba35b3394bc 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi @@ -396,13 +396,6 @@ &i2c3 { status =3D "okay"; }; =20 -/* off-board header */ -&uart1 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_uart1>; - status =3D "okay"; -}; - /* console */ &uart2 { pinctrl-names =3D "default"; @@ -410,13 +403,6 @@ &uart2 { status =3D "okay"; }; =20 -/* off-board header */ -&uart3 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_uart3>; - status =3D "okay"; -}; - /* off-board */ &usdhc1 { pinctrl-names =3D "default"; @@ -521,13 +507,6 @@ MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0x400001c2 >; }; =20 - pinctrl_uart1: uart1grp { - fsl,pins =3D < - MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 - MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 - >; - }; - pinctrl_uart2: uart2grp { fsl,pins =3D < MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140 @@ -535,13 +514,6 @@ MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140 >; }; =20 - pinctrl_uart3: uart3grp { - fsl,pins =3D < - MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 - MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 - >; - }; - pinctrl_usdhc1: usdhc1grp { fsl,pins =3D < MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190 --=20 2.25.1