From nobody Thu Oct 2 17:03:33 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 877882F99B0 for ; Mon, 15 Sep 2025 09:45:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.34 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757929522; cv=none; b=OKfQT29uIUlIO3ySlkJCMZZ2GobNNru+147LPjQ9X1cMG8/u/YKfX+yuUM1HO58fnPHLAMfVSPoewMYqnSSG+ZiPKWkoTuJzXHhuAnlPI27mg2rZDUDu0U9jkkZAwXa/cdjWXYcnryES/jnQQVOVbvf2JTImZpH12ZqjwMQY5YI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757929522; c=relaxed/simple; bh=ln5ORykojGXgOohZxDX4ae7MatfVfN5KFHsbfIrKxCQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:MIME-Version: Content-Type:References; b=A3Jn3ku9OWIsK0LLAuyQKlNffo1jGYlBz77dknlqTn/1RSGVg4wBJFmor7hhz5JmUlyjpzSayflvp+YvLOLhONrke+bppPnM9Y3QVH/lA7hJ1KiehojGRjTsc2z7Rg17MF8zC/tn6mL/C9dVGG9ezXOJ2AlK8xgq3+Hgcvckdi0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=uCu9GZuI; arc=none smtp.client-ip=203.254.224.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="uCu9GZuI" Received: from epcas5p3.samsung.com (unknown [182.195.41.41]) by mailout4.samsung.com (KnoxPortal) with ESMTP id 20250915094517epoutp0432df774658003a0fbcd7d9bbb212506e~la5UaQo8D2063020630epoutp04c for ; Mon, 15 Sep 2025 09:45:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout4.samsung.com 20250915094517epoutp0432df774658003a0fbcd7d9bbb212506e~la5UaQo8D2063020630epoutp04c DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1757929517; bh=AJ9+g8lkBAZ58DT0T4J7XS/I3gsTi6pRT012Sw5pz0w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uCu9GZuIDv+CzwrpHtf10FZkrIDLoElhpHBY+pwsfLKwWPUH1iQsHv91beqtMRzun 22G0/Fd/VjE84eucPjNUVOjUr6Z0zchEAQBMsM2C7rcZRDHP0ztyiwETllVm2lOGGZ LLo1/Xdpatedg5fCdRCXOI5lZACHNv0gqY3f843U= Received: from epsnrtp04.localdomain (unknown [182.195.42.156]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPS id 20250915094516epcas5p4d9e2f61d84f1637dac7c5ec9533eab5d~la5TgP2Gu1092910929epcas5p4E; Mon, 15 Sep 2025 09:45:16 +0000 (GMT) Received: from epcas5p1.samsung.com (unknown [182.195.38.94]) by epsnrtp04.localdomain (Postfix) with ESMTP id 4cQKrq564Tz6B9m6; Mon, 15 Sep 2025 09:45:15 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas5p3.samsung.com (KnoxPortal) with ESMTPA id 20250915094515epcas5p3210f5c66a24a7a7f23a04075e7636a89~la5R8b5L52434524345epcas5p3j; Mon, 15 Sep 2025 09:45:15 +0000 (GMT) Received: from bose.samsungds.net (unknown [107.108.83.9]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250915094512epsmtip265804811e091d1c92f81b7275247ed9c~la5PipG0g0931709317epsmtip2j; Mon, 15 Sep 2025 09:45:12 +0000 (GMT) From: Raghav Sharma To: krzk@kernel.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, alim.akhtar@samsung.com, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, conor+dt@kernel.org, sunyeal.hong@samsung.com, shin.son@samsung.com Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, chandan.vn@samsung.com, dev.tailor@samsung.com, karthik.sun@samsung.com, Raghav Sharma Subject: [PATCH v2 2/3] clk: samsung: exynosautov920: add clock support Date: Mon, 15 Sep 2025 15:24:00 +0530 Message-Id: <20250915095401.3699849-3-raghav.s@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250915095401.3699849-1-raghav.s@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250915094515epcas5p3210f5c66a24a7a7f23a04075e7636a89 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" CMS-TYPE: 105P cpgsPolicy: CPGSC10-543,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250915094515epcas5p3210f5c66a24a7a7f23a04075e7636a89 References: <20250915095401.3699849-1-raghav.s@samsung.com> Add support for CMU_M2M which provides clocks to M2M block, and register the required compatible and cmu_info for the same. Signed-off-by: Raghav Sharma Reviewed-by: Alim Akhtar --- drivers/clk/samsung/clk-exynosautov920.c | 45 ++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/drivers/clk/samsung/clk-exynosautov920.c b/drivers/clk/samsung= /clk-exynosautov920.c index 572b6ace14ac..75deec8bece5 100644 --- a/drivers/clk/samsung/clk-exynosautov920.c +++ b/drivers/clk/samsung/clk-exynosautov920.c @@ -27,6 +27,7 @@ #define CLKS_NR_HSI0 (CLK_DOUT_HSI0_PCIE_APB + 1) #define CLKS_NR_HSI1 (CLK_MOUT_HSI1_USBDRD + 1) #define CLKS_NR_HSI2 (CLK_DOUT_HSI2_ETHERNET_PTP + 1) +#define CLKS_NR_M2M (CLK_DOUT_M2M_NOCP + 1) =20 /* ---- CMU_TOP ----------------------------------------------------------= -- */ =20 @@ -1821,6 +1822,47 @@ static const struct samsung_cmu_info hsi2_cmu_info _= _initconst =3D { .clk_name =3D "noc", }; =20 +/* ---- CMU_M2M --------------------------------------------------------- = */ + +/* Register Offset definitions for CMU_M2M (0x1a800000) */ +#define PLL_CON0_MUX_CLKCMU_M2M_JPEG_USER 0x600 +#define PLL_CON0_MUX_CLKCMU_M2M_NOC_USER 0x610 +#define CLK_CON_DIV_DIV_CLK_M2M_NOCP 0x1800 + +static const unsigned long m2m_clk_regs[] __initconst =3D { + PLL_CON0_MUX_CLKCMU_M2M_JPEG_USER, + PLL_CON0_MUX_CLKCMU_M2M_NOC_USER, + CLK_CON_DIV_DIV_CLK_M2M_NOCP, +}; + +/* List of parent clocks for Muxes in CMU_M2M */ +PNAME(mout_clkcmu_m2m_noc_user_p) =3D { "oscclk", "dout_clkcmu_m2m_noc" }; +PNAME(mout_clkcmu_m2m_jpeg_user_p) =3D { "oscclk", "dout_clkcmu_m2m_jpeg" = }; + +static const struct samsung_mux_clock m2m_mux_clks[] __initconst =3D { + MUX(CLK_MOUT_M2M_JPEG_USER, "mout_clkcmu_m2m_jpeg_user", + mout_clkcmu_m2m_jpeg_user_p, PLL_CON0_MUX_CLKCMU_M2M_JPEG_USER, 4, 1), + MUX(CLK_MOUT_M2M_NOC_USER, "mout_clkcmu_m2m_noc_user", + mout_clkcmu_m2m_noc_user_p, PLL_CON0_MUX_CLKCMU_M2M_NOC_USER, 4, 1), +}; + +static const struct samsung_div_clock m2m_div_clks[] __initconst =3D { + DIV(CLK_DOUT_M2M_NOCP, "dout_m2m_nocp", + "mout_clkcmu_m2m_noc_user", CLK_CON_DIV_DIV_CLK_M2M_NOCP, + 0, 3), +}; + +static const struct samsung_cmu_info m2m_cmu_info __initconst =3D { + .mux_clks =3D m2m_mux_clks, + .nr_mux_clks =3D ARRAY_SIZE(m2m_mux_clks), + .div_clks =3D m2m_div_clks, + .nr_div_clks =3D ARRAY_SIZE(m2m_div_clks), + .nr_clk_ids =3D CLKS_NR_M2M, + .clk_regs =3D m2m_clk_regs, + .nr_clk_regs =3D ARRAY_SIZE(m2m_clk_regs), + .clk_name =3D "noc", +}; + static int __init exynosautov920_cmu_probe(struct platform_device *pdev) { const struct samsung_cmu_info *info; @@ -1851,6 +1893,9 @@ static const struct of_device_id exynosautov920_cmu_o= f_match[] =3D { }, { .compatible =3D "samsung,exynosautov920-cmu-hsi2", .data =3D &hsi2_cmu_info, + }, { + .compatible =3D "samsung,exynosautov920-cmu-m2m", + .data =3D &m2m_cmu_info, }, { } }; --=20 2.34.1