From nobody Thu Oct 2 16:59:07 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38ED42F6182; Mon, 15 Sep 2025 08:57:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757926637; cv=none; b=qMkRLoJYa1jCSkdXE2GNXuR62l+wbcGeUaWN8ji+REa7KhHYb44YrOFYCJYnnbf9//+dP8dhhDVAObdwMoJP7lZsJOp+soxypAJdLubtDG9h9RzS36rnf/9lok0pM7a2ev7Oygv4OPysD5Hw5aAgREDC+0c5pRoN8rhO16ZTkjI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757926637; c=relaxed/simple; bh=ObJzm88OJ49mVZNrIXgLd5Q7+GhtWwWLGemAvCRoya0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=M0/pvF7FtmkRph5FZXUWuR4hUeIWPseVkoJsMIXsBnUhp0cwzP7g73mjLHm8HdVnSQ8ylPxM5GXPFKuohIRd08/1YN9VXrz5aYEGLECDAA1qUEk71dmdWhTMz/07qT9e2XwFii6P4qrlBYa3c3xEZhTGvbhNCujo/WLF0usG5vI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LgP5RyLa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LgP5RyLa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F14CFC4CEF9; Mon, 15 Sep 2025 08:57:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757926637; bh=ObJzm88OJ49mVZNrIXgLd5Q7+GhtWwWLGemAvCRoya0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LgP5RyLabbg6LSTg5bpNOSmiVY6wQkC0XwjFuhIGyyo5S8tPuBLMs7kztQnSIrZ9Z GzaVXR6B9q7rqI2nNURJzuvhY0ArAXqKKngj1vgPj/BOVXZya+TUZTLR1qwTmTrgUA g32LoxILkX0wrOqaNvRB8YaU6Aym3BAdnlUKuSD//nyQ1SSXdLtT0l3/8vyTXDS88K qGN62vNzej0GdTuYKjEwosyGFJwQAv0Yj5WA0YE/KpFX5GBzy9z6CKWD56lSvLKkK4 Tlgh7k5TWM0sQJOGCjCfynfdoppgnCAErMQyhe8ovfP9q/fI+vwwJo9z1ZxzFxrPtX pGfrnCOI/ADxA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1uy51P-00000006IHP-0xfB; Mon, 15 Sep 2025 08:57:15 +0000 From: Marc Zyngier To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org Cc: Thomas Gleixner , Mark Rutland , Will Deacon , "Rafael J. Wysocki" , Rob Herring , Saravana Kannan , Greg Kroah-Hartman , Sven Peter , Janne Grunau , Suzuki K Poulose , James Clark Subject: [PATCH v2 16/25] genirq: Allow per-cpu interrupt sharing for non-overlapping affinities Date: Mon, 15 Sep 2025 09:56:53 +0100 Message-Id: <20250915085702.519996-17-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20250915085702.519996-1-maz@kernel.org> References: <20250915085702.519996-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, tglx@linutronix.de, mark.rutland@arm.com, will@kernel.org, rafael@kernel.org, robh@kernel.org, saravanak@google.com, gregkh@linuxfoundation.org, sven@kernel.org, j@jannau.net, suzuki.poulose@arm.com, james.clark@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Interrupt sharing for percpu-devid interrupts is forbidden, and for good reasons. These are interrupts generated *from* a CPU and handled by itself (timer, for example). Nobody in their right mind would put two devices on the same pin (and if they have, they get to keep the pieces...). But this also prevents more benign cases, where devices are connected to groups of CPUs, and for which the affinities are not overlapping. Effectively, the only thing they share is the interrupt number, and nothing else. Let's tweak the definition of IRQF_SHARED applied to percpu_devid interrupts to allow this particular case. This results in extra validation at the point of the interrupt being setup and freed, as well as a tiny bit of extra complexity for interrupts at handling time (to pick the correct irqaction). Signed-off-by: Marc Zyngier --- kernel/irq/chip.c | 8 ++++-- kernel/irq/manage.c | 67 +++++++++++++++++++++++++++++++++++++-------- 2 files changed, 61 insertions(+), 14 deletions(-) diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 869068ec6ac91..f60a2268fad1f 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -898,8 +898,9 @@ void handle_percpu_irq(struct irq_desc *desc) void handle_percpu_devid_irq(struct irq_desc *desc) { struct irq_chip *chip =3D irq_desc_get_chip(desc); - struct irqaction *action =3D desc->action; unsigned int irq =3D irq_desc_get_irq(desc); + unsigned int cpu =3D smp_processor_id(); + struct irqaction *action; irqreturn_t res; =20 /* @@ -911,12 +912,15 @@ void handle_percpu_devid_irq(struct irq_desc *desc) if (chip->irq_ack) chip->irq_ack(&desc->irq_data); =20 + for (action =3D desc->action; action; action =3D action->next) + if (cpumask_test_cpu(cpu, action->affinity)) + break; + if (likely(action)) { trace_irq_handler_entry(irq, action); res =3D action->handler(irq, raw_cpu_ptr(action->percpu_dev_id)); trace_irq_handler_exit(irq, action, res); } else { - unsigned int cpu =3D smp_processor_id(); bool enabled =3D cpumask_test_cpu(cpu, desc->percpu_enabled); =20 if (enabled) diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 49c237aca2a70..39db60a5f36f3 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -1418,6 +1418,19 @@ setup_irq_thread(struct irqaction *new, unsigned int= irq, bool secondary) return 0; } =20 +static bool valid_percpu_irqaction(struct irqaction *old, struct irqaction= *new) +{ + do { + if (cpumask_intersects(old->affinity, new->affinity) || + old->percpu_dev_id =3D=3D new->percpu_dev_id) + return false; + + old =3D old->next; + } while (old); + + return true; +} + /* * Internal function to register an irqaction - typically used to * allocate special interrupts that are part of the architecture. @@ -1438,6 +1451,7 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, = struct irqaction *new) struct irqaction *old, **old_ptr; unsigned long flags, thread_mask =3D 0; int ret, nested, shared =3D 0; + bool per_cpu_devid; =20 if (!desc) return -EINVAL; @@ -1447,6 +1461,8 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, = struct irqaction *new) if (!try_module_get(desc->owner)) return -ENODEV; =20 + per_cpu_devid =3D irq_settings_is_per_cpu_devid(desc); + new->irq =3D irq; =20 /* @@ -1554,13 +1570,20 @@ __setup_irq(unsigned int irq, struct irq_desc *desc= , struct irqaction *new) */ unsigned int oldtype; =20 - if (irq_is_nmi(desc)) { + if (irq_is_nmi(desc) && !per_cpu_devid) { pr_err("Invalid attempt to share NMI for %s (irq %d) on irqchip %s.\n", new->name, irq, desc->irq_data.chip->name); ret =3D -EINVAL; goto out_unlock; } =20 + if (per_cpu_devid && !valid_percpu_irqaction(old, new)) { + pr_err("Overlapping affinities for %s (irq %d) on irqchip %s.\n", + new->name, irq, desc->irq_data.chip->name); + ret =3D -EINVAL; + goto out_unlock; + } + /* * If nobody did set the configuration before, inherit * the one provided by the requester. @@ -1711,7 +1734,7 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, = struct irqaction *new) if (!(new->flags & IRQF_NO_AUTOEN) && irq_settings_can_autoenable(desc)) { irq_startup(desc, IRQ_RESEND, IRQ_START_COND); - } else { + } else if (!per_cpu_devid) { /* * Shared interrupts do not go well with disabling * auto enable. The sharing interrupt might request @@ -2346,7 +2369,7 @@ void disable_percpu_nmi(unsigned int irq) static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu= *dev_id) { struct irq_desc *desc =3D irq_to_desc(irq); - struct irqaction *action; + struct irqaction *action, **action_ptr; =20 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); =20 @@ -2354,21 +2377,33 @@ static struct irqaction *__free_percpu_irq(unsigned= int irq, void __percpu *dev_ return NULL; =20 scoped_guard(raw_spinlock_irqsave, &desc->lock) { - action =3D desc->action; - if (!action || action->percpu_dev_id !=3D dev_id) { - WARN(1, "Trying to free already-free IRQ %d\n", irq); - return NULL; + action_ptr =3D &desc->action; + for (;;) { + action =3D *action_ptr; + + if (!action) { + WARN(1, "Trying to free already-free IRQ %d\n", irq); + return NULL; + } + + if (action->percpu_dev_id =3D=3D dev_id) + break; + + action_ptr =3D &action->next; } =20 - if (!cpumask_empty(desc->percpu_enabled)) { - WARN(1, "percpu IRQ %d still enabled on CPU%d!\n", - irq, cpumask_first(desc->percpu_enabled)); + if (cpumask_intersects(desc->percpu_enabled, action->affinity)) { + WARN(1, "percpu IRQ %d still enabled on CPU%d!\n", irq, + cpumask_first_and(desc->percpu_enabled, action->affinity)); return NULL; } =20 /* Found it - now remove it from the list of entries: */ - desc->action =3D NULL; - desc->istate &=3D ~IRQS_NMI; + *action_ptr =3D action->next; + + /* Demote from NMI if we killed the last action */ + if (!desc->action) + desc->istate &=3D ~IRQS_NMI; } =20 unregister_handler_proc(irq, action); @@ -2462,6 +2497,14 @@ struct irqaction *create_percpu_irqaction(irq_handle= r_t handler, unsigned long f action->percpu_dev_id =3D dev_id; action->affinity =3D affinity; =20 + /* + * We allow some form of sharing for non-overlapping affinity + * masks. Obviously, covering all CPUs prevents any sharing + * the first place. + */ + if (!cpumask_equal(affinity, cpu_possible_mask)) + action->flags |=3D IRQF_SHARED; + return action; } =20 --=20 2.39.2