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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Henrik Grimler Cc: Shin Son , linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/3] arm64: dts: exynosautov920: Add tmu hardware binding Date: Mon, 15 Sep 2025 13:07:15 +0900 Message-ID: <20250915040715.486733-4-shin.son@samsung.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250915040715.486733-1-shin.son@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250915040802epcas2p3bcc88e1958bf0f6cf4133e687c54b81c X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250915040802epcas2p3bcc88e1958bf0f6cf4133e687c54b81c References: <20250915040715.486733-1-shin.son@samsung.com> Create a new exynosautov920-tmu.dtsi describing new TMU hardware and include it from exynosautov920.dtsi. The exynosautov920-tmu node uses the misc clock as its source and exposes new DT property: - samsung,hw-sensor-indices: List of hardware sensor indices physically connected to this TMU block. This TMU binding defines six thermal zones with a critical trip point at 125 degrees: tmu_top : cpucl0-0, cpucl1 tmu_sub0: cpucl0-1, cpucl2 tmu_sub1: g3d, npu Signed-off-by: Shin Son --- .../boot/dts/exynos/exynosautov920-tmu.dtsi | 97 +++++++++++++++++++ .../arm64/boot/dts/exynos/exynosautov920.dtsi | 31 ++++++ 2 files changed, 128 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi b/arch/arm6= 4/boot/dts/exynos/exynosautov920-tmu.dtsi new file mode 100644 index 000000000000..eb1864e69bef --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAuto920 TMU configurations device tree source + * + * Copyright (c) 2020 Samsung Electronics Co., Ltd. + * + * Samsung's ExynosAuto920 SoC TMU(Thermal Managemenut Unit) are listed as + * device tree nodes in this file. + */ + +/ { + thermal-zones { + cpucl0-0-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&tmu_top 0>; + + trips { + cpucl0_0_critical: cpucl0-0-critical { + temperature =3D <125000>; /* millicelsius */ + hysteresis =3D <0>; /* millicelsius */ + type =3D "critical"; + }; + }; + }; + + cpucl0-1-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&tmu_sub0 0>; + + trips { + cpucl0_1_critical: cpucl0-1-critical { + temperature =3D <125000>; /* millicelsius */ + hysteresis =3D <0>; /* millicelsius */ + type =3D "critical"; + }; + }; + }; + + cpucl1-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&tmu_top 1>; + + trips { + cpucl1_critical: cpucl1-critical { + temperature =3D <125000>; /* millicelsius */ + hysteresis =3D <0>; /* millicelsius */ + type =3D "critical"; + }; + }; + }; + + cpucl2-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&tmu_sub0 1>; + + trips { + cpucl2_critical: cpucl2-critical { + temperature =3D <125000>; /* millicelsius */ + hysteresis =3D <0>; /* millicelsius */ + type =3D "critical"; + }; + }; + }; + + g3d-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&tmu_sub1 0>; + + trips { + g3d_critical: g3d-critical { + temperature =3D <125000>; /* millicelsius */ + hysteresis =3D <0>; /* millicelsius */ + type =3D "critical"; + }; + }; + }; + + npu-thermal { + polling-delay-passive =3D <0>; + polling-delay =3D <0>; + thermal-sensors =3D <&tmu_sub1 1>; + + trips { + npu_critical: npu-critical { + temperature =3D <125000>; /* millicelsius */ + hysteresis =3D <0>; /* millicelsius */ + type =3D "critical"; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/bo= ot/dts/exynos/exynosautov920.dtsi index 0fdf2062930a..642f766d4106 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -330,6 +330,36 @@ watchdog_cl1: watchdog@10070000 { samsung,cluster-index =3D <1>; }; =20 + tmu_top: tmu@100a0000 { + compatible =3D "samsung,exynosautov920-tmu"; + reg =3D <0x100A0000 0x1000>; + interrupts =3D ; + #thermal-sensor-cells =3D <1>; + clocks =3D <&cmu_misc CLK_DOUT_MISC_NOCP>; + clock-names =3D "tmu_apbif"; + samsung,hw-sensor-indices =3D <1 2 3 4 5 6 7 8 9 10 11 12>; + }; + + tmu_sub0: tmu@100b0000 { + compatible =3D "samsung,exynosautov920-tmu"; + reg =3D <0x100B0000 0x1000>; + interrupts =3D ; + #thermal-sensor-cells =3D <1>; + clocks =3D <&cmu_misc CLK_DOUT_MISC_NOCP>; + clock-names =3D "tmu_apbif"; + samsung,hw-sensor-indices =3D <3 4 5 6 7 8 9 10>; + }; + + tmu_sub1: tmu@100c0000 { + compatible =3D "samsung,exynosautov920-tmu"; + reg =3D <0x100C0000 0x1000>; + interrupts =3D ; + #thermal-sensor-cells =3D <1>; + clocks =3D <&cmu_misc CLK_DOUT_MISC_NOCP>; + clock-names =3D "tmu_apbif"; + samsung,hw-sensor-indices =3D <1 2 3 4 6 7>; + }; + gic: interrupt-controller@10400000 { compatible =3D "arm,gic-v3"; #interrupt-cells =3D <3>; @@ -1507,3 +1537,4 @@ timer { }; =20 #include "exynosautov920-pinctrl.dtsi" +#include "exynosautov920-tmu.dtsi" --=20 2.50.1