From nobody Thu Oct 2 16:48:56 2025 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5C2925F99F for ; Sun, 14 Sep 2025 12:42:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853761; cv=none; b=upJps5VsD/MKCSvsiW63+wGIcI4M//ZBEF/1o0A7uiTDs9Tene75XgvN1UQK5kzQJ+Si6nRtk/6Uwgt1l5QKQZzLOWP7DHPE7mJ3sCIZpWePaE60jKHhcwwMWYwlTD9SKpX76AORZXnS20aHPBz3cs0mTi1oi9TWbhwfn4UXauk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853761; c=relaxed/simple; bh=y0sCz1ox1pdVdqC9lyNwJysTnUl+q01sDp++N8XGWHE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=F45vEjjRCUgqA3el+gJ1OypP8S6jETuJDgcoUOJZ3LdrmMP0MXN+DdPSgKOc2ujzsWLSxJD71eBdy6ZkqGTIQDHSvTy3etd6dO/yMjyOY04uNy0gMEo4ZfsGaqyjtaqMZDS0aCcB13r7BNwlofFtfMlyvDUCljVQwXf4kOM+ito= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=LHpsT/Hc; arc=none smtp.client-ip=209.85.128.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LHpsT/Hc" Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-45ddc7d5731so23950215e9.1 for ; Sun, 14 Sep 2025 05:42:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1757853758; x=1758458558; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7YlK8x1e1nNbpl5BkBqgVftDE3O74o0MrUDh59tTEnY=; b=LHpsT/HcJwdMOk1R6v1K7d7gfNZL5c3gCpcFNPMt6d/dhj7g8tpFb1tGLNTj9/Ve/0 4Wgp6OMRrhSi5AcxzZGkw4WsmKROi0hKkJnUsuHcASVoKvqIV00p+HLaLFYDBlSOAMQz W8H3vGNWgfeV4j6fc698DcIvqhblHNOAzWZDGOzVuhrOMCBWjj/w6Iyf+9f9i/CpfcUt 9LAWiHnpwJampHPy+xoKhT71YUY5H4uAQ7KSk3MRkc++BQQScNwaVDEUIEZmu525vfWm mHNLnXfotArsYxsp5Bu6paQiLgGeCHYoZfQQogcv2CPaKGvt52l9R5zI9wBsPkuNY3X8 p8+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757853758; x=1758458558; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7YlK8x1e1nNbpl5BkBqgVftDE3O74o0MrUDh59tTEnY=; b=dkQs7m4o63DxNDVLpLkjlQGcNBYZ1Z6+XHtZ/YDxAS5FpEDmB/wvjN9yrlwxsqzTqP w7/0KFJ6mA8ZKI0wHdu9GQ7nn2AZSX5wvCzmTjm0m8tSFDPXKuJAcgMoCeIlwKdtqbPp dmUipFwH8v7JZ9bggdIvb+MFEtP9WE2gAmDNQo/3IDfArvJ8VQGr8spt1l8eGhpuSp0q JOYSmI9RHUfFnaZRnPEy4/TDqG59z86oKBP9rj10mHqsSZcGkcveXv2odueFNK3UYmei 3nyEdsIZE/uEhgDnSQLPugqiQe9XQgWnXOl9CFCevAM/t9HmMsheDIUZ/KExjt6racx3 TMXw== X-Forwarded-Encrypted: i=1; AJvYcCV5wYvVoTozqCtd1g8iqI3k/Ons0YIdTJ8wqFsO8uciA/TzuMHMViskDrppcREMTLIwzwyVNr8/79BEIpk=@vger.kernel.org X-Gm-Message-State: AOJu0YzIGtCd9j6MjJPdqyqxOcufe1ZGd7OKjgrAQImC82mK12BY/q6R Wntymy0X71GnkOTSKkztNxRWFtXhCpVLlfzs0/+LxZjo6/2n+drp+a7E X-Gm-Gg: ASbGnct4eRAUnwKNboZrJsE+1KBxsTLIp6SOImfvfNPqQMh+Zaw7VfNgTZwo1x8s8+I L2fQcha2DPJWCzNtTT6mQHYXppH6ycweTpEKsBaViM04NWYMZ0KWr6XV1LNozLlE1irdGENFjrn uZ+bY74nY3MjmMjrRr512W/OwjJlSzaMKk03Uprp4tvXFMVIMQUT0Qs6UwIfosci31BhGYI6wT1 sTFDE4l+JKQIO0aWrAfpmxlrxeGoe8fxLDj5O7PZFCn+CQ5fUN3MoKrOaietDcIlbHg0+7hr1Jt +L0xVzhO6L0ulqUuKu4Q75P+42vBtO0opZ9Py2riQrG4tFN+mycqqmztaxmMqR7ccS9uvkCLcXN I+VT6hzp8YEyqt0rIzNkqV3tgL3lVUWBoWGqGrwFMpfQRlmyEO04wbwO7bWOrvYrPgxA+prvmRy Be0/U0L3zz X-Google-Smtp-Source: AGHT+IELVFIlesJEmaJQpWXNNvn35JfGIecuwQDqOHfPhALJRBcTy5rG9hu4+nxlOgJqxNq0ak5Xxw== X-Received: by 2002:a05:6000:178c:b0:3de:78c8:120c with SMTP id ffacd0b85a97d-3e765a139bdmr7119284f8f.38.1757853757902; Sun, 14 Sep 2025 05:42:37 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3e9511abbccsm3727773f8f.9.2025.09.14.05.42.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Sep 2025 05:42:37 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Lee Jones , Liam Girdwood , Mark Brown , Alexandre Belloni Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/7] regulator: dt-bindings: add documentation for s2mps16-pmic regulators Date: Sun, 14 Sep 2025 15:42:21 +0300 Message-ID: <20250914124227.2619925-2-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> References: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The S2MPS16 is a PMIC found in exynos8890 devices, which controls voltage regulators - 38 LDOs, of which 11 are used for CP, and 11 BUCKs, of which 1 is used for CP. Provide documentation for devicetree definitions, regulator naming patterns, etc. Signed-off-by: Ivaylo Ivanov --- .../bindings/regulator/samsung,s2mps16.yaml | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/samsung,s2m= ps16.yaml diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mps16.ya= ml b/Documentation/devicetree/bindings/regulator/samsung,s2mps16.yaml new file mode 100644 index 000000000..ede87d3b9 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/samsung,s2mps16.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/samsung,s2mps16.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S2MPS16 Power Management IC regulators + +maintainers: + - Ivaylo Ivanov + +description: | + This is a part of device tree bindings for S2M and S5M family of Power + Management IC (PMIC). + + The S2MPS16 provides buck and LDO regulators. + + See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for + additional information and example. + +patternProperties: + # 27 LDOs + "^ldo([1-9]|1[0-3]|2[5-9]|3[0-8])$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single LDO regulator. + + LDOs 14-24 are used for CP, and they're left unimplemented due to la= ck + of documentation on them. + + required: + - regulator-name + + # 10 bucks + "^buck([1-9]|1[0-1])$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single BUCK regulator. + + BUCK 10 is used for CP, and it's left unimplemented due to lack of + documentation on it. + + required: + - regulator-name + +additionalProperties: false --=20 2.43.0 From nobody Thu Oct 2 16:48:56 2025 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33C19266B59 for ; Sun, 14 Sep 2025 12:42:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853762; cv=none; b=O75ZE/ZENKy5877UwmB5yPhwamvKVMVdayzmvIhhB4XhmsJLozESLIy+iWywM0O7GuQ/lyOz15C46D2zeOGs3hd2wYCfw2Q/zT8bTxu8GbsTpp7k+oK+KRAwbM1TmcHdh2tM5w/p3DXeA7ZWs++WVeT8ovD1WPspdrZcW2d09MA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853762; c=relaxed/simple; bh=XF2fZOZPuf6TK3Ja6tqEkOXwBn2O95DGQeB9O8Y0xMA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QJ05d9FRIT9RG/rcNdw9i0K1OfkCnjcT+Q5wvzYlehd5A0sR+gQGSItGoYBJjDFAh3ioM8vpkiy/Am+pKAswcibbTutRKb2Mcnr+MeexfKlQpJpmOyz4X2tsmhdSEzdRlGG1NOU0kTUbvaY5aFIUPzfGstF4HrVbpWvakJG5FnY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=d37bmD31; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="d37bmD31" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-45f2b062b86so2898955e9.1 for ; Sun, 14 Sep 2025 05:42:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1757853759; x=1758458559; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sL3h2k4pBCTkRmow4y5yXo+3wwdOgJcWXSzEovR09vA=; b=d37bmD317qyGBZNawxzwXLvWfUHvPkh6QbPiceO8BC021OePWQtyhk7BVDaXmhCl42 ceGbsDirz142J1h2rWJORSNUNfaiRd8UIekA0ojNEg50nZCVW532D1y3zSX8FS9JDah+ A28HiWiri+aYFCaIWnrXfhg5gJsxzi2Pk/almAqvbJ6W1WFzYKgYnhmaa41C1s/7xjVc YC9vD77otOa7VG7XQrgTxwtUBp7cLDlrzXK0gfTVIPyrdxdsJDfxz1Kb472vYFhtcNao S/dMMCZAq+zqOcJl4z9Nh2xVEzhLh3mhCOMsN517H0G3wHzT+HdNhk+Z5HcRER7HhFPv CVOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757853759; x=1758458559; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sL3h2k4pBCTkRmow4y5yXo+3wwdOgJcWXSzEovR09vA=; b=Qmw2NzjpkCm8njkJbTa1t0pQFJNZI62n1q/tgO6HFgCLnVxXeHq4HQM0Rb5CcAlp7j l3PSSqZc/PH9/3nJhSr0+u0vbE6NedmYBTu0VXE9oC9ohv8cVoI2APOZT3h9D7TzIgtk qx1DsiI0L3yFX/FlTF3AZw56d1C62Uqm/9a8y9Z6vYKd7mxNNTnB0ZYCrIkUN0xjuxlx EWC9FKMvAio9nWOXw1/2skkQJdEimo1P/yWi7s7ujjbv4jTUcjzkiE7lkDlk6hNucQgr FXKuIZs+R5IIC4Gp06Iqp6kWkkwYawDc+It2e6oYI8Ff1kq1i+pnwTL1rIabTdUCUtix JOiQ== X-Forwarded-Encrypted: i=1; AJvYcCU3AsiutYh2aLOYkNA9WeCqp8wapphPqlpCXoxYnDvC/AFVus/Kgx6mnDvaKwF4zD7iroqvrZEnWf1glzk=@vger.kernel.org X-Gm-Message-State: AOJu0YxszNPlMfrIIZvr/lNIZ06rgDaKf99Z9VJV56o+TxZH2bUnlWyC UkZlUiVxEdo2cyPAafFNedsqeJkuPev9Hm96LyS3EoEqpT/uiojvecIn X-Gm-Gg: ASbGncv3Q19a49rZhi1zHUaaUaMSZuU94fcQNWF1/31WFfoRTqqK7K/GuwPIUjoYUBi VfYlKoUI95SlsdWsMuljwpK7BHAH+ZKTnE63vARBnGB9GzPpo9ywjIKpuAsxDpSsKhm2Z+M3bwC VbDKWexiZMLNxUMIEeLvPxUOlgMDdjzVMMdtLNx/s6IwNEVtxYLnJNHUDVq1L2mVF2isSPAKF2k oY6oL8n40AdfXjSNitoLyesN1t0b4dvRnRkY62CHZPu5LboFMpSaO9gdKAHD2bq+SpMv5LaQ2qJ rEqvDJtdBOLEIwvM/V9enDqhIZefKQxi0rc/KxPZr7RQ160Eunaq/typb4HGv8/1tdyeYVzxDLA bDkQimayUDU23fHBl8qlCP+wkTuTGCAalon3DahbO82YPSD/rAgKnzXdVjw2dNzkYXo1T6vZgQF KFy3ENp2yo X-Google-Smtp-Source: AGHT+IFYosvL3hlqrkRZJH4U1D4gQFiKB/hkk7FIzmqQ6IP5m5X7qRfmT1T4W59kT9wKZJ/WlTy0JQ== X-Received: by 2002:a05:600c:5798:b0:45d:ddc6:74a9 with SMTP id 5b1f17b1804b1-45f211d5507mr57562525e9.12.1757853759405; Sun, 14 Sep 2025 05:42:39 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3e9511abbccsm3727773f8f.9.2025.09.14.05.42.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Sep 2025 05:42:38 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Lee Jones , Liam Girdwood , Mark Brown , Alexandre Belloni Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/7] dt-bindings: mfd: samsung,s2mps11: add compatible for s2mps16-pmic Date: Sun, 14 Sep 2025 15:42:22 +0300 Message-ID: <20250914124227.2619925-3-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> References: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" S2MPS16 is a PMIC present in Samsung's exynos8890 devices. It houses voltage regulators (38 LDOs and 11 BUCKs), an RTC and a clocks module. Add the compatible string "samsung,s2mps16-pmic" to the PMIC. Signed-off-by: Ivaylo Ivanov Reviewed-by: Rob Herring (Arm) --- .../bindings/mfd/samsung,s2mps11.yaml | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml b/D= ocumentation/devicetree/bindings/mfd/samsung,s2mps11.yaml index 31d544a9c..445596323 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/samsung,s2mps11.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Samsung S2MPS11/13/14/15 and S2MPU02 Power Management IC +title: Samsung S2MPS11/13/14/15/16 and S2MPU02 Power Management IC =20 maintainers: - Krzysztof Kozlowski @@ -13,7 +13,7 @@ description: | This is a part of device tree bindings for S2M and S5M family of Power Management IC (PMIC). =20 - The Samsung S2MPS11/13/14/15 and S2MPU02 is a family of Power Management= IC + The Samsung S2MPS11/13/14/15/16 and S2MPU02 is a family of Power Managem= ent IC which include voltage and current regulators, RTC, clock outputs and oth= er sub-blocks. =20 @@ -25,6 +25,7 @@ properties: - samsung,s2mps13-pmic - samsung,s2mps14-pmic - samsung,s2mps15-pmic + - samsung,s2mps16-pmic - samsung,s2mpu02-pmic - samsung,s2mpu05-pmic =20 @@ -141,6 +142,18 @@ allOf: samsung,s2mps11-acokb-ground: false samsung,s2mps11-wrstbi-ground: false =20 + - if: + properties: + compatible: + contains: + const: samsung,s2mps16-pmic + then: + properties: + regulators: + $ref: /schemas/regulator/samsung,s2mps16.yaml + samsung,s2mps11-acokb-ground: false + samsung,s2mps11-wrstbi-ground: false + - if: properties: compatible: --=20 2.43.0 From nobody Thu Oct 2 16:48:56 2025 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD37226CE05 for ; Sun, 14 Sep 2025 12:42:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853764; cv=none; b=g8J7Zt4X7yXQPh9pqIguefKvE+qG8bGR+8wpdA3gKj9wTkJED7+0rUNtbeEHB6ekSizHf3waULIfD3PCXK8ZfctEmrLe/w5/qGtlRB+Q6wFg4R9ap1kjGaleVAJbrV9PmHn8G/2R8An7J8hy9GuZJAIdIoiscU0p5HAiB5Vk2Bo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853764; c=relaxed/simple; bh=BohS/rc6qOfBI1KkyLNcfUimneuQ7sG3nV/JMTpWO3w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=L76mAOYs1TsHOzDQFQqmLdblI3r8Cqbm6ZZgRsYiARkr9r+JxTLRvT5Vv90WDtIV7MwRH47X4FMoVJD4ULmHMaiGsCKL//0+2qBsCa3uUdAEltdI/iyjCbkJzOL0uJ/WCwwO+DdM2rJNSMQXvAam3/ZKwmAT9Sl/zx4YvBNv9wA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=est7Cdnw; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="est7Cdnw" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-3b9edf4cf6cso2510599f8f.3 for ; Sun, 14 Sep 2025 05:42:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1757853761; x=1758458561; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gJlsN1Jaqy7XiIrMqRe29GOaxskmgZS6O5NApkSCPIc=; b=est7CdnwjfHJ8I8fx2plLYIVT8IyjZE2DFzVong6BRhvoA8lbrCXZFgcTdjDE0ooIr YZLx41m0N62rTzdEyAmn62YBdh0PRwYYu/2KAYTYwF202nTo6VB1nqctNgthAa7c/ikY oHbkd0hHAg1L31qsPzysIUkLz21GycWMbqbvo8rFidAkFP8TOTfIVWrvl41EokS53Gdp D4/H2zWhTZpHlnWlCHTjLcqbWTlWX1fzaqmr2r5INMtDgBJHi5dtnVSaBrowyAUss82E sZzjgjnfQnEFjMZAnYu+Q031Ld5x+endnHkbmXkIMkxPQisDTOmYZYPL0rvH1nZ35tmQ 28fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757853761; x=1758458561; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gJlsN1Jaqy7XiIrMqRe29GOaxskmgZS6O5NApkSCPIc=; b=m+20+jRGZ02Uk+5oje1d0v2lAzA2krcbecv+jLyNL8CitBcHjThSaqRPiNOyEI9gic iHfhwsS6hi8+c4D4DOwVr6FnxKDkdk5zTFEgQewc0AVAo5fiWNyrCJUV79F/yOMWmepn IVDiRvRxWcisMwxYjvcbJHK6NZMR/vwwLQqR1d+0rLYR8m+6cLuT9rMnFCEQA5g5sHEF LaDAhrT1i2pPHjfTAPQz3/+6IPgH339PT/wMjlsi+e7RZky1UswPtZEweKrVoyuDeGmh +pn5+WNyK82DpR8pKiQXTk5cEUdktYZUQ4C8xdmbmlz5OLDfw5PTea29CQpK4RMOF1uP G2GQ== X-Forwarded-Encrypted: i=1; AJvYcCUxX6+3n/hzEfliHDDDPkzOIwRZV83VOsR333udFOie5FbahKzvnbDCRGwWwwezdhL8gYaHl35/lNPRjTk=@vger.kernel.org X-Gm-Message-State: AOJu0YxANQjOfkDg1ssMlVO9rxsDQN75kMzV3AWHKiwmqQukDy7zmbqI Z7Gjnj/YSKtlQ1cOK9MEs3zb6iXh6tdBrRFziCZqVwkvhJ/H3CqdMtEF X-Gm-Gg: ASbGncsF/mtOUI7qxqhgfFcKyIBorkTX5QpIQQC8aa72DN5rD/vrtS39OU6/Bn0UpP+ /FwKoG9FtpsleBu331OsH9Zg+zPle5bqIx9xKg2YukJtZjrPK5VoYmfkgnMirGm1+S29t4L5WHx RSWMDSkBBNk1+rW8QJjx8cl3qest1MtF7DDGwR5wMoc/jrOpY3lAaqgzEt7xcT+voYYPNLwJRHO BbbpDbPSrseGxQmp/Qx4VpVYvqS7rKES5wHa5OJgPyF/vFCd9zJvOZBHKo86a5/xR2crtYstzz9 Z6K2u80LAprovmZEO/iu5A67BwVNKTHFzDe2+zek0wLWncg58kOFu14Hy/VasplTXSP9YvBz4fC dCYb57wRSADMu6NkqgX//3ovMhO4WrMLRElUAs9aH7YW+0qmlBcew+fNbaFAf+HULfJRq+L1azQ == X-Google-Smtp-Source: AGHT+IEXZd7reUDziErOplgPo67Tm47g/zLW7Hg9UIF0v+P6mjh3cSDXIBSb4wSjeIaZ8c6Ls42mhQ== X-Received: by 2002:a05:6000:2504:b0:3d2:9cbf:5b73 with SMTP id ffacd0b85a97d-3e7658bc950mr7945343f8f.6.1757853760855; Sun, 14 Sep 2025 05:42:40 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3e9511abbccsm3727773f8f.9.2025.09.14.05.42.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Sep 2025 05:42:40 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Lee Jones , Liam Girdwood , Mark Brown , Alexandre Belloni Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/7] dt-bindings: clock: samsung,s2mps11: document the S2MPS16 compatible Date: Sun, 14 Sep 2025 15:42:23 +0300 Message-ID: <20250914124227.2619925-4-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> References: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The S2MPS16 PMIC, alongside regulators and an rtc, provides 3 clock outputs, just like most of the other S2MPS PMICs. Document the S2MPS16 clock compatible. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) Acked-by: Stephen Boyd --- Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml b= /Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml index d5296e605..e1666fff0 100644 --- a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml @@ -13,7 +13,7 @@ description: | This is a part of device tree bindings for S2M and S5M family of Power Management IC (PMIC). =20 - The S2MPS11/13/15 and S5M8767 provide three(AP/CP/BT) buffered 32.768 kHz + The S2MPS11/13/15/16 and S5M8767 provide three(AP/CP/BT) buffered 32.768= kHz outputs. The S2MPS14 provides two (AP/BT) buffered 32.768 KHz outputs. =20 All available clocks are defined as preprocessor macros in @@ -28,6 +28,7 @@ properties: - samsung,s2mps11-clk - samsung,s2mps13-clk # S2MPS13 and S2MPS15 - samsung,s2mps14-clk + - samsung,s2mps16-clk - samsung,s5m8767-clk =20 "#clock-cells": --=20 2.43.0 From nobody Thu Oct 2 16:48:56 2025 Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66A9926FA60 for ; Sun, 14 Sep 2025 12:42:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853768; cv=none; b=W8sSeBbzW/6cXxLQxYvlVpdBQBtY6yY4Eh7mr5rbkbACQ3wCwQyBazN9nefSA5+8Fa0YRZ7e+IuD+rf8SNb771sqNiMfuf5Z8obmrGlu4DeYs7dqFwjzuKZbgR5keQEhTTGHQkvgx/v3k1uDw6YyYHfKY+xfkhdV6ovjkjlH+7k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853768; c=relaxed/simple; bh=dKQqnhIWFdrKicbr+8oW/yxrn+Yu6xMAJ0gurlV7IOg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KYsTfrpytY/SGfs9iMXNRxbUukTRkLNSazuYvfGLdmNfAWA4bH2MDHAtclXpwbf5oWrHShL37sPZXnwI0dEWhqkjfyWASzvG36P4r3L5G5Z6jFfE8wQ10UiveLpfOXaQHp7pxNzLfB4vR57enEuCGPj1vgzhtFh+uyDMY8gxYuw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=fNtQtBnG; arc=none smtp.client-ip=209.85.221.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fNtQtBnG" Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-3ea3d3ae48fso166533f8f.1 for ; Sun, 14 Sep 2025 05:42:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1757853762; x=1758458562; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U5y29YsQR0a3S2vDTFMSXyL29PIH6dS+uIhJsTA3ewk=; b=fNtQtBnGccezcdOE0+E89bn5wugPCGJC3SirWR24f6C7sLGr/Wic+RD23sBAIVPfnY 5AKqDHYgDHTeEds0EsOUeiNMz6mQmOSwrsPrzgmFIcCNcOk1354J7dLyj7h/Wf7NPI2p Vums0HFRXSBbyPevxkHxoJuUBna2K7z+RYJVEx92dT0QqzEuMUHDZ25X7y3W2ezNawRk SKL91kQwbPR4qZJAXL54Mnzx3p3p8u3+T2zOT7Ii4d0cYwZPLsHUJi1nw2zzLh0GBk9O 0oYifj3LmNxdywCbsK4SD8GEBgPv2lLZWmNUHST+O9QJuKoTNy1V2vjMN3wYKvoflmvK xWkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757853762; x=1758458562; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U5y29YsQR0a3S2vDTFMSXyL29PIH6dS+uIhJsTA3ewk=; b=BftmdWTBASxhY2Dbj2qYhzT77pWWCvM41IBXQK2SFY87kj29//h2hADO6H73gIkzfA LzP+VQ37U3zySQAEfxb0s+E8M4BIg3D+obwoQl1fFChGOWyZVO0N49SEp93dnzvPNh/F FLsNCPDW1Ztp1h14PUT1WamINZu6FnEv1ka2MN/fTZQTqI1f0jPGsu49pQ+9V05yoplH L4tC4dMK15WMVIVqmGIoIu3/+uHCaDRZpan0IECaAns9f2snsbistykCVLktQUxJWpbv VLpBnFAPvPamPwQg0A/hB0C7tDLnopNBfDMvOee1YvGUDkApwn7qZfnUvJVJ3plegxMY rdXQ== X-Forwarded-Encrypted: i=1; AJvYcCUjCKbqC5SqxfCfnDA+lftpT83zXnM70cCFig/TvvBmLP/fZ0ixQctZSTfDrEj6JvTdoquwRtpbSqvvy7c=@vger.kernel.org X-Gm-Message-State: AOJu0YzsXYAvTk62D5TGHG6T65wGc3k5RjxieWr91tbohQwUhmCZNuXC iY/DDNd96BT0J2VuG4NHiU/9ji5+xPixKBJYQyk0Z8GiXBbL9txMqUhk X-Gm-Gg: ASbGncuu7kRLRgH5x2PEGiqnef1+V8HnhBaRzOWSA7OdzFsU9+Zrm5NqPqiDYKjtFcV oufc0OR5IkvjhUzEaNmodAN0yT598p0squ/3TGIsFwEMAGePhhztk73IEU/v99rNoHdqnvEniuR 0I6xFnuOvKISOtyduSj8AUp92oZYB1+/RU3lG6uwDeV/yEQftytswWtTLDWdMdg03RbmqPbqTfy PgteQD9DwUKNzr7VQrC82hYEHeZwyFuoBWYNlZn2zaHAssn4I/k01PsWGLJO2J2NGYar8CSv0dA 9jrIpoNn8cVy8OlwyE+uehmk0cGGp6rOS7l+7Ulrjc/KXIcXWx4T5m5DIRAeQrBrvJAEPP5WZfh hHiUm+v7oyEEdcEXOz6D+tHzye5NGkI4qcIq8iIemnbz0KXURh1lSUavI9QbmPRj2Fqi3SiyFJ7 LeB6NIqkP6 X-Google-Smtp-Source: AGHT+IFPLneFeBWoWeASue/P+y46u0tViNBhr13nDHYaPRoOL4Mw73LLpOUwQyl0q2cx0U/uBXZKig== X-Received: by 2002:a05:6000:1884:b0:3ea:80ec:8543 with SMTP id ffacd0b85a97d-3ea80ec8823mr552221f8f.5.1757853762463; Sun, 14 Sep 2025 05:42:42 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3e9511abbccsm3727773f8f.9.2025.09.14.05.42.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Sep 2025 05:42:42 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Lee Jones , Liam Girdwood , Mark Brown , Alexandre Belloni Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 4/7] mfd: sec: add support for s2mps16 pmic Date: Sun, 14 Sep 2025 15:42:24 +0300 Message-ID: <20250914124227.2619925-5-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> References: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for Samsung's s2mps16 pmic. It's the primary PMIC used by exynos8890 devices. It houses regulators (38 LDOs and 11 BUCKs), three 32.768KHz clock outputs and an RTC device. Signed-off-by: Ivaylo Ivanov --- drivers/mfd/sec-common.c | 10 ++ drivers/mfd/sec-i2c.c | 16 +++ drivers/mfd/sec-irq.c | 46 +++++++ include/linux/mfd/samsung/core.h | 1 + include/linux/mfd/samsung/irq.h | 66 ++++++++++ include/linux/mfd/samsung/s2mps16.h | 195 ++++++++++++++++++++++++++++ 6 files changed, 334 insertions(+) create mode 100644 include/linux/mfd/samsung/s2mps16.h diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c index 42d55e70e..1f21d0d26 100644 --- a/drivers/mfd/sec-common.c +++ b/drivers/mfd/sec-common.c @@ -65,6 +65,12 @@ static const struct mfd_cell s2mps15_devs[] =3D { MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"), }; =20 +static const struct mfd_cell s2mps16_devs[] =3D { + MFD_CELL_NAME("s2mps16-regulator"), + MFD_CELL_NAME("s2mps16-rtc"), + MFD_CELL_OF("s2mps16-clk", NULL, NULL, 0, 0, "samsung,s2mps16-clk"), +}; + static const struct mfd_cell s2mpa01_devs[] =3D { MFD_CELL_NAME("s2mpa01-pmic"), MFD_CELL_NAME("s2mps14-rtc"), @@ -206,6 +212,10 @@ int sec_pmic_probe(struct device *dev, int device_type= , unsigned int irq, sec_devs =3D s2mps15_devs; num_sec_devs =3D ARRAY_SIZE(s2mps15_devs); break; + case S2MPS16X: + sec_devs =3D s2mps16_devs; + num_sec_devs =3D ARRAY_SIZE(s2mps16_devs); + break; case S2MPU02: sec_devs =3D s2mpu02_devs; num_sec_devs =3D ARRAY_SIZE(s2mpu02_devs); diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c index 3132b849b..6b0a8e927 100644 --- a/drivers/mfd/sec-i2c.c +++ b/drivers/mfd/sec-i2c.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -116,6 +117,15 @@ static const struct regmap_config s2mps15_regmap_confi= g =3D { .cache_type =3D REGCACHE_FLAT, }; =20 +static const struct regmap_config s2mps16_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D S2MPS16_REG_VTH_OFFSET, + .volatile_reg =3D s2mps11_volatile, + .cache_type =3D REGCACHE_FLAT, +}; + static const struct regmap_config s2mpu02_regmap_config =3D { .reg_bits =3D 8, .val_bits =3D 8, @@ -193,6 +203,11 @@ static const struct sec_pmic_i2c_platform_data s2mps15= _data =3D { .device_type =3D S2MPS15X, }; =20 +static const struct sec_pmic_i2c_platform_data s2mps16_data =3D { + .regmap_cfg =3D &s2mps16_regmap_config, + .device_type =3D S2MPS16X, +}; + static const struct sec_pmic_i2c_platform_data s2mpu02_data =3D { .regmap_cfg =3D &s2mpu02_regmap_config, .device_type =3D S2MPU02, @@ -215,6 +230,7 @@ static const struct of_device_id sec_pmic_i2c_of_match[= ] =3D { { .compatible =3D "samsung,s2mps13-pmic", .data =3D &s2mps13_data, }, { .compatible =3D "samsung,s2mps14-pmic", .data =3D &s2mps14_data, }, { .compatible =3D "samsung,s2mps15-pmic", .data =3D &s2mps15_data, }, + { .compatible =3D "samsung,s2mps16-pmic", .data =3D &s2mps16_data, }, { .compatible =3D "samsung,s2mpu02-pmic", .data =3D &s2mpu02_data, }, { .compatible =3D "samsung,s2mpu05-pmic", .data =3D &s2mpu05_data, }, { .compatible =3D "samsung,s5m8767-pmic", .data =3D &s5m8767_data, }, diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index c5c80b1ba..c0bdc4314 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -116,6 +116,39 @@ static const struct regmap_irq s2mps14_irqs[] =3D { REGMAP_IRQ_REG(S2MPS14_IRQ_TSD, 2, S2MPS14_IRQ_TSD_MASK), }; =20 +static const struct regmap_irq s2mps16_irqs[] =3D { + REGMAP_IRQ_REG(S2MPS16_IRQ_PWRONF, 0, S2MPS16_IRQ_PWRONF_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_PWRONR, 0, S2MPS16_IRQ_PWRONR_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_JIGONBF, 0, S2MPS16_IRQ_JIGONBF_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_JIGONBR, 0, S2MPS16_IRQ_JIGONBR_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_ACOKBF, 0, S2MPS16_IRQ_ACOKBF_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_ACOKBR, 0, S2MPS16_IRQ_ACOKBR_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_PWRON1S, 0, S2MPS16_IRQ_PWRON1S_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_MRB, 0, S2MPS16_IRQ_MRB_MASK), + + REGMAP_IRQ_REG(S2MPS16_IRQ_RTC60S, 1, S2MPS16_IRQ_RTC60S_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_RTCA1, 1, S2MPS16_IRQ_RTCA1_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_RTCA0, 1, S2MPS16_IRQ_RTCA0_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_SMPL, 1, S2MPS16_IRQ_SMPL_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_RTC1S, 1, S2MPS16_IRQ_RTC1S_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_WTSR, 1, S2MPS16_IRQ_WTSR_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_WRSTB, 1, S2MPS16_IRQ_WRSTB_MASK), + + REGMAP_IRQ_REG(S2MPS16_IRQ_INT120C, 2, S2MPS16_IRQ_INT120C_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_INT140C, 2, S2MPS16_IRQ_INT140C_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_TSD, 2, S2MPS16_IRQ_TSD_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_ADCDONE, 2, S2MPS16_IRQ_ADCDONE_MASK), + + REGMAP_IRQ_REG(S2MPS16_IRQ_OC0, 3, S2MPS16_IRQ_OC0_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_OC1, 3, S2MPS16_IRQ_OC1_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_OC2, 3, S2MPS16_IRQ_OC2_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_OC3, 3, S2MPS16_IRQ_OC3_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_OC4, 3, S2MPS16_IRQ_OC4_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_OC5, 3, S2MPS16_IRQ_OC5_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_OC6, 3, S2MPS16_IRQ_OC6_MASK), + REGMAP_IRQ_REG(S2MPS16_IRQ_OC7, 3, S2MPS16_IRQ_OC7_MASK), +}; + static const struct regmap_irq s2mpu02_irqs[] =3D { REGMAP_IRQ_REG(S2MPU02_IRQ_PWRONF, 0, S2MPS11_IRQ_PWRONF_MASK), REGMAP_IRQ_REG(S2MPU02_IRQ_PWRONR, 0, S2MPS11_IRQ_PWRONR_MASK), @@ -223,6 +256,16 @@ static const struct regmap_irq_chip s2mps15_irq_chip = =3D { S2MPS1X_IRQ_CHIP_COMMON_DATA, }; =20 +static const struct regmap_irq_chip s2mps16_irq_chip =3D { + .name =3D "s2mps16", + .irqs =3D s2mps16_irqs, + .num_irqs =3D ARRAY_SIZE(s2mps16_irqs), + .num_regs =3D 4, + .status_base =3D S2MPS14_REG_INT1, + .mask_base =3D S2MPS11_REG_INT1M, + .ack_base =3D S2MPS11_REG_INT1, +}; + static const struct regmap_irq_chip s2mpu02_irq_chip =3D { .name =3D "s2mpu02", .irqs =3D s2mpu02_irqs, @@ -282,6 +325,9 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) case S2MPS15X: sec_irq_chip =3D &s2mps15_irq_chip; break; + case S2MPS16X: + sec_irq_chip =3D &s2mps16_irq_chip; + break; case S2MPU02: sec_irq_chip =3D &s2mpu02_irq_chip; break; diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/c= ore.h index d785e101f..d99fa609f 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -44,6 +44,7 @@ enum sec_device_type { S2MPS13X, S2MPS14X, S2MPS15X, + S2MPS16X, S2MPU02, S2MPU05, }; diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/ir= q.h index b4805cbd9..e62d00188 100644 --- a/include/linux/mfd/samsung/irq.h +++ b/include/linux/mfd/samsung/irq.h @@ -226,6 +226,72 @@ enum s2mps14_irq { S2MPS14_IRQ_NR, }; =20 +enum s2mps16_irq { + S2MPS16_IRQ_PWRONF, + S2MPS16_IRQ_PWRONR, + S2MPS16_IRQ_JIGONBF, + S2MPS16_IRQ_JIGONBR, + S2MPS16_IRQ_ACOKBF, + S2MPS16_IRQ_ACOKBR, + S2MPS16_IRQ_PWRON1S, + S2MPS16_IRQ_MRB, + + S2MPS16_IRQ_RTC60S, + S2MPS16_IRQ_RTCA1, + S2MPS16_IRQ_RTCA0, + S2MPS16_IRQ_SMPL, + S2MPS16_IRQ_RTC1S, + S2MPS16_IRQ_WTSR, + S2MPS16_IRQ_WRSTB, + + S2MPS16_IRQ_INT120C, + S2MPS16_IRQ_INT140C, + S2MPS16_IRQ_TSD, + S2MPS16_IRQ_ADCDONE, + + S2MPS16_IRQ_OC0, + S2MPS16_IRQ_OC1, + S2MPS16_IRQ_OC2, + S2MPS16_IRQ_OC3, + S2MPS16_IRQ_OC4, + S2MPS16_IRQ_OC5, + S2MPS16_IRQ_OC6, + S2MPS16_IRQ_OC7, + + S2MPS16_IRQ_NR, +}; + +#define S2MPS16_IRQ_PWRONF_MASK BIT(0) +#define S2MPS16_IRQ_PWRONR_MASK BIT(1) +#define S2MPS16_IRQ_JIGONBF_MASK BIT(2) +#define S2MPS16_IRQ_JIGONBR_MASK BIT(3) +#define S2MPS16_IRQ_ACOKBF_MASK BIT(4) +#define S2MPS16_IRQ_ACOKBR_MASK BIT(5) +#define S2MPS16_IRQ_PWRON1S_MASK BIT(6) +#define S2MPS16_IRQ_MRB_MASK BIT(7) + +#define S2MPS16_IRQ_RTC60S_MASK BIT(0) +#define S2MPS16_IRQ_RTCA1_MASK BIT(1) +#define S2MPS16_IRQ_RTCA0_MASK BIT(2) +#define S2MPS16_IRQ_SMPL_MASK BIT(3) +#define S2MPS16_IRQ_RTC1S_MASK BIT(4) +#define S2MPS16_IRQ_WTSR_MASK BIT(5) +#define S2MPS16_IRQ_WRSTB_MASK BIT(7) + +#define S2MPS16_IRQ_INT120C_MASK BIT(0) +#define S2MPS16_IRQ_INT140C_MASK BIT(1) +#define S2MPS16_IRQ_TSD_MASK BIT(2) +#define S2MPS16_IRQ_ADCDONE_MASK BIT(7) + +#define S2MPS16_IRQ_OC0_MASK BIT(0) +#define S2MPS16_IRQ_OC1_MASK BIT(1) +#define S2MPS16_IRQ_OC2_MASK BIT(2) +#define S2MPS16_IRQ_OC3_MASK BIT(3) +#define S2MPS16_IRQ_OC4_MASK BIT(4) +#define S2MPS16_IRQ_OC5_MASK BIT(5) +#define S2MPS16_IRQ_OC6_MASK BIT(6) +#define S2MPS16_IRQ_OC7_MASK BIT(7) + enum s2mpu02_irq { S2MPU02_IRQ_PWRONF, S2MPU02_IRQ_PWRONR, diff --git a/include/linux/mfd/samsung/s2mps16.h b/include/linux/mfd/samsun= g/s2mps16.h new file mode 100644 index 000000000..d4394b054 --- /dev/null +++ b/include/linux/mfd/samsung/s2mps16.h @@ -0,0 +1,195 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2012 Samsung Electronics Co., Ltd + * Copyright (c) 2025 Ivaylo Ivanov + */ + +#ifndef __LINUX_MFD_S2MPS16_H +#define __LINUX_MFD_S2MPS16_H + +/* S2MPS16 registers */ +enum S2MPS16_reg { + S2MPS16_REG_ID, + S2MPS16_REG_INT1, + S2MPS16_REG_INT2, + S2MPS16_REG_INT3, + S2MPS16_REG_INT4, + S2MPS16_REG_INT1M, + S2MPS16_REG_INT2M, + S2MPS16_REG_INT3M, + S2MPS16_REG_INT4M, + S2MPS16_REG_ST1, + S2MPS16_REG_ST2, + S2MPS16_REG_PWRONSRC, + S2MPS16_REG_OFFSRC, + S2MPS16_REG_BU_CHG, + S2MPS16_REG_RTC_BUF, + S2MPS16_REG_CTRL1, + S2MPS16_REG_CTRL2, + S2MPS16_REG_ETC_TEST, + S2MPS16_REG_OTP_ADRL, + S2MPS16_REG_OTP_ADRH, + S2MPS16_REG_OTP_DATA, + S2MPS16_REG_CTRL3, + S2MPS16_REG_ETC_OTP, + S2MPS16_REG_UVLO_OTP, + S2MPS16_REG_CFG1, + S2MPS16_REG_CFG2, + S2MPS16_REG_B1CTRL1, + S2MPS16_REG_B1CTRL2, + S2MPS16_REG_B2CTRL1, + S2MPS16_REG_B2CTRL2, + S2MPS16_REG_B3CTRL1, + S2MPS16_REG_B3CTRL2, + S2MPS16_REG_B4CTRL1, + S2MPS16_REG_B4CTRL2, + S2MPS16_REG_B5CTRL1, + S2MPS16_REG_B5CTRL2, + S2MPS16_REG_B6CTRL1, + S2MPS16_REG_B6CTRL2, + S2MPS16_REG_B6CTRL3, + S2MPS16_REG_B7CTRL1, + S2MPS16_REG_B7CTRL2, + S2MPS16_REG_B8CTRL1, + S2MPS16_REG_B8CTRL2, + S2MPS16_REG_B9CTRL1, + S2MPS16_REG_B9CTRL2, + /* buck10 is used for CP */ + S2MPS16_REG_B11CTRL1 =3D 0x30, + S2MPS16_REG_B11CTRL2, + S2MPS16_REG_BB1CTRL1, + S2MPS16_REG_BB1CTRL2, + S2MPS16_REG_BUCK_RAMP, + S2MPS16_REG_LDO7_DVS, + S2MPS16_REG_LDO8_DVS, + S2MPS16_REG_LDO9_DVS, + S2MPS16_REG_LDO10_DVS, + S2MPS16_REG_LDO11_DVS, + S2MPS16_REG_L1CTRL, + S2MPS16_REG_L2CTRL, + S2MPS16_REG_L3CTRL, + S2MPS16_REG_L4CTRL, + S2MPS16_REG_L5CTRL, + S2MPS16_REG_L6CTRL, + S2MPS16_REG_L7CTRL, + S2MPS16_REG_L8CTRL, + S2MPS16_REG_L9CTRL, + S2MPS16_REG_L10CTRL, + S2MPS16_REG_L11CTRL, + S2MPS16_REG_L12CTRL, + S2MPS16_REG_L13CTRL, + /* ldo14 to 24 are used for CP */ + S2MPS16_REG_L25CTRL =3D 0x55, + S2MPS16_REG_L26CTRL, + S2MPS16_REG_L27CTRL, + S2MPS16_REG_L28CTRL, + S2MPS16_REG_L29CTRL, + S2MPS16_REG_L30CTRL, + S2MPS16_REG_L31CTRL, + S2MPS16_REG_L32CTRL, + S2MPS16_REG_L33CTRL, + S2MPS16_REG_L34CTRL, + S2MPS16_REG_L35CTRL, + S2MPS16_REG_L36CTRL, + S2MPS16_REG_L37CTRL, + S2MPS16_REG_L38CTRL, + S2MPS16_REG_LDO_DSCH, + S2MPS16_REG_LDO_CTRL0, + S2MPS16_REG_LDO_CTRL1, + S2MPS16_REG_LDO_CTRL2, + S2MPS16_REG_LDO_OCP, + S2MPS16_REG_IOCONF, + S2MPS16_REG_AVP, + S2MPS16_REG_ADC_CTRL1, + S2MPS16_REG_ADC_CTRL2, + S2MPS16_REG_ADC_DATA, + S2MPS16_REG_TCXO_CTRL, + S2MPS16_REG_SELMIF, + S2MPS16_REG_SQE_CTRL, + S2MPS16_REG_VTH_OFFSET =3D 0xFF, +}; + +/* S2MPS16 regulator ids */ +enum S2MPS16_regulators { + S2MPS16_LDO1, + S2MPS16_LDO2, + S2MPS16_LDO3, + S2MPS16_LDO4, + S2MPS16_LDO5, + S2MPS16_LDO6, + S2MPS16_LDO7, + S2MPS16_LDO8, + S2MPS16_LDO9, + S2MPS16_LDO10, + S2MPS16_LDO11, + S2MPS16_LDO12, + S2MPS16_LDO13, + /* ldo14 to 24 are used for CP */ + S2MPS16_LDO25, + S2MPS16_LDO26, + S2MPS16_LDO27, + S2MPS16_LDO28, + S2MPS16_LDO29, + S2MPS16_LDO30, + S2MPS16_LDO31, + S2MPS16_LDO32, + S2MPS16_LDO33, + S2MPS16_LDO34, + S2MPS16_LDO35, + S2MPS16_LDO36, + S2MPS16_LDO37, + S2MPS16_LDO38, + S2MPS16_BUCK1, + S2MPS16_BUCK2, + S2MPS16_BUCK3, + S2MPS16_BUCK4, + S2MPS16_BUCK5, + S2MPS16_BUCK6, + S2MPS16_BUCK7, + S2MPS16_BUCK8, + S2MPS16_BUCK9, + /* buck10 is used for CP */ + S2MPS16_BUCK11, + S2MPS16_REG_MAX, +}; + +#define S2MPS16_BUCK_MIN1 300000 +#define S2MPS16_BUCK_MIN2 600000 +#define S2MPS16_BUCK_MIN3 2600000 +#define S2MPS16_BUCK_STEP1 6250 +#define S2MPS16_BUCK_STEP2 12500 + +#define S2MPS16_LDO_MIN1 300000 +#define S2MPS16_LDO_MIN2 500000 +#define S2MPS16_LDO_MIN3 700000 +#define S2MPS16_LDO_MIN4 1800000 +#define S2MPS16_LDO_STEP1 12500 +#define S2MPS16_LDO_STEP2 25000 + +#define S2MPS16_ENABLE_SHIFT 0x06 +#define S2MPS16_LDO_VSEL_MASK 0x3F +#define S2MPS16_BUCK_VSEL_MASK 0xFF +#define S2MPS16_ENABLE_MASK (0x03 << S2MPS16_ENABLE_SHIFT) +#define S2MPS16_LDO_N_VOLTAGES (S2MPS16_LDO_VSEL_MASK + 1) +#define S2MPS16_BUCK_N_VOLTAGES (S2MPS16_BUCK_VSEL_MASK + 1) + +#define S2MPS16_BUCK_RAMP_SHIFT1 6 +#define S2MPS16_BUCK_RAMP_SHIFT2 4 +#define S2MPS16_BUCK_RAMP_SHIFT3 2 +#define S2MPS16_BUCK_RAMP_SHIFT4 0 +#define S2MPS16_BUCK_RAMP_MASK 0x3 + +#define S2MPS16_ENABLE_TIME_LDO 128 +#define S2MPS16_ENABLE_TIME_BUCK1 95 +#define S2MPS16_ENABLE_TIME_BUCK2 95 +#define S2MPS16_ENABLE_TIME_BUCK3 95 +#define S2MPS16_ENABLE_TIME_BUCK4 95 +#define S2MPS16_ENABLE_TIME_BUCK5 95 +#define S2MPS16_ENABLE_TIME_BUCK6 128 +#define S2MPS16_ENABLE_TIME_BUCK7 95 +#define S2MPS16_ENABLE_TIME_BUCK8 106 +#define S2MPS16_ENABLE_TIME_BUCK9 150 +#define S2MPS16_ENABLE_TIME_BUCK10 95 +#define S2MPS16_ENABLE_TIME_BUCK11 95 + +#endif /* __LINUX_MFD_S2MPS16_H */ --=20 2.43.0 From nobody Thu Oct 2 16:48:56 2025 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8429C26561D for ; Sun, 14 Sep 2025 12:42:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853768; cv=none; b=Gai+s0tWMnfeeEVFSJ1ckN70rWJE2cBAb6TEjSFZteiFZrx/zsUZoX8Et75bs32LraLcQ3vmCZVo41IdVvfurzViVohBnSVcAm7UASxS3U0gkxT1YziaM5JabcDNyhFbIEKBatpnuOGtDbSDNFu79GTAOvM0EGUw8Q+q/2tzJmM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853768; c=relaxed/simple; bh=D22DQEAI7GUdY0C98ZI2lUt2RWXEbX1YdkY+EOaEysY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tWYEYUp5AT+T6PTY46N0GNeqrdnnVT2SAb26LWLuolltdEqjLb8g9INEsEdplPhJHv1ijk6eqX+yyQe9apogpPANaVmMy2t9uNGqPMCgKzXnP2jEtWEuyx4H5PsZZWCmKY0QFTRAGdjfjdC5+YjpeeTnqqyPO0vZQAumovmkBsI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=PuxeCqBj; arc=none smtp.client-ip=209.85.221.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="PuxeCqBj" Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-3dce6eed889so2975421f8f.0 for ; Sun, 14 Sep 2025 05:42:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1757853764; x=1758458564; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z5IkwHpWT3vjOUxYuXQio/Ms33Sg58fY2czp9a5UdkM=; b=PuxeCqBjJ3HDaqIFS8HzlHkBE6W6j7uxWv8VYHtczVwYtuUrdp+Ayn1AwxJq85OcFJ 6pProTdwI7L11VVqbh52KND6ElxLC2osvR+wUYLfiHN0ut48bXBC4moItQfkG88e771f W5lssByHXe5oGdCMHFUeSZPngRQxFBELBAJXllrNIXOptLCvpV8iSDz3Bvm+4OfGTVbc iVn/Vw+jQ0xfd8b9yoig9/PoPdIBHQuHkUTQFMFpz7sn/iT3xu3diMCCb6BeFql+jyWf 62XmTSQCaQAbfYXu+RKkS6bT82EfpWeVSlBz2uh75TvMDTyCNBFSSFvJOUtDiiOn3Jkv b03w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757853764; x=1758458564; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z5IkwHpWT3vjOUxYuXQio/Ms33Sg58fY2czp9a5UdkM=; b=HZDj/z6L/3iRF6vm5mPm1eg8HH3RIbGTpqd3OPifstAK9Ni4wOiGlCxNPvm6KGaoHJ 5y627+RBDF8OMFdN7dALGA1YzyCKQgYhj/upawYjvvXxw8AGjNtNlS0lDZGo6+Y8k+dc l77j+4fZi+QW21e7eL70w6whuakpE/NIwkHBL/B3IvBapaKFpDXSdvk8AEjmzPjugCBg FwFAICFM33obDdTODllog1yr7M1kI5ZOKDbP1hItgCbP7RJ0266jONpqLW9/UYKjxZnG TyzUnj+qWjt8XgxxppKN07hJ+3+0QRh6EwMZecNe3oaK3yI9S2IEIbB1V5z2gQN/tRFU 6/lA== X-Forwarded-Encrypted: i=1; AJvYcCV6nR/zIIFa1/IOIulnKZYFn3LlYi1M2ujhTJx89rMemeY7gF98iX0YZjIM3Or/MJr1ODkQxJPCvuzj/KY=@vger.kernel.org X-Gm-Message-State: AOJu0YzihtLqTpTKug70KTkVnNwSyZ9JVVfJx30Zt2keMEAup81wMmY5 fMZAc8f5ufLfrXemwquoKzCVmQ0NSrwx237j9X0ke7TiqxPaZTWwSk2+ X-Gm-Gg: ASbGnctE8dTKb4+rGn7jp5xFmI4pg9scbgdqMPWI4GxG0cSTEzuAQhL0BhAhrM6qnTc 26t3TLuZn3PuE7EjAthIQNhdYIxke1SKiMcvSK2BvN6d4PtPBcF/wHhCpgdst7QM+n9YlcuKnIT mWooBJ4domm96PVVGFBYqIX/+pHvrihh512/slLoQcRPWu2u6VTlaMNsemg9Q4QqontDv9QYEAW xIr1KZQitJgl6d/YTR3k4YjT9OkxO6v2o6WIPxsXycjJBs/uL0YkmoJv8q0pCG3yV2wmul3IjxP 0vsGvND7p3djnL07bRS/fkJrAHtXvMiTAJfnr4SdKMc39dC6wS6OVhnKrEbX9JgSuuXZ3Sp4HLV k+gt/rgdl/0D+O6rZeKxdLBDSuG9rcito24DKRBD4IyjEzakGO5nG9pLs3o2DB4W5f4ZBocn1Xq XrjSPbz4X4 X-Google-Smtp-Source: AGHT+IFJplQxPa+oOwiL3HwRMbWnzwzx1xcdaJkdmZixyb1ZQ45I0gzLQ3rbeFTRhbx5TQ6AuRvPjQ== X-Received: by 2002:a05:6000:2dc8:b0:3e3:921b:659f with SMTP id ffacd0b85a97d-3e765780a76mr8171220f8f.2.1757853763840; Sun, 14 Sep 2025 05:42:43 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3e9511abbccsm3727773f8f.9.2025.09.14.05.42.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Sep 2025 05:42:43 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Lee Jones , Liam Girdwood , Mark Brown , Alexandre Belloni Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 5/7] clk: s2mps11: add the support for S2MPS16 PMIC clock Date: Sun, 14 Sep 2025 15:42:25 +0300 Message-ID: <20250914124227.2619925-6-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> References: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the support for S2MPS16 PMIC clock, which is functionally the same as the currently supported ones, with the exception of a different register. Signed-off-by: Ivaylo Ivanov Acked-by: Stephen Boyd Reviewed-by: Andr=C3=A9 Draszik Reviewed-by: Peng Fan --- drivers/clk/clk-s2mps11.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c index d4e9c3577..7c766d05d 100644 --- a/drivers/clk/clk-s2mps11.c +++ b/drivers/clk/clk-s2mps11.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include =20 @@ -149,6 +150,9 @@ static int s2mps11_clk_probe(struct platform_device *pd= ev) case S2MPS14X: s2mps11_reg =3D S2MPS14_REG_RTCCTRL; break; + case S2MPS16X: + s2mps11_reg =3D S2MPS16_REG_RTC_BUF; + break; case S5M8767X: s2mps11_reg =3D S5M8767_REG_CTRL1; break; @@ -224,6 +228,7 @@ static const struct platform_device_id s2mps11_clk_id[]= =3D { { "s2mps11-clk", S2MPS11X}, { "s2mps13-clk", S2MPS13X}, { "s2mps14-clk", S2MPS14X}, + { "s2mps16-clk", S2MPS16X}, { "s5m8767-clk", S5M8767X}, { }, }; @@ -249,6 +254,9 @@ static const struct of_device_id s2mps11_dt_match[] __u= sed =3D { }, { .compatible =3D "samsung,s2mps14-clk", .data =3D (void *)S2MPS14X, + }, { + .compatible =3D "samsung,s2mps16-clk", + .data =3D (void *)S2MPS16X, }, { .compatible =3D "samsung,s5m8767-clk", .data =3D (void *)S5M8767X, --=20 2.43.0 From nobody Thu Oct 2 16:48:56 2025 Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D5E026F445 for ; Sun, 14 Sep 2025 12:42:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853768; cv=none; b=FYhDFBSh0454xdlxZYXRf88ZTQjU4WECUT9NvIliHBuTJPCmmxWqWpxBLY2To5iDsWUPc1dVzcc0mdjVdSaCVLRKQJd5x/r6SnjqluOeRw6sPHzruRFwsf2ldYIWbrPriJHSsNG1DxNU+Trx3AeoCIs6eq6d6KHCn244Pi4zxAU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853768; c=relaxed/simple; bh=kyKrbyMlhOJaQK6nZpvShmo5GTsEoyiDjllRpRMHI4Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=A4rFFe0MZ3nuZVTQRlRLafdIWB/UI1ChzAhO69P4tvuVktcyTKb4ZmIH8x41yYE1tLVwEm+M6H96o8gDsoRAtOv1SDob9SYYZgUiLxEvIwZT8QrSZC9xxGMj8BPFJpRSpDVNzHe+4CzIUqKqmPazrDf7UUHsIVJUOVem31uwbQ0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=HMHoUSCu; arc=none smtp.client-ip=209.85.221.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="HMHoUSCu" Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-3ea7af25f8aso57636f8f.0 for ; Sun, 14 Sep 2025 05:42:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1757853765; x=1758458565; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cOU9R2Lnh0tpNOjgfaBNBcfWHtUekf92OIAIJIxr5KA=; b=HMHoUSCuy6iJWUw/2/Nm9Pc/RlZEgb/FXtrbfDpCmK3g6xJVHCR4wJ7GnbdIntbzO5 ufHoDltYZDf0V3VJib6ZRgggXqFrZWNKbU1065jzOwIZGzhwLl0w9e/c9uAf2lKbMVPC r7rDRWANoe+v+CxJ/++VZ3KUvu0XXyyqazBCHtBqa1lKzkV/9bEY0Mz0sXwy0t1R3zTZ yyWYaXB+Pb84FVwMvHkZaOB1qRyyLg+G0MTIyErG2Oq2WNlyZw4j1wr25+gtfD194BwI ZVZUi0fcCdbumoyGp6x3sxESKjR+Kw1nTU2ADg1KAvgsrCk2ptDNcx+gJHvtNnmuqxsL mbIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757853765; x=1758458565; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cOU9R2Lnh0tpNOjgfaBNBcfWHtUekf92OIAIJIxr5KA=; b=PDASRAgh74x3xByshHr5Aq6pXXolWNCPl+T8Jpav+ZD8M6ao2JLvKi8jMQ0DdpFrdY sGo2ZcwxsdDgLR0Tz5788Ivvm6Xunr2d48egUpfINy8WLMaodsCUMvO5BZREMNoWBD5O AZJKCIcDG42OK849VbSx6osd6Vmm3Tcq23urYmyTOz2/91HSHUN166fFeletivZQj/vZ ng77T8jbRTRhI9vtcPRbVrxFskwtuxj/Za9xqLIwBjqHGaOKlyyUxaWHGdXrjqwyIBC6 QsTXbkFx1A8Dir2Xf8wtcX9rvp9wTX83OdUcEBWzrkijEbxOUSmK5Km2rAUxxh3r7nio tciA== X-Forwarded-Encrypted: i=1; AJvYcCXHR6X77IMg32U0cGCieXk2pHQgeNmUgT6o4CWBPtb0hsXLb2SHY2fqk9zK48gWW9pUe+xQjbgY1m3km3s=@vger.kernel.org X-Gm-Message-State: AOJu0Yw7xbULCBKK8OivU+5W/PHGLwF6JkIP6XK6MpdDQ7qgXDDmaiLM uTVioXAAQSEdS7jrQb44JffezwIrnUsCVKyEIWQhqA1Ymzi9hKa93urb X-Gm-Gg: ASbGncu+/SIMUZC0BlE2mIEsRAK9XrfHRNfzC/ERLWtn0L2GWEhHVoxpAYCgLhXAIGA Nf+7g29gebSPGU9MEOjYSGqD+aQImr2p4rIIiiaiyjAi+0c8oO4ejuqLDg6SwYrIhd8IYVAqg8z bp6iku+tSOODi9IJ/TekYx7bLPXeXGz13WJsL2hUhZZx8P4wL3IFGZPDf8uy1Ph7QkhaNLDvBxx fj7mM5YKuryNevOX5+aR8C9N0TB/kKUlJkGVAwrAqEBlLutCqYFfSPHsTdGA7zolHaERamjkDZw 7fN4g8v5lLV2bit1oDqhE1JRkjyC+OpboaPE3BVQzRgZin0wFbHOR28VnPqCUwOoi27Nv7FXflj 6Lg1ZXw2WNIt4OmcWlmXBOVpScHLgN0fjFs6xn/I64cl8uMcGg72FbPi0t/edSjxi2IyCBHhJEw == X-Google-Smtp-Source: AGHT+IG99f1RlRObwRO3ZVgbqbD8FEXYcOCWgQZx2Y0pKAQ0TG8WDRZi1Xh0wpZoEZCKRmVP1u9ogg== X-Received: by 2002:a5d:5f50:0:b0:3e9:d0a5:e436 with SMTP id ffacd0b85a97d-3e9d0a622f1mr1712381f8f.23.1757853765242; Sun, 14 Sep 2025 05:42:45 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3e9511abbccsm3727773f8f.9.2025.09.14.05.42.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Sep 2025 05:42:44 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Lee Jones , Liam Girdwood , Mark Brown , Alexandre Belloni Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 6/7] rtc: s5m: add support for S2MPS16 RTC Date: Sun, 14 Sep 2025 15:42:26 +0300 Message-ID: <20250914124227.2619925-7-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> References: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for Samsung's S2MPS16 PMIC RTC, which has pretty much identical functionality to the existing S2MPS15 support, with the difference being the ST2 register. Signed-off-by: Ivaylo Ivanov Acked-by: Alexandre Belloni --- drivers/rtc/rtc-s5m.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index a7220b4d0..910248731 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -18,6 +18,7 @@ #include #include #include +#include =20 /* * Maximum number of retries for checking changes in UDR field @@ -254,6 +255,11 @@ static int s5m_check_pending_alarm_interrupt(struct s5= m_rtc_info *info, ret =3D regmap_read(info->regmap, S5M_RTC_STATUS, &val); val &=3D S5M_ALARM0_STATUS; break; + case S2MPS16X: + ret =3D regmap_read(info->s5m87xx->regmap_pmic, S2MPS16_REG_ST2, + &val); + val &=3D S2MPS_ALARM0_STATUS; + break; case S2MPG10: case S2MPS15X: case S2MPS14X: @@ -303,6 +309,7 @@ static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_inf= o *info) udr_mask |=3D S5M_RTC_TIME_EN_MASK; break; case S2MPG10: + case S2MPS16X: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -354,6 +361,7 @@ static int s5m_rtc_read_time(struct device *dev, struct= rtc_time *tm) switch (info->device_type) { case S5M8767X: case S2MPG10: + case S2MPS16X: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -378,6 +386,7 @@ static int s5m_rtc_set_time(struct device *dev, struct = rtc_time *tm) switch (info->device_type) { case S5M8767X: case S2MPG10: + case S2MPS16X: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -416,6 +425,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struc= t rtc_wkalrm *alrm) switch (info->device_type) { case S5M8767X: case S2MPG10: + case S2MPS16X: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -455,6 +465,7 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) switch (info->device_type) { case S5M8767X: case S2MPG10: + case S2MPS16X: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -494,6 +505,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *inf= o) switch (info->device_type) { case S5M8767X: case S2MPG10: + case S2MPS16X: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -532,6 +544,7 @@ static int s5m_rtc_set_alarm(struct device *dev, struct= rtc_wkalrm *alrm) switch (info->device_type) { case S5M8767X: case S2MPG10: + case S2MPS16X: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -613,6 +626,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *in= fo) break; =20 case S2MPG10: + case S2MPS16X: case S2MPS15X: case S2MPS14X: case S2MPS13X: @@ -680,6 +694,7 @@ static int s5m_rtc_probe(struct platform_device *pdev) struct i2c_client *i2c; =20 switch (device_type) { + case S2MPS16X: case S2MPS15X: regmap_cfg =3D &s2mps14_rtc_regmap_config; info->regs =3D &s2mps15_rtc_regs; @@ -817,6 +832,7 @@ static const struct platform_device_id s5m_rtc_id[] =3D= { { "s2mps13-rtc", S2MPS13X }, { "s2mps14-rtc", S2MPS14X }, { "s2mps15-rtc", S2MPS15X }, + { "s2mps16-rtc", S2MPS16X }, { }, }; MODULE_DEVICE_TABLE(platform, s5m_rtc_id); --=20 2.43.0 From nobody Thu Oct 2 16:48:56 2025 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F1A5265CDD for ; Sun, 14 Sep 2025 12:42:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853770; cv=none; b=cUe5vRQ4kaGtuS3gWcJTuRlOfZsSpELevioT3RNQLU28q1SJTdp0DTPgCgj9WZamixafzl2Cc6aqf/yN1am3L49KoM25cPSTaeDOIQ2UCw2DIgFdPo/LbUvoj+e5kAYIPKeqRpA5AMdOoh6cxJYEVTbcuouKOOOo2XLnHkRcGC8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757853770; c=relaxed/simple; bh=z9kDI07Wpmm78QQXXWrYdY4Mhw7hD9DVSF7dxe4fhs4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bv1qQCVzJssphLKii1BbOhG3jBnEgX3FHrkwAtcWOCwD8yd3wZv3wBjnCQ7bLtc74reTJjnxkf8ZTTmwx4V3wT6xkYWCcPe1TV2bm+CmmeVgjYa/aVtw/FjLRdTS3Bf1B7KI9TBYhXwJm86QRcNCebneA3vvq3hUWYOipkUZktQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=K9jvENiU; arc=none smtp.client-ip=209.85.128.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="K9jvENiU" Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-45f2b062b86so2899515e9.1 for ; Sun, 14 Sep 2025 05:42:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1757853767; x=1758458567; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/NzjVjcE/iDN8N+s4aQ4GgYpTz60HWxWgUIghlOd1Cw=; b=K9jvENiUZznEQQ2zl8z42koo8py8wVLvKCAqOahP6RtvIdy1MPjfpev66uG4dB4X6e sXchn9ii1PmdLd9Br0asn3KPrqr4+Q8Iu5xXTJHWM3dhNRxaKxRwP8xlCgQTLBRHLB2p 2k5VsNc8DlHxIhlOsQfP7E0/a2zkGAFmvCvMKkigqH/j8hvuhQDeWAkhzRlAzTj1Lulw AqWfISBVBoJlPXZHgVvqog+kYzCGfiq/7+rYTMxAR3UhOCYSobY0SCYvLJu8Vn21tTkF 8RIeL8mU0qBwPGUIbyGE9nD1UsXzDbqt2rMRD/cHC0R07UJmf9FUjgD2b75baDW0YD0T meqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757853767; x=1758458567; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/NzjVjcE/iDN8N+s4aQ4GgYpTz60HWxWgUIghlOd1Cw=; b=KIP2viqhC+QZnqFtsbKOIbnHoO5Rh9mmLdvTQPAr2z6RMYtRebfkKLC/FHI9pISAEp p0evXyk/DPv/3SeKLnm5Iwghn6dVYAsMsLGavJYj3Q3IPZczrOlu04/lvKh7NCqYXciB nukXo8ueaaoY+2lByvayt9C2+0gApQJEK5bHm3lOY2LABDaR/nzeiEdl6rn7SBZgeLZk aYGd0gHxcfANVuBBFgBZ4cxq1LHc+11/Yod00wYn/MFCZQd94Fbrh4Tnz1cyXgf9OfHi ThJ6addJRKUYkWgWSdPW5BCBbHOXXzFOL10iomtsnQDx7pQph4gciYbLIKZEHfL9wte0 eLXA== X-Forwarded-Encrypted: i=1; AJvYcCW9ikgyivUPu02ZJ+tHv06FCzST+3ipmt9r+mJuBr9qJl0IJBc8I5IfvLgJwQPK+JAk6wZLTUX58GG92+Q=@vger.kernel.org X-Gm-Message-State: AOJu0YxaQyku7yFJCRSbij03Wbc/fi3oaEVGpxTLkM8oP71Ny45ZxcR0 IHpUIhH5N1Vg+SO3qRtKXh8b+JaapAJODWqIUtTE/NdDSpC9ZofWgkfp X-Gm-Gg: ASbGncv/MKvIZqODZgkmzbxuVB5Bbensdpu3mSFvpTW50VDgr1E76dCbpxIJxIqzwp7 YICo2T6HOYBhyEpsxRXnHTuhEQYVBambCvyE6XyN0VW9O/iwiUFKK9C3++hVQPfvLlO+gL1u5FN /Z4BMBtQj+b+kSi/dqrc7I1F9NWyTG0XqVdqd1ogv8b/C0dgFAbH8FBMlYk+ULbD8h4rZfT9HAg XQV5iWs8t0wpb7/neqSsCTxr1FRGpRKOnYKOvXecp51wMFT70DFJXVWteipA37CHiPN2WdYD4zH W3IW23PeF1FHqeyxh8T7exbZiP63xoew+nSpLLrHvFR8GngPxspn98ctZfskAs0nJ0mIVUEqPOW 4eCWMQZ7N1NOMr6BkhFAn41vwfWRAZ5ILYQUAyJLu+jMJCCpS8Ia6f6t87eADF13UbwEJZlCtoL s8O/AwsMrtPKarijAPt5Y= X-Google-Smtp-Source: AGHT+IF52cVcLt/Of4hqhHb8/XivoKbvphnH9NSc4wXU+Eh0bTuKYlp5oRDfnSzGvHYzjro9HUgg/g== X-Received: by 2002:a5d:5d81:0:b0:3ea:3b7b:80a8 with SMTP id ffacd0b85a97d-3ea3b7b86e1mr1126408f8f.52.1757853766693; Sun, 14 Sep 2025 05:42:46 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3e9511abbccsm3727773f8f.9.2025.09.14.05.42.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Sep 2025 05:42:46 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Lee Jones , Liam Girdwood , Mark Brown , Alexandre Belloni Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 7/7] regulator: s2mps11: add support for S2MPS16 regulators Date: Sun, 14 Sep 2025 15:42:27 +0300 Message-ID: <20250914124227.2619925-8-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> References: <20250914124227.2619925-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" S2MPS16 is a PMIC, manufactured by Samsung, particularly used in exynos8890 based devices, featuring 38 LDOs, of which 11 are used for CP, and 11 BUCKs, of which 1 is used for CP. Add driver support for controlling all BUCKs and LDOs, except the ones used for CP, as they are not documented enough and the vendor kernel doesn't handle them anyways. Signed-off-by: Ivaylo Ivanov --- drivers/regulator/Kconfig | 4 +- drivers/regulator/s2mps11.c | 147 ++++++++++++++++++++++++++++++++++++ 2 files changed, 149 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index eaa6df1c9..41b56b647 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1352,10 +1352,10 @@ config REGULATOR_S2MPA01 via I2C bus. S2MPA01 has 10 Bucks and 26 LDO outputs. =20 config REGULATOR_S2MPS11 - tristate "Samsung S2MPS11/13/14/15/S2MPU02/05 voltage regulator" + tristate "Samsung S2MPS11/13/14/15/16/S2MPU02/05 voltage regulator" depends on MFD_SEC_CORE || COMPILE_TEST help - This driver supports a Samsung S2MPS11/13/14/15/S2MPU02/05 voltage + This driver supports a Samsung S2MPS11/13/14/15/16/S2MPU02/05 voltage output regulator via I2C bus. The chip is comprised of high efficient Buck converters including Dual-Phase Buck converter, Buck-Boost converter, various LDOs. diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c index 04ae9c615..f736b6ee9 100644 --- a/drivers/regulator/s2mps11.c +++ b/drivers/regulator/s2mps11.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include =20 @@ -828,6 +829,146 @@ static const struct regulator_desc s2mps15_regulators= [] =3D { regulator_desc_s2mps15_buck(10, s2mps15_buck_voltage_ranges2), }; =20 +static int s2mps16_set_ramp_delay(struct regulator_dev *rdev, int ramp_del= ay) +{ + unsigned int ramp_val, ramp_shift, ramp_reg; + int rdev_id =3D rdev_get_id(rdev); + + switch (rdev_id) { + case S2MPS16_BUCK2: + case S2MPS16_BUCK4: + case S2MPS16_BUCK5: + ramp_shift =3D S2MPS16_BUCK_RAMP_SHIFT1; + break; + case S2MPS16_BUCK1: + case S2MPS16_BUCK3: + case S2MPS16_BUCK6: + ramp_shift =3D S2MPS16_BUCK_RAMP_SHIFT2; + break; + case S2MPS16_BUCK7: + case S2MPS16_BUCK11: + ramp_shift =3D S2MPS16_BUCK_RAMP_SHIFT3; + break; + case S2MPS16_BUCK8: + case S2MPS16_BUCK9: + ramp_shift =3D S2MPS16_BUCK_RAMP_SHIFT4; + break; + default: + return 0; + } + ramp_reg =3D S2MPS16_REG_BUCK_RAMP; + ramp_val =3D get_ramp_delay(ramp_delay); + + return regmap_update_bits(rdev->regmap, ramp_reg, + S2MPS16_BUCK_RAMP_MASK << ramp_shift, + ramp_val << ramp_shift); +} + +static const struct regulator_ops s2mps16_ldo_ops =3D { + .list_voltage =3D regulator_list_voltage_linear, + .map_voltage =3D regulator_map_voltage_linear, + .is_enabled =3D regulator_is_enabled_regmap, + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, +}; + +static const struct regulator_ops s2mps16_buck_ops =3D { + .list_voltage =3D regulator_list_voltage_linear, + .map_voltage =3D regulator_map_voltage_linear, + .is_enabled =3D regulator_is_enabled_regmap, + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .set_voltage_time_sel =3D regulator_set_voltage_time_sel, + .set_ramp_delay =3D s2mps16_set_ramp_delay, +}; + +#define regulator_desc_s2mps16_ldo(num, min, step) { \ + .name =3D "ldo"#num, \ + .id =3D S2MPS16_LDO##num, \ + .ops =3D &s2mps16_ldo_ops, \ + .type =3D REGULATOR_VOLTAGE, \ + .owner =3D THIS_MODULE, \ + .min_uV =3D S2MPS16_LDO_##min, \ + .uV_step =3D S2MPS16_LDO_##step, \ + .n_voltages =3D S2MPS16_LDO_N_VOLTAGES, \ + .vsel_reg =3D S2MPS16_REG_L##num##CTRL, \ + .vsel_mask =3D S2MPS16_LDO_VSEL_MASK, \ + .enable_reg =3D S2MPS16_REG_L##num##CTRL, \ + .enable_mask =3D S2MPS16_ENABLE_MASK, \ + .enable_time =3D S2MPS16_ENABLE_TIME_LDO \ +} + +#define regulator_desc_s2mps16_buck(num, min, step, vsel, enable) { \ + .name =3D "buck"#num, \ + .id =3D S2MPS16_BUCK##num, \ + .ops =3D &s2mps16_buck_ops, \ + .type =3D REGULATOR_VOLTAGE, \ + .owner =3D THIS_MODULE, \ + .min_uV =3D S2MPS16_BUCK_##min, \ + .uV_step =3D S2MPS16_BUCK_##step, \ + .n_voltages =3D S2MPS16_BUCK_N_VOLTAGES, \ + .vsel_reg =3D S2MPS16_REG_B##num##vsel, \ + .vsel_mask =3D S2MPS16_BUCK_VSEL_MASK, \ + .enable_reg =3D S2MPS16_REG_B##num##enable, \ + .enable_mask =3D S2MPS16_ENABLE_MASK, \ + .enable_time =3D S2MPS16_ENABLE_TIME_BUCK##num \ +} + +#define regulator_desc_s2mps16_buck1(num) \ + regulator_desc_s2mps16_buck(num, MIN1, STEP1, CTRL2, CTRL1) + +#define regulator_desc_s2mps16_buck2(num) \ + regulator_desc_s2mps16_buck(num, MIN1, STEP1, CTRL3, CTRL1) + +#define regulator_desc_s2mps16_buck3(num) \ + regulator_desc_s2mps16_buck(num, MIN2, STEP2, CTRL2, CTRL1) + +static const struct regulator_desc s2mps16_regulators[] =3D { + regulator_desc_s2mps16_ldo(1, MIN2, STEP1), + regulator_desc_s2mps16_ldo(2, MIN4, STEP2), + regulator_desc_s2mps16_ldo(3, MIN3, STEP2), + regulator_desc_s2mps16_ldo(4, MIN3, STEP1), + regulator_desc_s2mps16_ldo(5, MIN3, STEP2), + regulator_desc_s2mps16_ldo(6, MIN4, STEP2), + regulator_desc_s2mps16_ldo(7, MIN1, STEP2), + regulator_desc_s2mps16_ldo(8, MIN1, STEP2), + regulator_desc_s2mps16_ldo(9, MIN1, STEP2), + regulator_desc_s2mps16_ldo(10, MIN1, STEP2), + regulator_desc_s2mps16_ldo(11, MIN1, STEP2), + regulator_desc_s2mps16_ldo(12, MIN3, STEP1), + regulator_desc_s2mps16_ldo(13, MIN3, STEP1), + /* LDOs 14-24 are used for CP. They aren't documented */ + regulator_desc_s2mps16_ldo(25, MIN3, STEP1), + regulator_desc_s2mps16_ldo(26, MIN3, STEP1), + regulator_desc_s2mps16_ldo(27, MIN3, STEP1), + regulator_desc_s2mps16_ldo(28, MIN4, STEP2), + regulator_desc_s2mps16_ldo(29, MIN4, STEP2), + regulator_desc_s2mps16_ldo(30, MIN3, STEP2), + regulator_desc_s2mps16_ldo(31, MIN3, STEP1), + regulator_desc_s2mps16_ldo(32, MIN3, STEP2), + regulator_desc_s2mps16_ldo(33, MIN4, STEP2), + regulator_desc_s2mps16_ldo(34, MIN4, STEP2), + regulator_desc_s2mps16_ldo(35, MIN4, STEP2), + regulator_desc_s2mps16_ldo(36, MIN4, STEP2), + regulator_desc_s2mps16_ldo(37, MIN3, STEP2), + regulator_desc_s2mps16_ldo(38, MIN3, STEP1), + regulator_desc_s2mps16_buck1(1), + regulator_desc_s2mps16_buck1(2), + regulator_desc_s2mps16_buck1(3), + regulator_desc_s2mps16_buck1(4), + regulator_desc_s2mps16_buck1(5), + regulator_desc_s2mps16_buck2(6), + regulator_desc_s2mps16_buck1(7), + regulator_desc_s2mps16_buck3(8), + regulator_desc_s2mps16_buck3(9), + /* BUCK 10 is used for CP. It's not documented */ + regulator_desc_s2mps16_buck1(11), +}; + static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11, struct regulator_dev *rdev) { @@ -1238,6 +1379,11 @@ static int s2mps11_pmic_probe(struct platform_device= *pdev) regulators =3D s2mps15_regulators; BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps15_regulators)); break; + case S2MPS16X: + rdev_num =3D ARRAY_SIZE(s2mps16_regulators); + regulators =3D s2mps16_regulators; + BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps16_regulators)); + break; case S2MPU02: rdev_num =3D ARRAY_SIZE(s2mpu02_regulators); regulators =3D s2mpu02_regulators; @@ -1316,6 +1462,7 @@ static const struct platform_device_id s2mps11_pmic_i= d[] =3D { { "s2mps13-regulator", S2MPS13X}, { "s2mps14-regulator", S2MPS14X}, { "s2mps15-regulator", S2MPS15X}, + { "s2mps16-regulator", S2MPS16X}, { "s2mpu02-regulator", S2MPU02}, { "s2mpu05-regulator", S2MPU05}, { }, --=20 2.43.0