From nobody Thu Oct 2 18:06:25 2025 Received: from mail-4323.protonmail.ch (mail-4323.protonmail.ch [185.70.43.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C0CF2DC32B; Sun, 14 Sep 2025 20:44:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757882660; cv=none; b=fnis8NYGdfD1u3i4MmMwPvF7Czr7sh9IAVXKvoqvoyeJaE5RDEYYlsf1kU8V958B7Mj6dwibA6napRcJps9TSADoyr61Fg0PLKH6kMjqVp5HYWLuZuMRw0GYFWjxB8CdRd1VL4DS0P37c6F4gYSaYM2TfkrQPVD3Src1UEQhBTI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757882660; c=relaxed/simple; bh=0wUspdY+M+Ez5V3YoMgHUs4+ASlTB6ZBwb3NRLcYThY=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XfKLXhaAX8ACXir9XwFm9RADlLd35uvd7wojokV0/ljbEFbvaylhZbP0XELVEUYkW6eWaLsRRyZ5hKjYXqa5CGAu3fZqPxzK50fnb33Rtxv8eF7mtcJMZpsKss01RtgOSAkckBmh8Wk/7bnJc+h1wSzvc1aLp7UyWiD/btkZHi4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=chimac.ro; spf=pass smtp.mailfrom=chimac.ro; dkim=pass (2048-bit key) header.d=chimac.ro header.i=@chimac.ro header.b=o1Oj8PkV; arc=none smtp.client-ip=185.70.43.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=chimac.ro Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chimac.ro Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=chimac.ro header.i=@chimac.ro header.b="o1Oj8PkV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chimac.ro; s=protonmail; t=1757882654; x=1758141854; bh=I0oZCjAslYJsmaLEZcSbKhlGfPqb/30qFq3pqSgzpyg=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=o1Oj8PkVKUu/kQ0O+hBxOeGCj0U8S+b63gjSDowwrLmzKoeTc/H92pP36FkjYp68C UmX4XJ8yfle1B736QUNFipcKQywEJjYfVr8rIdQJTf3FFQhbPjHh/JfRvMd2jtjT+4 FZXUd1ETPl3XHstlqScPQRf729QfJCnG2YLJnWnmIWqQ1kNhV9hJ+OW5w47xd976J6 ZVjexEWE+ahWaDOEx89O25iForHj5fpmiGyunCMDTD7NPRLt9dyiLsU6eCMRkso6KK OuqtuuRUSwJyrT+4MBHqk9CoOn1ITZg+63oTYQR9vk1q9Tzu+QWr2+kSH8iwkTzx2W //TQwbUDgWfug== Date: Sun, 14 Sep 2025 20:44:09 +0000 To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Krzysztof Kozlowski , Kees Cook , Tony Luck , "Guilherme G. Piccoli" From: Alexandru Chimac Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org, Alexandru Chimac Subject: [PATCH 2/3] arm64: dts: exynos: Add initial support for the Exynos9610 SoC Message-ID: <20250914-exynos9610-devicetree-v1-2-2000fc3bbe0b@chimac.ro> In-Reply-To: <20250914-exynos9610-devicetree-v1-0-2000fc3bbe0b@chimac.ro> References: <20250914-exynos9610-devicetree-v1-0-2000fc3bbe0b@chimac.ro> Feedback-ID: 139133584:user:proton X-Pm-Message-ID: 8f6d7e8e1e74d26a521e975337a61aa46435b7ad Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Exynos9610 SoC is found in 2020-2021 Samsung Galaxy A/M-series devices. Add basic support for this SoC, including: - All 8 cores - ChipID - Generic timer - pinctrl Signed-off-by: Alexandru Chimac --- arch/arm64/boot/dts/exynos/exynos9610-pinctrl.dtsi | 1180 ++++++++++++++++= ++++ arch/arm64/boot/dts/exynos/exynos9610.dtsi | 263 +++++ 2 files changed, 1443 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos9610-pinctrl.dtsi b/arch/arm6= 4/boot/dts/exynos/exynos9610-pinctrl.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..a7cc40d0ea84676d0f19c9912bb= a521a0162575a --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos9610-pinctrl.dtsi @@ -0,0 +1,1180 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung Exynos9610 pinmux and pinconf + * + * Copyright (c) 2025, Alexandru Chimac + */ + +#include +#include "exynos-pinctrl.h" + +&pinctrl_alive { + etc0: etc0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <3>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <3>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <3>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpq0: gpq0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + speedy_bus: speedy-bus-pins { + samsung,pins =3D "gpq0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart0_bus: uart0-bus-pins { + samsung,pins =3D "gpq0-3", "gpq0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + xclkout1: xclkout1 { + samsung,pins =3D "gpq0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + xclkout0: xclkout0 { + samsung,pins =3D "gpq0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_cmgp { + gpm0: gpm0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm1: gpm1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm2: gpm2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm3: gpm3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm4: gpm4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm5: gpm5-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm6: gpm6-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm7: gpm7-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm8: gpm8-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm9: gpm9-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm10: gpm10-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm11: gpm11-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm12: gpm12-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm13: gpm13-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm14: gpm14-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm15: gpm15-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm16: gpm16-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm17: gpm17-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm18: gpm18-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm19: gpm19-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + gpm20: gpm20-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm21: gpm21-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm22: gpm22-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + + + gpm23: gpm23-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm24: gpm24-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + gpm25: gpm25-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins =3D "gpm2-0", "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins =3D "gpm6-0", "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins =3D "gpm10-0", "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins =3D "gpm14-0", "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins =3D "gpm16-0", "gpm17-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins =3D "gpm18-0", "gpm19-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_bus: spi1-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0", "gpm2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins =3D "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_cs_func: spi1-cs-func-pins { + samsung,pins =3D "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_bus: spi2-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0", "gpm6-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins =3D "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_cs_func: spi2-cs-func-pins { + samsung,pins =3D "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_bus: spi3-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0", "gpm10-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins =3D "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_cs_func: spi3-cs-func-pins { + samsung,pins =3D "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_bus: spi4-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0", "gpm14-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins =3D "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_cs_func: spi4-cs-func-pins { + samsung,pins =3D "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_bus: spi5-bus-pins { + samsung,pins =3D "gpm16-0", "gpm17-0", "gpm18-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins =3D "gpm19-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_cs_func: spi5-cs-func-pins { + samsung,pins =3D "gpm19-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart2_bus_single: uart2-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0", "gpm2-0", "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus_single: uart3-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0", "gpm6-0", "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus_single: uart4-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0", "gpm10-0", "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus_single: uart5-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0", "gpm14-0", "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart6_bus_single: uart6-bus-pins { + samsung,pins =3D "gpm16-0", "gpm17-0", "gpm18-0", "gpm19-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_dispaud { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + aud_codec_mclk: aud-codec-mclk-pins { + samsung,pins =3D "gpb0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_codec_mclk_idle: aud-codec-mclk-idle-pins { + samsung,pins =3D "gpb0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s0_bus: aud-i2s0-bus-pins { + samsung,pins =3D "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s0_idle: aud-i2s0-idle-pins { + samsung,pins =3D "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s1_bus: aud-i2s1-bus-pins { + samsung,pins =3D "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s1_idle: aud-i2s1-idle-pins { + samsung,pins =3D "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s2_bus: aud-i2s2-bus-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s2_idle: aud-i2s2-idle-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_dsd_bus: aud-dsd-bus-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_dsd_idle: aud-dsd-idle-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_fm_bus: aud-fm-bus-pins { + samsung,pins =3D "gpb2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_fm_idle: aud-fm-idle-pins { + samsung,pins =3D "gpb2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_fsys { + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf2: gpf2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins =3D "gpf0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + sd0_clk: sd0-clk-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_cmd: sd0-cmd-pins { + samsung,pins =3D "gpf0-1"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_rdqs: sd0-rdqs-pins { + samsung,pins =3D "gpf0-2"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_clk_fast_slew_rate_1x: sd0-clk-fast-slew-rate-1x-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_clk_fast_slew_rate_1_5x: sd0-clk-fast-slew-rate-1-5x-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_clk_fast_slew_rate_2x: sd0-clk-fast-slew-rate-2x-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_clk_fast_slew_rate_2_5x: sd0-clk-fast-slew-rate-2-5x-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_clk_fast_slew_rate_3x: sd0-clk-fast-slew-rate-3x-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_clk_fast_slew_rate_4x: sd0-clk-fast-slew-rate-4x-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_bus1: sd0-bus-width1-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_bus4: sd0-bus-width4-pins { + samsung,pins =3D "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd0_bus8: sd0-bus-width8-pins { + samsung,pins =3D "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins =3D "gpf2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins =3D "gpf2-1"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins =3D "gpf2-2"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins =3D "gpf2-3", "gpf2-4", "gpf2-5"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins { + samsung,pins =3D "gpf2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins { + samsung,pins =3D "gpf2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk-fast-slew-rate-3x-pins { + samsung,pins =3D "gpf2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung.pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins { + samsung,pins =3D "gpf2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; + +&pinctrl_top { + gpp0: gpp0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp1: gpp1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp2: gpp2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc1: gpc1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc2: gpc2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg1: gpg1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg2: gpg2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg3: gpg3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg4: gpg4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + decon_f_te_on: decon-f-te-on-pins { + samsung,pins =3D "gpc2-3"; + samsung,pin-function =3D ; + }; + + decon_f_te_off: decon-f-te-off-pins { + samsung,pins =3D "gpc2-3"; + samsung,pin-function =3D ; + }; + + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins =3D "gpc0-0", "gpc0-1"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins =3D "gpc0-2", "gpc0-3"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins =3D "gpc0-4", "gpc0-5"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins =3D "gpc0-6", "gpc0-7"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins =3D "gpc1-0", "gpc1-1"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins =3D "gpc1-2", "gpc1-3"; + samsung,pin-function =3D <3>; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2c0_bus: i2c0-bus-pins { + samsung,pins =3D "gpp0-1", "gpp0-0"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2c1_bus: i2c1-bus-pins { + samsung,pins =3D "gpp0-3", "gpp0-2"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2c2_bus: i2c2-bus-pins { + samsung,pins =3D "gpp0-5", "gpp0-4"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2c3_bus: i2c3-bus-pins { + samsung,pins =3D "gpp0-7", "gpp0-6"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2c4_bus: i2c4-bus-pins { + samsung,pins =3D "gpp1-1", "gpp1-0"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2c5_bus: i2c5-bus-pins { + samsung,pins =3D "gpp1-3", "gpp1-2"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2c6_bus: i2c6-bus-pins { + samsung,pins =3D "gpp1-5", "gpp1-4"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_bus: spi6-bus-pins { + samsung,pins =3D "gpp2-0", "gpp2-1", "gpp2-2"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins =3D "gpp2-3"; + samsung,pin-function =3D <1>; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_cs_func: spi6-cs-func-pins { + samsung,pins =3D "gpp2-3"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_bus: spi7-bus-pins { + samsung,pins =3D "gpp2-4", "gpp2-5", "gpp2-6"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins =3D "gpp2-7"; + samsung,pin-function =3D <1>; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_cs_func: spi7-cs-func-pins { + samsung,pins =3D "gpp2-7"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_bus: spi8-bus-pins { + samsung,pins =3D "gpc1-0", "gpc1-1", "gpc1-2"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins =3D "gpc1-3"; + samsung,pin-function =3D <1>; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_cs_func: spi8-cs-func-pins { + samsung,pins =3D "gpc1-3"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_bus: spi9-bus-pins { + samsung,pins =3D "gpc1-4", "gpc1-5", "gpc1-6"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins =3D "gpc1-7"; + samsung,pin-function =3D <1>; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_cs_func: spi9-cs-func-pins { + samsung,pins =3D "gpc1-7"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart7_bus_single: uart7-bus-pins { + samsung,pins =3D "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3"; + samsung,pin-function =3D ; + samsung.pin-pud =3D ; + }; +}; + +&pinctrl_shub { + gph0: gph0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gph1: gph1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins =3D "gph0-0", "gph0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins =3D "gph0-2", "gph0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins =3D "gph0-2", "gph0-1", "gph0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins =3D "gph0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_cs_func: spi0-cs-func-pins { + samsung,pins =3D "gph0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart1_bus_single: uart1-bus-pins { + samsung,pins =3D "gph0-3", "gph0-2", "gph0-1", "gph0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos9610.dtsi b/arch/arm64/boot/d= ts/exynos/exynos9610.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..852f7111e5cdfd82b5afc350792= e8b539fe87d39 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos9610.dtsi @@ -0,0 +1,263 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung Exynos9610 common device tree + * + * Copyright (c) 2025, Alexandru Chimac + */ + +#include + +/ { + compatible =3D "samsung,exynos9610"; + #address-cells =3D <2>; + #size-cells =3D <1>; + + interrupt-parent =3D <&gic>; + + aliases { + pinctrl0 =3D &pinctrl_alive; + pinctrl1 =3D &pinctrl_cmgp; + pinctrl2 =3D &pinctrl_dispaud; + pinctrl3 =3D &pinctrl_fsys; + pinctrl4 =3D &pinctrl_top; + pinctrl5 =3D &pinctrl_shub; + }; + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu0>; + }; + + core1 { + cpu =3D <&cpu1>; + }; + + core2 { + cpu =3D <&cpu2>; + }; + + core3 { + cpu =3D <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu100>; + }; + + core1 { + cpu =3D <&cpu101>; + }; + + core2 { + cpu =3D <&cpu102>; + }; + + core3 { + cpu =3D <&cpu103>; + }; + }; + }; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x0>; + enable-method =3D "psci"; + }; + + cpu1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x1>; + enable-method =3D "psci"; + }; + + cpu2: cpu@2 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x2>; + enable-method =3D "psci"; + }; + + cpu3: cpu@3 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x3>; + enable-method =3D "psci"; + }; + + cpu100: cpu@100 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a73"; + reg =3D <0x100>; + enable-method =3D "psci"; + }; + + cpu101: cpu@101 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a73"; + reg =3D <0x101>; + enable-method =3D "psci"; + }; + + cpu102: cpu@102 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a73"; + reg =3D <0x102>; + enable-method =3D "psci"; + }; + + cpu103: cpu@103 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a73"; + reg =3D <0x103>; + enable-method =3D "psci"; + }; + }; + + psci { + compatible =3D "arm,psci"; + method =3D "smc"; + cpu_suspend =3D <0xc4000001>; + cpu_off =3D <0x84000002>; + cpu_on =3D <0xc4000003>; + }; + + arm-a53-pmu { + compatible =3D "arm,cortex-a53-pmu"; + interrupts =3D <0 82 4>, + <0 83 4>, + <0 84 4>, + <0 85 4>; + interrupt-affinity =3D <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + arm-a73-pmu { + compatible =3D "arm,cortex-a73-pmu"; + interrupts =3D <0 96 4>, + <0 97 4>, + <0 98 4>, + <0 99 4>; + interrupt-affinity =3D <&cpu100>, + <&cpu101>, + <&cpu102>, + <&cpu103>; + }; + + oscclk: clock-osc { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-output-names =3D "oscclk"; + clock-frequency =3D <26000000>; + }; + + soc: soc@0 { + compatible =3D "simple-bus"; + ranges =3D <0x0 0x0 0x0 0x20000000>; + + #address-cells =3D <1>; + #size-cells =3D <1>; + + chipid@10000000 { + compatible =3D "samsung,exynos9610-chipid", + "samsung,exynos850-chipid"; + reg =3D <0x10000000 0x100>; + }; + + pinctrl_shub: pinctrl@11080000 { + compatible =3D "samsung,exynos9610-pinctrl"; + reg =3D <0x11080000 0x1000>; + interrupts =3D ; + }; + + pinctrl_alive: pinctrl@11850000 { + compatible =3D "samsung,exynos9610-pinctrl"; + reg =3D <0x11850000 0x1000>; + + wakeup-interrupt-controller { + compatible =3D "samsung,exynos9610-wakeup-eint", + "samsung,exynos850-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_cmgp: pinctrl@11c20000 { + compatible =3D "samsung,exynos9610-pinctrl"; + reg =3D <0x11c20000 0x1000>; + }; + + gic: interrupt-controller@12300000 { + compatible =3D "arm,gic-400"; + #interrupt-cells =3D <3>; + #address-cells =3D <0>; + interrupt-controller; + reg =3D <0x12301000 0x1000>, + <0x12302000 0x1000>, + <0x12304000 0x2000>, + <0x12306000 0x2000>; + interrupts =3D ; + }; + + pinctrl_fsys: pinctrl@13490000 { + compatible =3D "samsung,exynos9610-pinctrl"; + reg =3D <0x13490000 0x1000>; + interrupts =3D ; + }; + + pinctrl_top: pinctrl@139b0000 { + compatible =3D "samsung,exynos9610-pinctrl"; + reg =3D <0x139b0000 0x1000>; + interrupts =3D ; + }; + + pinctrl_dispaud: pinctrl@14a60000 { + compatible =3D "samsung,exynos9610-pinctrl"; + reg =3D <0x14a60000 0x1000>; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + + /* Stock Samsung bootloader doesn't configure CNTFRQ_EL0 */ + clock-frequency =3D <26000000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges; + + abox_rmem: abox@e9400000 { + compatible =3D "reserved-memory"; + reg =3D <0x0 0xe9400000 0x2800000>; + no-map; + }; + + ramoops@f9d10000 { + compatible =3D "ramoops"; + reg =3D <0x0 0xf9d10000 0x200000>; + record-size =3D <0x80000>; + console-size =3D <0x80000>; + ftrace-size =3D <0x80000>; + pmsg-size =3D <0x80000>; + }; + }; +}; + +#include "exynos9610-pinctrl.dtsi" --=20 2.47.3