From nobody Thu Oct 2 17:00:09 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 527E426B95B; Sat, 13 Sep 2025 21:31:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799064; cv=none; b=hritp6vCVkmea3bYSPPoTxG18LNJxDBqTIkD+QYwB8pDiMOEmZyz+bycr6w7qfLLcarvsqCU/axPrPiYJD5Mv+IEtOUdcpwVIkRgH6d/qyhDakkvlNBBQhtzT2MTv9Pnr9Z58e7hcMYzhJKqEOBdjmFRGrPZtJubERncTJw9E+I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799064; c=relaxed/simple; bh=rAEJCjiuy2zBASFDNgTzbAQNwNe+tJ4VWEcuHUg6TYo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qWJsSI1tA+Vd1oSSB3Pv4mvB1UxpsdQroIQprANFea6Vi9CXSm1QRMytwfUVjUrU103aeuPFOXdMyLmjax5HJkxXd1WSwBshsx354YWXe9bIBLEeP1o4IAHX8QS1Wu5HxlZHWWm/fUyvBQg/LnPOtko1SdThHCRfTwH5yrp1pZE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NVSqRlRn; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NVSqRlRn" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 43705C4CEFA; Sat, 13 Sep 2025 21:31:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757799063; bh=rAEJCjiuy2zBASFDNgTzbAQNwNe+tJ4VWEcuHUg6TYo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=NVSqRlRnfzLvA+lRv2ZK/ZG6x+tQE3cM+RkcOD1tRyE/iMU3flrKzBWsVZm7f2Xgw UyN8UaVHC2q/TzdmRddkB3konWqBjFvnFt+o5319N3u1dFZO7rqb6eGsPrtjVA5YJY rBkjMCzUfRY5M9Z7jP29Al0Da7WlDIde04oWf1/aVEVt3cYEFiW8nz9RHJvy3uEm0G aZhp6R0UvsBEk6OFJGLk1hACIrtnLJErJhk+GPWW2A63S5K34TBMVVitBkw44sldx3 AiKqNik/Z4idfxgkKv4DSLVqdwM75dyRtzkntmfkZIbGd4W4/BvTJGOyvlGyqtPFZM QAkGYQ8zgjZJQ== From: Drew Fustini Date: Sat, 13 Sep 2025 14:31:00 -0700 Subject: [PATCH 1/7] dt-bindings: vendor-prefixes: Add Tenstorrent AI ULC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250913-tt-bh-dts-v1-1-ddb0d6860fe5@tenstorrent.com> References: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> In-Reply-To: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Samuel Holland , Daniel Lezcano , Thomas Gleixner , Anup Patel , Arnd Bergmann , Joel Stanley , Joel Stanley , Michael Neuling , Nicholas Piggin , Michael Ellerman , Andy Gross Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Drew Fustini X-Mailer: b4 0.14.2 From: Drew Fustini Document vendor prefix for Tenstorrent in DT bindings. Signed-off-by: Drew Fustini Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 9ec8947dfcad2fa53b2dca2ca06a63710771a600..8bbc0ebdfb9eb5864f2797251a8= d144e2eea9a92 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1547,6 +1547,8 @@ patternProperties: description: Teltonika Networks "^tempo,.*": description: Tempo Semiconductor + "^tenstorrent,.*": + description: Tenstorrent AI ULC "^terasic,.*": description: Terasic Inc. "^tesla,.*": --=20 2.34.1 From nobody Thu Oct 2 17:00:09 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2082283130; Sat, 13 Sep 2025 21:31:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799064; cv=none; b=Ai30ZFyyDRVOF40P3wGwyvomlB84+z5TbnEDu6heLzGd3PtcmCD77SYq41vGeQTyDEFSGlCx/vquQ1f0ACCFJTzyV2zfUOBpGdX3A+/j5MIdHy1kn12GWvAEc3/feCyMhndCo7b/YvNZxZLLtd7/MU3kEXKwx3YcnPPbD99rjss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799064; c=relaxed/simple; bh=5XRfwkc2GmSFjCFXpIdslo6TCdgE2D3C6IHaqnU33bM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=T/Xaa0n89OU5XLE8Tt+TJEYc0j/oTOD7H7tAOgzW9gbuWmijAZJaZGwFOR4iTiZRtGl5oxFdY0TPhIHQ02aNEXMWcZHjccqgo7B9C61aq9tNQ8/v5ipnVRMKMoeddZEppl7hCaz/wEMS9PHQpMg7aBLBwWhxobGE4xlmVqmrZTA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sRaZeCCK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sRaZeCCK" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E8608C4AF09; Sat, 13 Sep 2025 21:31:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757799064; bh=5XRfwkc2GmSFjCFXpIdslo6TCdgE2D3C6IHaqnU33bM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=sRaZeCCKoOnPGl+VM8wJ4aIU4egb2YSGfTnPm7Tucq1/AyYB8pqx472cbMArm5mZm ANvqqyVoriE/0DUeSut2ljhb3CJQv1eW+UleKiug+Se97kTT8eRAf0jyyapWXLQW2R ALeBAJk/b+eJbQojalVFsX3g2uORARivAznpIedTelNurOci8zgD6ARF5FDWTQVyIO vVISWPwBu99MIdAfvQ6Lk21VPVBW1rVvwjmFls3H35FKYCV2ymFKL4kLO1M2wwLvTF e56i0udU5JQOuY9mw6D2BkIqu8lpnzXHgDvm881nbkEb2nk5o+5k1MjCdhwBpYAXYR p445bXTE88ZSg== From: Drew Fustini Date: Sat, 13 Sep 2025 14:31:01 -0700 Subject: [PATCH 2/7] dt-bindings: riscv: Add Tenstorrent Blackhole compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250913-tt-bh-dts-v1-2-ddb0d6860fe5@tenstorrent.com> References: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> In-Reply-To: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Samuel Holland , Daniel Lezcano , Thomas Gleixner , Anup Patel , Arnd Bergmann , Joel Stanley , Joel Stanley , Michael Neuling , Nicholas Piggin , Michael Ellerman , Andy Gross Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Drew Fustini X-Mailer: b4 0.14.2 From: Drew Fustini Add compatibles for the Tenstorrent Blackhole A0 SoC PCIe card. Signed-off-by: Drew Fustini Reviewed-by: Rob Herring (Arm) --- .../devicetree/bindings/riscv/tenstorrent.yaml | 28 ++++++++++++++++++= ++++ MAINTAINERS | 8 +++++++ 2 files changed, 36 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/tenstorrent.yaml b/Doc= umentation/devicetree/bindings/riscv/tenstorrent.yaml new file mode 100644 index 0000000000000000000000000000000000000000..877da1b0214f6730713369f82a1= fdcc44c4ea562 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/tenstorrent.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/tenstorrent.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Tenstorrent SoC-based boards + +maintainers: + - Drew Fustini + - Joel Stanley + +description: + Tenstorrent SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Tenstorrent Blackhole A0 PCIe card + items: + - const: tenstorrent,blackhole-a0-card + - const: tenstorrent,blackhole-a0 + +additionalProperties: true + +... diff --git a/MAINTAINERS b/MAINTAINERS index cd7ff55b5d321752ac44c91d2d7e74de28e08960..f2cb2aae8d66d21bf5c13b16b3b= 1d8fdc98b9462 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21741,6 +21741,14 @@ F: arch/riscv/boot/dts/spacemit/ N: spacemit K: spacemit =20 +RISC-V TENSTORRENT SoC SUPPORT +M: Drew Fustini +M: Joel Stanley +L: linux-riscv@lists.infradead.org +S: Maintained +T: git https://github.com/tenstorrent/linux.git +F: Documentation/devicetree/bindings/riscv/tenstorrent.yaml + RISC-V THEAD SoC SUPPORT M: Drew Fustini M: Guo Ren --=20 2.34.1 From nobody Thu Oct 2 17:00:09 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A969F28468D; Sat, 13 Sep 2025 21:31:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799065; cv=none; b=HTcqTy7Mih4pkfiFIOR2QQXHtL1j+W8oZ2G2m7KJUv8oYXeDUTfT28u1YIFNpX5Sa/vL+QwGPeTmFHbbcoZ3mo9EU4E8biVskSYQfknWCmvcGXgLAt5LUiCgXGcJKaBz7fSplGRGacYHySfuJdM5phgje4k1eMSw8iZrv8cR2z4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799065; c=relaxed/simple; bh=dAjXCByJWDvW78TjUkKWkwaKt8o8TeBgyz4QQntn2Hs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EkBZRWPs3seSN/tewgt35RpXo903OGpojjXXK7YR8gruhKF+OyztRvu/UFTUXw/2obUZKP9+Ps0b1WGEyXVRP+x8YEjzGvmxd6ig6J4Yc1Gsm0omLNz9mgYObLwOFZ0q47aA1QHKiW733srryCPokDZD/leaKrE091gNsQMsEu4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=MX80Amck; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="MX80Amck" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 99128C4CEEB; Sat, 13 Sep 2025 21:31:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757799065; bh=dAjXCByJWDvW78TjUkKWkwaKt8o8TeBgyz4QQntn2Hs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=MX80AmckTrH9jVOS/tTJYepLYhpVtMhI/Gf5RCGFOJ/36AZKs67cAps5S+FcuzYAH FIKllea9sQ513gaY40lqu58t42iRrA4k35ObCHMGHcgSFfI4xfqI//X/KicBKk6mGj EGEKWKOj4njLkqMm4rGdqiH6/1D6GFgYU9H/Av+O3vWz10+qu1MV4k557hs8mm/+/i Z4owwXlFMl+smrrfSOP9wVbfI9dVqB25cxyf7vvxOkIYOEpnWFKLeMIyZiCHdLvQtI Wd4JqwqZqS1cnG+DpBCUHax8SSMSPRN16ESfRLhbXehZQnQInOW4HSUwkVDHToj/RN jhaHP2GdLjYAQ== From: Drew Fustini Date: Sat, 13 Sep 2025 14:31:02 -0700 Subject: [PATCH 3/7] dt-bindings: riscv: cpus: Add SiFive X280 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250913-tt-bh-dts-v1-3-ddb0d6860fe5@tenstorrent.com> References: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> In-Reply-To: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Samuel Holland , Daniel Lezcano , Thomas Gleixner , Anup Patel , Arnd Bergmann , Joel Stanley , Joel Stanley , Michael Neuling , Nicholas Piggin , Michael Ellerman , Andy Gross Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Drew Fustini X-Mailer: b4 0.14.2 From: Drew Fustini Document compatible for the SiFive X280 RISC-V core. Signed-off-by: Drew Fustini Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentat= ion/devicetree/bindings/riscv/cpus.yaml index 1a0cf0702a45d2df38c48f50d66b3d2ac3715da5..bbc3886282dc5e8c53e54c0acd9= 1608b443f590f 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -69,6 +69,7 @@ properties: - enum: - sifive,e51 - sifive,u54-mc + - sifive,x280 - const: sifive,rocket0 - const: riscv - const: riscv # Simulator only --=20 2.34.1 From nobody Thu Oct 2 17:00:09 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 460122848B3; Sat, 13 Sep 2025 21:31:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799066; cv=none; b=kAdI+fMAEVJsBDO3EaNLSGl7MP16PdPIxTwDvl5ijHJF3dTz/5cgvV6dM7Xs8h8Soq6bfG7Ofo2PvgzxEc74+sYiKlmq9JpPdwkAog5OcGHal2p0fgVo5piSmEoAvg7TAMfWyWAcBYREYsDzLiPbOxN2ZIm/0P0nLjPdhNYdkLI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799066; c=relaxed/simple; bh=KWeVzBb2k7TISyEOWMEPtUUbf6En7nS4bmjdkluUFOo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lPmgq4PMeGzoj3VePZHEn6jq0eg6fuIswtQrzzCiZxa8tkOPbfG6vyIl/dbokqVKjTWCWLljsn1a9SzprADzxuJ98/84Jn2LcgPfWHYQo1AkUdOZ0G4c8aVBf9gl1XYs8eVa/x/xY5qqnCvJvZWMV71GI5hWKNbnqnrSVoJwGUY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LkBw5ZPO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LkBw5ZPO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4ADDDC4CEFA; Sat, 13 Sep 2025 21:31:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757799065; bh=KWeVzBb2k7TISyEOWMEPtUUbf6En7nS4bmjdkluUFOo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=LkBw5ZPOz2Mjr4ispAEQ2XM17AuZf2AhRSngYzmp4DwRso3D2XsgIEfodRIUbubTT a07qCAvwkJoNybyy7C8zguGhCXSzD/TOzVa0Eb+SHwjw4E/qPLCd44X4eIB5OUtTIk S6/MajvD9FJtWfd/LVDuCYjfOG9vgUtuQagPdrcD7YNecESGeFX2UeOHXGhKSzOoeM slkludN0tEGGpdsr2XKbMvIo1Au0u5VL2qIu863gaosgluf4HmYuIFuQEYmplXAV+p 0aPUNJaJD2878chpcd9bCBl2mRAm4R1kMUuYrfl4T1+FBdqiEjdSVoChNpNi+2wkES 12ebWe64VhZQQ== From: Drew Fustini Date: Sat, 13 Sep 2025 14:31:03 -0700 Subject: [PATCH 4/7] dt-bindings: timers: Add Tenstorrent Blackhole compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250913-tt-bh-dts-v1-4-ddb0d6860fe5@tenstorrent.com> References: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> In-Reply-To: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Samuel Holland , Daniel Lezcano , Thomas Gleixner , Anup Patel , Arnd Bergmann , Joel Stanley , Joel Stanley , Michael Neuling , Nicholas Piggin , Michael Ellerman , Andy Gross Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Drew Fustini X-Mailer: b4 0.14.2 From: Drew Fustini Document clint compatible for the Tenstorrent Blackhole A0 SoC. Signed-off-by: Drew Fustini --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Do= cumentation/devicetree/bindings/timer/sifive,clint.yaml index d85a1a088b35dabc0aa202475b926302705c4cf1..198146c59de0c95a2ffa052c8d4= d7aa3f91f8e92 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -36,6 +36,7 @@ properties: - starfive,jh7100-clint # StarFive JH7100 - starfive,jh7110-clint # StarFive JH7110 - starfive,jh8100-clint # StarFive JH8100 + - tenstorrent,blackhole-a0-clint # Tenstorrent Blackhole - const: sifive,clint0 # SiFive CLINT v0 IP block - items: - {} --=20 2.34.1 From nobody Thu Oct 2 17:00:09 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A20AC2857E9; Sat, 13 Sep 2025 21:31:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799066; cv=none; b=IfW5jbUmAA1CcWo95JiHsU60b84jqM+92JD1aILYvIy7t0OBWOTWAb4noDugkEgJSSwumOm1yiR7RQZHT3ycu41vNPAeOcPjWUfDiGajGQQww+3OFuQhlQyTydjq+jAVfMaDDXLnOxvfdHjOAxl7CFm18+psosv1k1OSuq8yGIE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799066; c=relaxed/simple; bh=thVTGezMo0pAosaN7Dx0/XK1CsqI2+np60A2VazYJJg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YrAsXmLmNg1CKT5WWs50iGLVme1KdFv/t9ofkO4IDvHns3GioTE5ku41yFDe+stYIxRUMN2cDb4FHc//wTzuCNuynAkDOdiBvN0uDN8E5TvKd/JyBFYU/uX/p2iPBya7ULY3Yv0XtksF7uSdExsPY0R9nvs+CRWSjgsKA73uI+c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=djWMGv+M; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="djWMGv+M" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EF399C4CEEB; Sat, 13 Sep 2025 21:31:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757799066; bh=thVTGezMo0pAosaN7Dx0/XK1CsqI2+np60A2VazYJJg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=djWMGv+M7mlviDGoufdu4MGlzmMWmRrGGGyR55AJrlkvEv1MWmLg03bSuJIEI6Wqv d4k4EPkva7rPS9LfuviUDr2kMFhX5VwkyLG7HJuMws+/ZW5/HEggW4TTl+tnCd5Onm grrHOiDMenDr2P+8ODtU+9Hrhe92NQpdY2H7vrS/tS5xMb7azBGzo5TcvoGXuujSmb FdeKIvJddwzRPXZQni7O/ITseuVTLaaeETpBAubXh5ccMDETuzW0Y/MNS3L7WkU2pH g0OAIp6GWdnGFkQxhLQcinBPjmu3DLz0GQfPKJPJ/uKgamqEJNXjFOioTRQ5h5968o Lh2gpnkmjShpw== From: Drew Fustini Date: Sat, 13 Sep 2025 14:31:04 -0700 Subject: [PATCH 5/7] dt-bindings: interrupt-controller: Add Tenstorrent Blackhole compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250913-tt-bh-dts-v1-5-ddb0d6860fe5@tenstorrent.com> References: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> In-Reply-To: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Samuel Holland , Daniel Lezcano , Thomas Gleixner , Anup Patel , Arnd Bergmann , Joel Stanley , Joel Stanley , Michael Neuling , Nicholas Piggin , Michael Ellerman , Andy Gross Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Drew Fustini X-Mailer: b4 0.14.2 From: Drew Fustini Document compatible for the PLIC in the Tenstorrent Blackhole A0 SoC. Signed-off-by: Drew Fustini --- .../devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml |= 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,= plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/si= five,plic-1.0.0.yaml index 5b827bc243011cda1fd45d739d34eca95c6e1ee2..c960a9ec17e9fceb0b754c21162= e8730b12120fb 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.= 0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.= 0.0.yaml @@ -63,6 +63,7 @@ properties: - spacemit,k1-plic - starfive,jh7100-plic - starfive,jh7110-plic + - tenstorrent,blackhole-a0-plic - const: sifive,plic-1.0.0 - items: - enum: --=20 2.34.1 From nobody Thu Oct 2 17:00:09 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A171328689C; Sat, 13 Sep 2025 21:31:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799067; cv=none; b=Q7Bq/1TvzqeGrc3CtsAelUvbsa5aSzHh0EWU/nFdP0FniTUEjdMngTEr4OYEeNlcXK7kWm8dj7fuNuWc7rxZqokx9H9LsP/dbt7bvsT1tcaEnii2SIsLJ+eJHo4Pgwr44/7k9dFCSKwCQlD6Zp0E5oRiIgPu7Diz2yY2/FsL0P0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799067; c=relaxed/simple; bh=ROziO+R3VmC4VR2DFaqybvemVQOuiZGsH20u0Q0dkX4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=M9KELL5884GRgHlfG8vVVcHfwlUNvzPLM8qnpsL0zJ36oKkyZmLdSmvuzDMnbhU7Apc/bI7RNjQI33lxaensE8LvF9/3AqgHJMTKyQkd52F76AmHwLiBu5nRC5hdeo4vfhlvhlRTSyGOk1e0sEgwRIWYFLaXDrp+rorS0Fso0zo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TLYp7MnO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TLYp7MnO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A1141C4CEFB; Sat, 13 Sep 2025 21:31:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757799067; bh=ROziO+R3VmC4VR2DFaqybvemVQOuiZGsH20u0Q0dkX4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=TLYp7MnO2YyDeEmM3PVy7BIP0BZAvvh13gDY65vzgYxKjQI7OmAgc6+/DH7aE0XjW qox3pr0clWeommspMtn5cYm6JBMQVtYvGBSXqp53mmF0ZYEFqDnANSDJl0kUw7ue7K qc7lJJ0jnnRXy9i3Sj1ApMD6o3UzjS0R1KWDoWKBTj8ALHKtiPCixs9lsyvvqFmvwt bIb0GSUyovHvfo/pk8otEwlsQq/eJePzWJtpseb73mWC/HrJ91U83OsvsqNsH9uuWD EpXglKGM5S+q2/2UvMqZrnGAt74HKVe+2oiyoadzH/pES2rV+VkJNnBGU3VntR06xX hARxvrIz+N5pw== From: Drew Fustini Date: Sat, 13 Sep 2025 14:31:05 -0700 Subject: [PATCH 6/7] riscv: dts: Add Tenstorrent Blackhole A0 SoC PCIe cards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250913-tt-bh-dts-v1-6-ddb0d6860fe5@tenstorrent.com> References: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> In-Reply-To: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Samuel Holland , Daniel Lezcano , Thomas Gleixner , Anup Patel , Arnd Bergmann , Joel Stanley , Joel Stanley , Michael Neuling , Nicholas Piggin , Michael Ellerman , Andy Gross Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Drew Fustini X-Mailer: b4 0.14.2 From: Drew Fustini Add device tree source describing the Tenstorrent Blackhole A0 SoC and the Blackhole P100 and P150 PCIe cards. There are no differences between the P100 and P150 cards from the perspective of an OS kernel like Linux running on the X280 cores. Link: https://github.com/tenstorrent/tt-isa-documentation/blob/main/Blackho= leA0/ Signed-off-by: Drew Fustini --- MAINTAINERS | 1 + arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/tenstorrent/Makefile | 2 + .../boot/dts/tenstorrent/blackhole-a0-card.dts | 14 +++ arch/riscv/boot/dts/tenstorrent/blackhole-a0.dtsi | 112 +++++++++++++++++= ++++ 5 files changed, 130 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index f2cb2aae8d66d21bf5c13b16b3b1d8fdc98b9462..20605d7530a6d19e928709647ea= 91a9cf7913ee7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21748,6 +21748,7 @@ L: linux-riscv@lists.infradead.org S: Maintained T: git https://github.com/tenstorrent/linux.git F: Documentation/devicetree/bindings/riscv/tenstorrent.yaml +F: arch/riscv/boot/dts/tenstorrent/ =20 RISC-V THEAD SoC SUPPORT M: Drew Fustini diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile index 3b99e91efa25be2d6ca5bc173342c24a72f87187..0624199867065dbb5eb62d660f9= 50b4aa3a7abd7 100644 --- a/arch/riscv/boot/dts/Makefile +++ b/arch/riscv/boot/dts/Makefile @@ -8,4 +8,5 @@ subdir-y +=3D sifive subdir-y +=3D sophgo subdir-y +=3D spacemit subdir-y +=3D starfive +subdir-y +=3D tenstorrent subdir-y +=3D thead diff --git a/arch/riscv/boot/dts/tenstorrent/Makefile b/arch/riscv/boot/dts= /tenstorrent/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..009510bea6c8e558bda70850a7f= 8490b23bffdea --- /dev/null +++ b/arch/riscv/boot/dts/tenstorrent/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_TENSTORRENT) +=3D blackhole-a0-card.dtb diff --git a/arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dts b/arch/r= iscv/boot/dts/tenstorrent/blackhole-a0-card.dts new file mode 100644 index 0000000000000000000000000000000000000000..b2b08023643a2cebd4f92457902= 4290bb355c9b3 --- /dev/null +++ b/arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/dts-v1/; + +#include "blackhole-a0.dtsi" + +/ { + model =3D "Tenstorrent Blackhole A0 SoC PCIe card"; + compatible =3D "tenstorrent,blackhole-a0-card", "tenstorrent,blackhole-a0= "; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x4000 0x30000000 0x1 0x00000000>; + }; +}; diff --git a/arch/riscv/boot/dts/tenstorrent/blackhole-a0.dtsi b/arch/riscv= /boot/dts/tenstorrent/blackhole-a0.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..517b6442ff0fe61659069e29318= ad3f01bc504e2 --- /dev/null +++ b/arch/riscv/boot/dts/tenstorrent/blackhole-a0.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright 2025 Tenstorrent AI ULC +/dts-v1/; + +/ { + compatible =3D "tenstorrent,blackhole-a0"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + timebase-frequency =3D <50000000>; + + cpu@0 { + compatible =3D "sifive,x280", "sifive,rocket0", "riscv"; + device_type =3D "cpu"; + reg =3D <0>; + mmu-type =3D "riscv,sv57"; + riscv,isa =3D "rv64imafdcv_zicsr_zifencei_zfh_zba_zbb_sscofpmf"; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "v", "zicsr", + "zifencei", "zfh", "zba", "zbb", "sscofpmf"; + riscv,cboz-block-size =3D <0x40>; + cpu0_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + #interrupt-cells =3D <1>; + interrupt-controller; + }; + }; + + cpu@1 { + compatible =3D "sifive,x280", "sifive,rocket0", "riscv"; + device_type =3D "cpu"; + reg =3D <1>; + mmu-type =3D "riscv,sv57"; + riscv,isa =3D "rv64imafdcv_zicsr_zifencei_zfh_zba_zbb_sscofpmf"; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "v", "zicsr", + "zifencei", "zfh", "zba", "zbb", "sscofpmf"; + riscv,cboz-block-size =3D <0x40>; + cpu1_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + #interrupt-cells =3D <1>; + interrupt-controller; + }; + }; + + cpu@2 { + compatible =3D "sifive,x280", "sifive,rocket0", "riscv"; + device_type =3D "cpu"; + reg =3D <2>; + mmu-type =3D "riscv,sv57"; + riscv,isa =3D "rv64imafdcv_zicsr_zifencei_zfh_zba_zbb_sscofpmf"; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "v", "zicsr", + "zifencei", "zfh", "zba", "zbb", "sscofpmf"; + riscv,cboz-block-size =3D <0x40>; + cpu2_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + #interrupt-cells =3D <1>; + interrupt-controller; + }; + }; + + cpu@3 { + compatible =3D "sifive,x280", "sifive,rocket0", "riscv"; + device_type =3D "cpu"; + reg =3D <3>; + mmu-type =3D "riscv,sv57"; + riscv,isa-base =3D "rv64i"; + riscv,isa =3D "rv64imafdcv_zicsr_zifencei_zfh_zba_zbb_sscofpmf"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "v", "zicsr", + "zifencei", "zfh", "zba", "zbb", "sscofpmf"; + riscv,cboz-block-size =3D <0x40>; + cpu3_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + #interrupt-cells =3D <1>; + interrupt-controller; + }; + }; + }; + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + compatible =3D "simple-bus"; + ranges; + + clint0: timer@2000000 { + compatible =3D "tenstorrent,blackhole-a0-clint", "sifive,clint0"; + reg =3D <0x0 0x2000000 0x0 0x10000>; + interrupts-extended =3D <&cpu0_intc 0x3>, <&cpu0_intc 0x7>, + <&cpu1_intc 0x3>, <&cpu1_intc 0x7>, + <&cpu2_intc 0x3>, <&cpu2_intc 0x7>, + <&cpu3_intc 0x3>, <&cpu3_intc 0x7>; + }; + + plic0: interrupt-controller@c000000 { + compatible =3D "tenstorrent,blackhole-a0-plic", "sifive,plic-1.0.0"; + reg =3D <0x0 0x0c000000 0x0 0x04000000>; + interrupts-extended =3D <&cpu0_intc 11>, <&cpu0_intc 9>, + <&cpu1_intc 11>, <&cpu1_intc 9>, + <&cpu2_intc 11>, <&cpu2_intc 9>, + <&cpu3_intc 11>, <&cpu3_intc 9>; + interrupt-controller; + #interrupt-cells =3D <1>; + #address-cells =3D <0>; + riscv,ndev =3D <128>; + }; + }; +}; --=20 2.34.1 From nobody Thu Oct 2 17:00:09 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3B0A286D50; Sat, 13 Sep 2025 21:31:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799068; cv=none; b=O/wUkFuGJsCJVakO4E4bAq/oT81sh0bcFl9XWR98O62CiS+btJ9fV3JlwiXsKMLJvjpuhkZWPd2nF41FVuOplErf3sKNEmPlbxeqmI2PW2yYHRf1vEQWjyKMF6f1rMDZWXq6KhOwb2zhpeZd+WgyDu3rRbVoCImJvpsmm08bJwc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757799068; c=relaxed/simple; bh=C8WWgCrN+wbiLl32X59QvMva79V13DrPaEv4X3Biqs0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VskrdARW5rHi+4m80g2J3sz4A/CNg9Y6PUWi2JCseW6bwebibCp0kK7lD+AVrWLAHKuO7rxebu0rSE6pph/Z0xlVDl9fI35pERMt8k1NIePWTkHRGH1uygvkfyKEIPmqkU/jwAes1ex8O5jfpCvZLlghxTZ+hSHe+oUs/iF7lGo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Zwei8rxL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Zwei8rxL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 51889C4CEEB; Sat, 13 Sep 2025 21:31:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757799067; bh=C8WWgCrN+wbiLl32X59QvMva79V13DrPaEv4X3Biqs0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Zwei8rxL/qA5np37Xrd9v/dFZLa5DZRG/NaH3fYR6FxvgcQRWku2IjSK4v4aj9All x1xwtcI0egOfPvHbLrDD/TLnEmYkaEHibp4mKoXQgIMe2/+Cf9/RalVylukELm0R8+ fBJ5C/b1fagOUtdHUpluZ/T+Uh+sNonpxDtu0ELhjaPaVnZ0GwsGU6Y1a+b374YCYT U0rmxe58yO/NO3qeod7oYSj9NEl7Nner2SBL8Xoe54xDL3H4IAvlGXqn3U29iPkcY+ M2owLIuVadvDQgQJyIzxbn/v54sZdWxgJ6tczuokvt/3xk7SZIvHAAOslRzCefOGxE oj7W2LRt+pIoA== From: Drew Fustini Date: Sat, 13 Sep 2025 14:31:06 -0700 Subject: [PATCH 7/7] riscv: Kconfig.socs: Add ARCH_TENSTORRENT for Tenstorrent SoCs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250913-tt-bh-dts-v1-7-ddb0d6860fe5@tenstorrent.com> References: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> In-Reply-To: <20250913-tt-bh-dts-v1-0-ddb0d6860fe5@tenstorrent.com> To: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Samuel Holland , Daniel Lezcano , Thomas Gleixner , Anup Patel , Arnd Bergmann , Joel Stanley , Joel Stanley , Michael Neuling , Nicholas Piggin , Michael Ellerman , Andy Gross Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Drew Fustini X-Mailer: b4 0.14.2 From: Drew Fustini Add Kconfig option ARCH_TENSTORRENT to enable support for SoCs like the Blackhole A0. Signed-off-by: Drew Fustini --- arch/riscv/Kconfig.socs | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 61ceae0aa27a6fa3a91da6a46becfd96da99fd09..ff733a998612d429e7b1e00276e= b86290d8331a3 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -57,6 +57,14 @@ config ARCH_SUNXI This enables support for Allwinner sun20i platform hardware, including boards based on the D1 and D1s SoCs. =20 +config ARCH_TENSTORRENT + bool "Tenstorrent SoCs" + help + This enables support for Tenstorrent SoC platforms. + Current support is for Blackhole P100 and P150 PCIe cards. + The Blackhole A0 SoC contains four RISC-V CPU tiles each + consisting of 4x SiFive X280 cores. + config ARCH_THEAD bool "T-HEAD RISC-V SoCs" depends on MMU && !XIP_KERNEL --=20 2.34.1