From nobody Thu Oct 2 19:28:01 2025 Received: from mail-pf1-f202.google.com (mail-pf1-f202.google.com [209.85.210.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8C3428CF4A for ; Fri, 12 Sep 2025 23:23:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757719417; cv=none; b=D5ds7YNgn3rZbEGn3pvL+P1KE/7rSrLLLwSw16XoesEPkDbR4fv63jrYsWKVuGEeU44Xrf6NnNdWRLNpjZaLJrfvDVDHMP5jXtpvUUE91FZy5YNFflC10/78ZM9jpcxP8WaYkpPwT6u3ZwuoFm0xURIS8XkEM97IxbgX01d2p+w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757719417; c=relaxed/simple; bh=Ts2O3iIiauNKice8KQ4rNc4sfJ/k4xkmItHEORp/rEs=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=qV8yUMkXWWMC3c4XBQF+FRDGb0+ZgfJDDpdz1UWAxSmDCA5RL4Fb7J9LjLegqb2eSk7H4cQUaddRJUQbYwYKruTIp3F3A6TEEcJqHFChbK4RsRH+smqFiLU4Q6s7VoplwBvrKkSTUD/gctdCtTxRDGzDEt7zMBnPliYj91zo57M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=FH5Z/FNO; arc=none smtp.client-ip=209.85.210.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="FH5Z/FNO" Received: by mail-pf1-f202.google.com with SMTP id d2e1a72fcca58-77615e6ee47so1168353b3a.3 for ; Fri, 12 Sep 2025 16:23:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1757719415; x=1758324215; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=VPSKTOmJ0MbU5RRp5+PoAEPU2M2YZuhj8feB+e76lMo=; b=FH5Z/FNO94uHd5lIT301PJfE8seFRa/gVn1Us2E7YaxKGEvheNAHCr+s4LzAFbs7iF To6sdgO572XCDzTgpFiewtl1RGt/UC7Tcm77nt/wG5FELm8juPW503PK8wPS2CPgd7P5 uM9CxqO3jlD5SQfPUGrGaeC0v3NVUOsWNLUiaw61iOMbqP9d6aK3Fg5NQfM65UKy7GMD LgQhg6kjJdKEOvI46okSZc7zybTy/vMS8ewSH3ZccYpkZcGa+g+NMIv+A4WT09yPSyLW UzDmlcx9Rj775DOzuYvqxd4F0qqmBeUqaJ+F1z6h25pwusvhWExWDNqSuBESSY/b+6mk fNnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757719415; x=1758324215; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=VPSKTOmJ0MbU5RRp5+PoAEPU2M2YZuhj8feB+e76lMo=; b=lXCegdOmn32yR4/Nlm3TziaZBqSmZO6hdfgaO4C2nvw5p50H4B0LDe9HO8HwVbRU05 M+RooSav7fJzjWRfo7ZHN3FtdmARC/hmPDFWr/7eZY/pk7JTf8ni1GS/GNHOA49Rei4u OOJXtBCM4sZLzl8g+LL5hjSBs4UR3ISGLYipd66f+VdGxtlC8t/bGdI7adRsdwKBkGmk CRZ5BpgLMzhE/WVXXwmIW+J7q/Xk+2qRumCCVSz3ou3o+VNpBxalooSRfCI81hZIZRpf XND/fU5UB4T1+upbatAFveVxa0BxGQ2czD6G2M3EXik9odJWI5fJTp9X05U+kJwRl0Qt ag+g== X-Forwarded-Encrypted: i=1; AJvYcCUQbI/yYvPzOztUn8FMBsfLj8VZNB1mF1kA+CexNekCmu5rhHt2ITARnyQB0bsuN0nabmEKHpnKa7E50RI=@vger.kernel.org X-Gm-Message-State: AOJu0YzN4T8d7Vlu/GWT9SVqNmtl0VOhvo4CXfSK+jj5qDEFYOJw1hMB lkm3toExhgN3RLWqkr+glShA7Vxkb/2/5TmbhRXYSxCmDkHReFcDPiR6cijxWCHGTEzhRTW0a1J 2ZJL5nA== X-Google-Smtp-Source: AGHT+IHx0w8+O1I8ii10DeBVFbxahEaUgIPv8NQFb0AWUVXy/yMPk+G17BdAeITayGtjMl9yPUybw4g3gVA= X-Received: from pfoo15.prod.google.com ([2002:a05:6a00:1a0f:b0:775:fbac:d698]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:1ad4:b0:772:871c:1e49 with SMTP id d2e1a72fcca58-7761219836dmr5226705b3a.29.1757719415203; Fri, 12 Sep 2025 16:23:35 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 12 Sep 2025 16:22:44 -0700 In-Reply-To: <20250912232319.429659-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250912232319.429659-1-seanjc@google.com> X-Mailer: git-send-email 2.51.0.384.g4c02a37b29-goog Message-ID: <20250912232319.429659-7-seanjc@google.com> Subject: [PATCH v15 06/41] KVM: x86: Check XSS validity against guest CPUIDs From: Sean Christopherson To: Paolo Bonzini , Sean Christopherson Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Lendacky , Mathias Krause , John Allen , Rick Edgecombe , Chao Gao , Maxim Levitsky , Xiaoyao Li , Zhang Yi Z Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chao Gao Maintain per-guest valid XSS bits and check XSS validity against them rather than against KVM capabilities. This is to prevent bits that are supported by KVM but not supported for a guest from being set. Opportunistically return KVM_MSR_RET_UNSUPPORTED on IA32_XSS MSR accesses if guest CPUID doesn't enumerate X86_FEATURE_XSAVES. Since KVM_MSR_RET_UNSUPPORTED takes care of host_initiated cases, drop the host_initiated check. Signed-off-by: Chao Gao Reviewed-by: Xiaoyao Li Signed-off-by: Sean Christopherson Reviewed-by: Binbin Wu --- arch/x86/include/asm/kvm_host.h | 3 ++- arch/x86/kvm/cpuid.c | 12 ++++++++++++ arch/x86/kvm/x86.c | 7 +++---- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 2762554cbb7b..d931d72d23c9 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -815,7 +815,6 @@ struct kvm_vcpu_arch { bool at_instruction_boundary; bool tpr_access_reporting; bool xfd_no_write_intercept; - u64 ia32_xss; u64 microcode_version; u64 arch_capabilities; u64 perf_capabilities; @@ -876,6 +875,8 @@ struct kvm_vcpu_arch { =20 u64 xcr0; u64 guest_supported_xcr0; + u64 ia32_xss; + u64 guest_supported_xss; =20 struct kvm_pio_request pio; void *pio_data; diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index ad6cadf09930..46cf616663e6 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -263,6 +263,17 @@ static u64 cpuid_get_supported_xcr0(struct kvm_vcpu *v= cpu) return (best->eax | ((u64)best->edx << 32)) & kvm_caps.supported_xcr0; } =20 +static u64 cpuid_get_supported_xss(struct kvm_vcpu *vcpu) +{ + struct kvm_cpuid_entry2 *best; + + best =3D kvm_find_cpuid_entry_index(vcpu, 0xd, 1); + if (!best) + return 0; + + return (best->ecx | ((u64)best->edx << 32)) & kvm_caps.supported_xss; +} + static __always_inline void kvm_update_feature_runtime(struct kvm_vcpu *vc= pu, struct kvm_cpuid_entry2 *entry, unsigned int x86_feature, @@ -424,6 +435,7 @@ void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) } =20 vcpu->arch.guest_supported_xcr0 =3D cpuid_get_supported_xcr0(vcpu); + vcpu->arch.guest_supported_xss =3D cpuid_get_supported_xss(vcpu); =20 vcpu->arch.pv_cpuid.features =3D kvm_apply_cpuid_pv_features_quirk(vcpu); =20 diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 3b4258b38ad8..5a5af40c06a9 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3984,15 +3984,14 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struc= t msr_data *msr_info) } break; case MSR_IA32_XSS: - if (!msr_info->host_initiated && - !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)) - return 1; + if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)) + return KVM_MSR_RET_UNSUPPORTED; /* * KVM supports exposing PT to the guest, but does not support * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than * XSAVES/XRSTORS to save/restore PT MSRs. */ - if (data & ~kvm_caps.supported_xss) + if (data & ~vcpu->arch.guest_supported_xss) return 1; vcpu->arch.ia32_xss =3D data; vcpu->arch.cpuid_dynamic_bits_dirty =3D true; --=20 2.51.0.384.g4c02a37b29-goog