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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by SN1PEPF0002636A.mail.protection.outlook.com (10.167.241.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9115.13 via Frontend Transport; Fri, 12 Sep 2025 14:45:40 +0000 Received: from rric.localdomain (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Fri, 12 Sep 2025 07:45:36 -0700 From: Robert Richter To: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Dave Jiang , Davidlohr Bueso CC: , , Gregory Price , "Fabio M. De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 01/11] cxl/region: Store root decoder in struct cxl_region Date: Fri, 12 Sep 2025 16:45:03 +0200 Message-ID: <20250912144514.526441-2-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636A:EE_|SA0PR12MB7073:EE_ X-MS-Office365-Filtering-Correlation-Id: 1f7b861e-8fa5-40f6-3272-08ddf20b0b17 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|7416014|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?FXxBitnL/gVw9URLqaQ0O3A4jblzF4GAo1pI3Vue6EdDUc2xm6LlJt7TbLca?= =?us-ascii?Q?jM3jTvKY45INYV8UFQsqB2tLgY36ectsFV50Q9y+O+sy3Gv38gtGZ/7nVMrq?= =?us-ascii?Q?lwfwDjKdNs/OMbaeWNj9NHTOlVueNqhpg1y2hlRj+W+USJfp6mqYeZaHG77T?= =?us-ascii?Q?8y3U8cazTMySL64qyUbyZp6pIU8So6+L1O2/sWHrpi4309a4CvH/MoupWq8w?= =?us-ascii?Q?vttWzo0LNjL6e4tzbIA+NrvpXrX+qZzq5qHRxChdhNNA4qWtDpuXuctOXcro?= =?us-ascii?Q?tDLiFlwS4G/YgvuIN6fQoB2bapeVoIU61BX5PmV2TwjniLV9zeKdo/vxXtf3?= =?us-ascii?Q?QPJGbV0aQyVOcBf12MRaC0Vf4uxJjlHo/e2H2Zm/plBzMQyKQHe2yQRDtwyW?= =?us-ascii?Q?QKLNdhd6IVSUa1SuH4GsuYPSF5KX5KlT29gpCh7CABhPiJCzfozszCFotUua?= =?us-ascii?Q?XCWAAaF056ewNih2BE2MBjFXriSt4z2rixoB2lrUllW54TGynSOuPMdtTsOb?= =?us-ascii?Q?QkLH2t+8BeuYvy3irZPmhKS75sS0PEgG4eUIGEmtgEtuAlkXvntqCO1A3ZiE?= =?us-ascii?Q?r8dYE6lUvIqqp6sN/wy5W/gO8scMCz48TBKnlHbxphlj1/bFYTdUU25VFU4Z?= =?us-ascii?Q?nkvLl7rTQ38XpIGpOX+XnxFPraNRk2sRjJEK66rDhwzzH9olDnWF1+V6+9gj?= =?us-ascii?Q?oBK/NXyEYoDqBudRMhu+btSljK2CCSGi0YacLtWEfrunkfh9UBG60fD0xLhh?= =?us-ascii?Q?NMOff/9F0rxuOojKJEO4IByPb4hdoYoXdVDKHFhV5v9JVdac6rLaWx8f/5Ek?= =?us-ascii?Q?aSHt3bn18yyn13ioMniHFfh0k6NVmikSoljnQT2DeXqUeIUSfGfLYhrcOfoX?= =?us-ascii?Q?B8ir9ntJwslMX+M1Zzwrh54fZ3UvGOQCitpikPBbnDbYJlqz4WUdDC67w1KJ?= =?us-ascii?Q?GBMKZmK7Mbg9CsRuTAJ88k3JH1V8EqMCfBWYEvKR2aaNuLzQazrCbuMNZ4X6?= =?us-ascii?Q?Sz6tO/dhkjw72TJtQPblrPYr9Mg5qeqqcc2Jg5k09ysgwNKASjwuutgCN6JF?= =?us-ascii?Q?h4HB7I/6GOUiNQZPFAC6nWmoTVBKHx5n76c4DgqxjLeEh4dlLMC7WoK27eil?= =?us-ascii?Q?UiAnUgPrnZfNw80pROMlzyDVZfCy3WKpHthKaLymTCRVfmKIgOGtLsFz2JDe?= =?us-ascii?Q?7tn00i+X+pR/6M8KBM9CoOSBWc5OKNUv4eIHlXIJaB9jkkoyjJuDUXO5x+3/?= =?us-ascii?Q?h3S/OPBq4M9gjHTJAONn135uc+SYrqGxNz0Ptea8kHo6otUxIPv+ShCSQFyQ?= =?us-ascii?Q?Om/Dm8L3KLbm6wY8rcweGKlOwvhUjou6RcdZ7cRhZM16B2OjEpBF+3Bsu6bL?= =?us-ascii?Q?iMJuBfG3OKMPQMgdfVld7QRyI2KogZJKAlbaPbJxnu8Re/1HG2a4nDzZ3Ujd?= =?us-ascii?Q?rifUJ2SMSEj/FUyRu3Wc51g6bM+8jCsfgNdHU7ClhBYm5xq7ufxJxwUGJDyX?= =?us-ascii?Q?SyqkGrDkddeUQd0e3BZG2PgcsHdjk52QOBw9?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(7416014)(376014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:45:40.0475 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1f7b861e-8fa5-40f6-3272-08ddf20b0b17 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB7073 Content-Type: text/plain; charset="utf-8" A region is always bound to a root decoder. The region's associated root decoder is often needed. Add it to struct cxl_region. This simplifies code by removing dynamic lookups and removing the root decoder argument from the function argument list where possible. Patch is a prerequisite to implement address translation which uses struct cxl_region to store all relevant region and interleaving parameters. Signed-off-by: Robert Richter Reviewed-by: Dave Jiang Reviewed-by: Gregory Price Reviewed-by: Jonathan Cameron --- drivers/cxl/core/region.c | 37 +++++++++++++++++++------------------ drivers/cxl/cxl.h | 2 ++ 2 files changed, 21 insertions(+), 18 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 29d3809ab2bb..2c37c060d983 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -489,9 +489,9 @@ static ssize_t interleave_ways_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); - struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; + struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region_params *p =3D &cxlr->params; unsigned int val, save; int rc; @@ -552,9 +552,9 @@ static ssize_t interleave_granularity_store(struct devi= ce *dev, struct device_attribute *attr, const char *buf, size_t len) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); - struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; + struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region_params *p =3D &cxlr->params; int rc, val; u16 ig; @@ -628,7 +628,7 @@ static DEVICE_ATTR_RO(mode); =20 static int alloc_hpa(struct cxl_region *cxlr, resource_size_t size) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_region_params *p =3D &cxlr->params; struct resource *res; u64 remainder =3D 0; @@ -1321,7 +1321,7 @@ static int cxl_port_setup_targets(struct cxl_port *po= rt, struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; int parent_iw, parent_ig, ig, iw, rc, inc =3D 0, pos =3D cxled->pos; struct cxl_port *parent_port =3D to_cxl_port(port->dev.parent); struct cxl_region_ref *cxl_rr =3D cxl_rr_load(port, cxlr); @@ -1678,10 +1678,10 @@ static int cxl_region_validate_position(struct cxl_= region *cxlr, } =20 static int cxl_region_attach_position(struct cxl_region *cxlr, - struct cxl_root_decoder *cxlrd, struct cxl_endpoint_decoder *cxled, const struct cxl_dport *dport, int pos) { + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_switch_decoder *cxlsd =3D &cxlrd->cxlsd; struct cxl_decoder *cxld =3D &cxlsd->cxld; @@ -1918,7 +1918,7 @@ static int cxl_region_sort_targets(struct cxl_region = *cxlr) static int cxl_region_attach(struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled, int pos) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_dev_state *cxlds =3D cxlmd->cxlds; struct cxl_region_params *p =3D &cxlr->params; @@ -2023,8 +2023,7 @@ static int cxl_region_attach(struct cxl_region *cxlr, ep_port =3D cxled_to_port(cxled); dport =3D cxl_find_dport_by_dev(root_port, ep_port->host_bridge); - rc =3D cxl_region_attach_position(cxlr, cxlrd, cxled, - dport, i); + rc =3D cxl_region_attach_position(cxlr, cxled, dport, i); if (rc) return rc; } @@ -2047,7 +2046,7 @@ static int cxl_region_attach(struct cxl_region *cxlr, if (rc) return rc; =20 - rc =3D cxl_region_attach_position(cxlr, cxlrd, cxled, dport, pos); + rc =3D cxl_region_attach_position(cxlr, cxled, dport, pos); if (rc) return rc; =20 @@ -2343,8 +2342,8 @@ static const struct attribute_group *region_groups[] = =3D { =20 static void cxl_region_release(struct device *dev) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; int id =3D atomic_read(&cxlrd->region_id); =20 /* @@ -2427,10 +2426,12 @@ static struct cxl_region *cxl_region_alloc(struct c= xl_root_decoder *cxlrd, int i * region id allocations */ get_device(dev->parent); + cxlr->cxlrd =3D cxlrd; + cxlr->id =3D id; + device_set_pm_not_required(dev); dev->bus =3D &cxl_bus_type; dev->type =3D &cxl_region_type; - cxlr->id =3D id; =20 return cxlr; } @@ -2931,7 +2932,7 @@ static bool has_spa_to_hpa(struct cxl_root_decoder *c= xlrd) u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd, u64 dpa) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; u64 dpa_offset, hpa_offset, bits_upper, mask_upper, hpa; struct cxl_region_params *p =3D &cxlr->params; struct cxl_endpoint_decoder *cxled =3D NULL; @@ -3007,7 +3008,7 @@ static int region_offset_to_dpa_result(struct cxl_reg= ion *cxlr, u64 offset, struct dpa_result *result) { struct cxl_region_params *p =3D &cxlr->params; - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_endpoint_decoder *cxled; u64 hpa, hpa_offset, dpa_offset; u64 bits_upper, bits_lower; @@ -3401,7 +3402,7 @@ static int match_region_by_range(struct device *dev, = const void *data) static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, struct resource *res) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_region_params *p =3D &cxlr->params; resource_size_t size =3D resource_size(res); resource_size_t cache_size, start; @@ -3437,9 +3438,9 @@ static int cxl_extended_linear_cache_resize(struct cx= l_region *cxlr, } =20 static int __construct_region(struct cxl_region *cxlr, - struct cxl_root_decoder *cxlrd, struct cxl_endpoint_decoder *cxled) { + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct range *hpa =3D &cxled->cxld.hpa_range; struct cxl_region_params *p; @@ -3531,7 +3532,7 @@ static struct cxl_region *construct_region(struct cxl= _root_decoder *cxlrd, return cxlr; } =20 - rc =3D __construct_region(cxlr, cxlrd, cxled); + rc =3D __construct_region(cxlr, cxled); if (rc) { devm_release_action(port->uport_dev, unregister_region, cxlr); return ERR_PTR(rc); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 4fe3df06f57a..350ccd6949b3 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -517,6 +517,7 @@ enum cxl_partition_mode { * struct cxl_region - CXL region * @dev: This region's device * @id: This region's id. Id is globally unique across all regions + * @cxlrd: Region's root decoder * @mode: Operational mode of the mapped capacity * @type: Endpoint decoder target type * @cxl_nvb: nvdimm bridge for coordinating @cxlr_pmem setup / shutdown @@ -530,6 +531,7 @@ enum cxl_partition_mode { struct cxl_region { struct device dev; int id; + struct cxl_root_decoder *cxlrd; enum cxl_partition_mode mode; enum cxl_decoder_type type; struct cxl_nvdimm_bridge *cxl_nvb; --=20 2.39.5