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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 01/11] cxl/region: Store root decoder in struct cxl_region Date: Fri, 12 Sep 2025 16:45:03 +0200 Message-ID: <20250912144514.526441-2-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636A:EE_|SA0PR12MB7073:EE_ X-MS-Office365-Filtering-Correlation-Id: 1f7b861e-8fa5-40f6-3272-08ddf20b0b17 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|7416014|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?FXxBitnL/gVw9URLqaQ0O3A4jblzF4GAo1pI3Vue6EdDUc2xm6LlJt7TbLca?= =?us-ascii?Q?jM3jTvKY45INYV8UFQsqB2tLgY36ectsFV50Q9y+O+sy3Gv38gtGZ/7nVMrq?= =?us-ascii?Q?lwfwDjKdNs/OMbaeWNj9NHTOlVueNqhpg1y2hlRj+W+USJfp6mqYeZaHG77T?= =?us-ascii?Q?8y3U8cazTMySL64qyUbyZp6pIU8So6+L1O2/sWHrpi4309a4CvH/MoupWq8w?= =?us-ascii?Q?vttWzo0LNjL6e4tzbIA+NrvpXrX+qZzq5qHRxChdhNNA4qWtDpuXuctOXcro?= =?us-ascii?Q?tDLiFlwS4G/YgvuIN6fQoB2bapeVoIU61BX5PmV2TwjniLV9zeKdo/vxXtf3?= =?us-ascii?Q?QPJGbV0aQyVOcBf12MRaC0Vf4uxJjlHo/e2H2Zm/plBzMQyKQHe2yQRDtwyW?= =?us-ascii?Q?QKLNdhd6IVSUa1SuH4GsuYPSF5KX5KlT29gpCh7CABhPiJCzfozszCFotUua?= =?us-ascii?Q?XCWAAaF056ewNih2BE2MBjFXriSt4z2rixoB2lrUllW54TGynSOuPMdtTsOb?= =?us-ascii?Q?QkLH2t+8BeuYvy3irZPmhKS75sS0PEgG4eUIGEmtgEtuAlkXvntqCO1A3ZiE?= =?us-ascii?Q?r8dYE6lUvIqqp6sN/wy5W/gO8scMCz48TBKnlHbxphlj1/bFYTdUU25VFU4Z?= =?us-ascii?Q?nkvLl7rTQ38XpIGpOX+XnxFPraNRk2sRjJEK66rDhwzzH9olDnWF1+V6+9gj?= =?us-ascii?Q?oBK/NXyEYoDqBudRMhu+btSljK2CCSGi0YacLtWEfrunkfh9UBG60fD0xLhh?= =?us-ascii?Q?NMOff/9F0rxuOojKJEO4IByPb4hdoYoXdVDKHFhV5v9JVdac6rLaWx8f/5Ek?= =?us-ascii?Q?aSHt3bn18yyn13ioMniHFfh0k6NVmikSoljnQT2DeXqUeIUSfGfLYhrcOfoX?= =?us-ascii?Q?B8ir9ntJwslMX+M1Zzwrh54fZ3UvGOQCitpikPBbnDbYJlqz4WUdDC67w1KJ?= =?us-ascii?Q?GBMKZmK7Mbg9CsRuTAJ88k3JH1V8EqMCfBWYEvKR2aaNuLzQazrCbuMNZ4X6?= =?us-ascii?Q?Sz6tO/dhkjw72TJtQPblrPYr9Mg5qeqqcc2Jg5k09ysgwNKASjwuutgCN6JF?= =?us-ascii?Q?h4HB7I/6GOUiNQZPFAC6nWmoTVBKHx5n76c4DgqxjLeEh4dlLMC7WoK27eil?= =?us-ascii?Q?UiAnUgPrnZfNw80pROMlzyDVZfCy3WKpHthKaLymTCRVfmKIgOGtLsFz2JDe?= =?us-ascii?Q?7tn00i+X+pR/6M8KBM9CoOSBWc5OKNUv4eIHlXIJaB9jkkoyjJuDUXO5x+3/?= =?us-ascii?Q?h3S/OPBq4M9gjHTJAONn135uc+SYrqGxNz0Ptea8kHo6otUxIPv+ShCSQFyQ?= =?us-ascii?Q?Om/Dm8L3KLbm6wY8rcweGKlOwvhUjou6RcdZ7cRhZM16B2OjEpBF+3Bsu6bL?= =?us-ascii?Q?iMJuBfG3OKMPQMgdfVld7QRyI2KogZJKAlbaPbJxnu8Re/1HG2a4nDzZ3Ujd?= =?us-ascii?Q?rifUJ2SMSEj/FUyRu3Wc51g6bM+8jCsfgNdHU7ClhBYm5xq7ufxJxwUGJDyX?= =?us-ascii?Q?SyqkGrDkddeUQd0e3BZG2PgcsHdjk52QOBw9?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(7416014)(376014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:45:40.0475 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1f7b861e-8fa5-40f6-3272-08ddf20b0b17 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB7073 Content-Type: text/plain; charset="utf-8" A region is always bound to a root decoder. The region's associated root decoder is often needed. Add it to struct cxl_region. This simplifies code by removing dynamic lookups and removing the root decoder argument from the function argument list where possible. Patch is a prerequisite to implement address translation which uses struct cxl_region to store all relevant region and interleaving parameters. Signed-off-by: Robert Richter Reviewed-by: Dave Jiang Reviewed-by: Gregory Price Reviewed-by: Jonathan Cameron Tested-by: Gregory Price --- drivers/cxl/core/region.c | 37 +++++++++++++++++++------------------ drivers/cxl/cxl.h | 2 ++ 2 files changed, 21 insertions(+), 18 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 29d3809ab2bb..2c37c060d983 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -489,9 +489,9 @@ static ssize_t interleave_ways_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); - struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; + struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region_params *p =3D &cxlr->params; unsigned int val, save; int rc; @@ -552,9 +552,9 @@ static ssize_t interleave_granularity_store(struct devi= ce *dev, struct device_attribute *attr, const char *buf, size_t len) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); - struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; + struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region_params *p =3D &cxlr->params; int rc, val; u16 ig; @@ -628,7 +628,7 @@ static DEVICE_ATTR_RO(mode); =20 static int alloc_hpa(struct cxl_region *cxlr, resource_size_t size) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_region_params *p =3D &cxlr->params; struct resource *res; u64 remainder =3D 0; @@ -1321,7 +1321,7 @@ static int cxl_port_setup_targets(struct cxl_port *po= rt, struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; int parent_iw, parent_ig, ig, iw, rc, inc =3D 0, pos =3D cxled->pos; struct cxl_port *parent_port =3D to_cxl_port(port->dev.parent); struct cxl_region_ref *cxl_rr =3D cxl_rr_load(port, cxlr); @@ -1678,10 +1678,10 @@ static int cxl_region_validate_position(struct cxl_= region *cxlr, } =20 static int cxl_region_attach_position(struct cxl_region *cxlr, - struct cxl_root_decoder *cxlrd, struct cxl_endpoint_decoder *cxled, const struct cxl_dport *dport, int pos) { + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_switch_decoder *cxlsd =3D &cxlrd->cxlsd; struct cxl_decoder *cxld =3D &cxlsd->cxld; @@ -1918,7 +1918,7 @@ static int cxl_region_sort_targets(struct cxl_region = *cxlr) static int cxl_region_attach(struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled, int pos) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_dev_state *cxlds =3D cxlmd->cxlds; struct cxl_region_params *p =3D &cxlr->params; @@ -2023,8 +2023,7 @@ static int cxl_region_attach(struct cxl_region *cxlr, ep_port =3D cxled_to_port(cxled); dport =3D cxl_find_dport_by_dev(root_port, ep_port->host_bridge); - rc =3D cxl_region_attach_position(cxlr, cxlrd, cxled, - dport, i); + rc =3D cxl_region_attach_position(cxlr, cxled, dport, i); if (rc) return rc; } @@ -2047,7 +2046,7 @@ static int cxl_region_attach(struct cxl_region *cxlr, if (rc) return rc; =20 - rc =3D cxl_region_attach_position(cxlr, cxlrd, cxled, dport, pos); + rc =3D cxl_region_attach_position(cxlr, cxled, dport, pos); if (rc) return rc; =20 @@ -2343,8 +2342,8 @@ static const struct attribute_group *region_groups[] = =3D { =20 static void cxl_region_release(struct device *dev) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; int id =3D atomic_read(&cxlrd->region_id); =20 /* @@ -2427,10 +2426,12 @@ static struct cxl_region *cxl_region_alloc(struct c= xl_root_decoder *cxlrd, int i * region id allocations */ get_device(dev->parent); + cxlr->cxlrd =3D cxlrd; + cxlr->id =3D id; + device_set_pm_not_required(dev); dev->bus =3D &cxl_bus_type; dev->type =3D &cxl_region_type; - cxlr->id =3D id; =20 return cxlr; } @@ -2931,7 +2932,7 @@ static bool has_spa_to_hpa(struct cxl_root_decoder *c= xlrd) u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd, u64 dpa) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; u64 dpa_offset, hpa_offset, bits_upper, mask_upper, hpa; struct cxl_region_params *p =3D &cxlr->params; struct cxl_endpoint_decoder *cxled =3D NULL; @@ -3007,7 +3008,7 @@ static int region_offset_to_dpa_result(struct cxl_reg= ion *cxlr, u64 offset, struct dpa_result *result) { struct cxl_region_params *p =3D &cxlr->params; - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_endpoint_decoder *cxled; u64 hpa, hpa_offset, dpa_offset; u64 bits_upper, bits_lower; @@ -3401,7 +3402,7 @@ static int match_region_by_range(struct device *dev, = const void *data) static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, struct resource *res) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_region_params *p =3D &cxlr->params; resource_size_t size =3D resource_size(res); resource_size_t cache_size, start; @@ -3437,9 +3438,9 @@ static int cxl_extended_linear_cache_resize(struct cx= l_region *cxlr, } =20 static int __construct_region(struct cxl_region *cxlr, - struct cxl_root_decoder *cxlrd, struct cxl_endpoint_decoder *cxled) { + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct range *hpa =3D &cxled->cxld.hpa_range; struct cxl_region_params *p; @@ -3531,7 +3532,7 @@ static struct cxl_region *construct_region(struct cxl= _root_decoder *cxlrd, return cxlr; } =20 - rc =3D __construct_region(cxlr, cxlrd, cxled); + rc =3D __construct_region(cxlr, cxled); if (rc) { devm_release_action(port->uport_dev, unregister_region, cxlr); return ERR_PTR(rc); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 4fe3df06f57a..350ccd6949b3 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -517,6 +517,7 @@ enum cxl_partition_mode { * struct cxl_region - CXL region * @dev: This region's device * @id: This region's id. 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Endpoint decoders assigned to a region share the same HPA range. The region's address range is the system's physical address (SPA) range. Endpoint decoders in systems that need address translation use HPAs which are not SPAs. To make the SPA range accessible to the endpoint decoders, store and track the region's SPA range in struct cxl_region. Introduce the @hpa_range member to the struct. Now, the SPA range of an endpoint decoder can be determined based on its assigned region. Patch is a prerequisite to implement address translation which uses struct cxl_region to store all relevant region and interleaving parameters. Signed-off-by: Robert Richter Reviewed-by: Dave Jiang Reviewed-by: Gregory Price Reviewed-by: Jonathan Cameron Tested-by: Gregory Price --- drivers/cxl/core/region.c | 17 +++++++++++++++++ drivers/cxl/cxl.h | 2 ++ 2 files changed, 19 insertions(+) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 2c37c060d983..777d04870180 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -664,6 +664,11 @@ static int alloc_hpa(struct cxl_region *cxlr, resource= _size_t size) return PTR_ERR(res); } =20 + cxlr->hpa_range =3D (struct range) { + .start =3D res->start, + .end =3D res->end, + }; + p->res =3D res; p->state =3D CXL_CONFIG_INTERLEAVE_ACTIVE; =20 @@ -700,8 +705,14 @@ static int free_hpa(struct cxl_region *cxlr) if (p->state >=3D CXL_CONFIG_ACTIVE) return -EBUSY; =20 + cxlr->hpa_range =3D (struct range) { + .start =3D 0, + .end =3D -1, + }; + cxl_region_iomem_release(cxlr); p->state =3D CXL_CONFIG_IDLE; + return 0; } =20 @@ -2400,6 +2411,11 @@ static void unregister_region(void *_cxlr) for (i =3D 0; i < p->interleave_ways; i++) detach_target(cxlr, i); =20 + cxlr->hpa_range =3D (struct range) { + .start =3D 0, + .end =3D -1, + }; + cxl_region_iomem_release(cxlr); put_device(&cxlr->dev); } @@ -3458,6 +3474,7 @@ static int __construct_region(struct cxl_region *cxlr, } =20 set_bit(CXL_REGION_F_AUTO, &cxlr->flags); + cxlr->hpa_range =3D *hpa; =20 res =3D kmalloc(sizeof(*res), GFP_KERNEL); if (!res) diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 350ccd6949b3..f182982f1c14 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -518,6 +518,7 @@ enum cxl_partition_mode { * @dev: This region's device * @id: This region's id. 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Signed-off-by: Robert Richter Reviewed-by: Gregory Price Tested-by: Gregory Price --- drivers/cxl/core/region.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 777d04870180..13113920aba7 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3367,9 +3367,9 @@ static int match_decoder_by_range(struct device *dev,= const void *data) } =20 static struct cxl_decoder * -cxl_port_find_switch_decoder(struct cxl_port *port, struct range *hpa) +cxl_port_find_switch_decoder(struct cxl_port *port, struct range *range) { - struct device *cxld_dev =3D device_find_child(&port->dev, hpa, + struct device *cxld_dev =3D device_find_child(&port->dev, range, match_decoder_by_range); =20 return cxld_dev ? to_cxl_decoder(cxld_dev) : NULL; @@ -3382,14 +3382,14 @@ cxl_find_root_decoder(struct cxl_endpoint_decoder *= cxled) struct cxl_port *port =3D cxled_to_port(cxled); struct cxl_root *cxl_root __free(put_cxl_root) =3D find_cxl_root(port); struct cxl_decoder *root, *cxld =3D &cxled->cxld; - struct range *hpa =3D &cxld->hpa_range; + struct range *range =3D &cxld->hpa_range; =20 - root =3D cxl_port_find_switch_decoder(&cxl_root->port, hpa); + root =3D cxl_port_find_switch_decoder(&cxl_root->port, range); if (!root) { dev_err(cxlmd->dev.parent, "%s:%s no CXL window for range %#llx:%#llx\n", dev_name(&cxlmd->dev), dev_name(&cxld->dev), - cxld->hpa_range.start, cxld->hpa_range.end); + range->start, range->end); return NULL; } =20 @@ -3458,7 +3458,7 @@ static int __construct_region(struct cxl_region *cxlr, { struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); - struct range *hpa =3D &cxled->cxld.hpa_range; + struct range *range =3D &cxled->cxld.hpa_range; struct cxl_region_params *p; struct resource *res; int rc; @@ -3474,13 +3474,13 @@ static int __construct_region(struct cxl_region *cx= lr, } =20 set_bit(CXL_REGION_F_AUTO, &cxlr->flags); - cxlr->hpa_range =3D *hpa; + cxlr->hpa_range =3D *range; =20 res =3D kmalloc(sizeof(*res), GFP_KERNEL); if (!res) return -ENOMEM; =20 - *res =3D DEFINE_RES_MEM_NAMED(hpa->start, range_len(hpa), + *res =3D DEFINE_RES_MEM_NAMED(range->start, range_len(range), dev_name(&cxlr->dev)); =20 rc =3D cxl_extended_linear_cache_resize(cxlr, res); @@ -3559,11 +3559,11 @@ static struct cxl_region *construct_region(struct c= xl_root_decoder *cxlrd, } =20 static struct cxl_region * -cxl_find_region_by_range(struct cxl_root_decoder *cxlrd, struct range *hpa) +cxl_find_region_by_range(struct cxl_root_decoder *cxlrd, struct range *ran= ge) { struct device *region_dev; =20 - region_dev =3D device_find_child(&cxlrd->cxlsd.cxld.dev, hpa, + region_dev =3D device_find_child(&cxlrd->cxlsd.cxld.dev, range, match_region_by_range); if (!region_dev) return NULL; @@ -3573,7 +3573,7 @@ cxl_find_region_by_range(struct cxl_root_decoder *cxl= rd, struct range *hpa) =20 int cxl_add_to_region(struct cxl_endpoint_decoder *cxled) { - struct range *hpa =3D &cxled->cxld.hpa_range; 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 04/11] cxl/region: Add @range argument to function cxl_find_root_decoder() Date: Fri, 12 Sep 2025 16:45:06 +0200 Message-ID: <20250912144514.526441-5-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636B:EE_|DM4PR12MB8450:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e732600-0222-41b2-cfe8-08ddf20b1125 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|1800799024|376014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?elZJ81x+Nvar/HcSmZBAso5+Nbvw18vxCTsMHM+vSsqwB2fVqagG7Lc+VrJz?= =?us-ascii?Q?C3p+Gala0xqKYPBNdbfqsAr3Id0S1x5oQHuuq904ca6nIlQHOAopW0mIJM5N?= =?us-ascii?Q?zS2rA88HqG/GzSqPapZcwZdagXK/Ak+GGj+0T297/qJHWIN13UUzStPHGXxU?= =?us-ascii?Q?Avde2tQ8DR1i5TBZYjmW9bTbAUPS1iiRoIUs+4H8FyDg8aO7/VMawSdh7M92?= =?us-ascii?Q?UpqWpj5X4F+ra8u+vevsLXWxZHETFv0uYIpdIafVuv2eHnRA0XNszNc68Jwv?= =?us-ascii?Q?WObN6sMWJmK8jUkBX5cB65U1laSufbKrubv2YNVlWK5Zb4x7e4Ljpu00KCic?= =?us-ascii?Q?ydzwrKcNqFHSZFCTngZCWC/Rxc05YmVfx8s407SULvHBXk9qkAgSlW1F4Z4c?= =?us-ascii?Q?LHEvfMfbnDqTqk4YOQjanC1T8NvVeyxE1nNdhDRU5vxPfs3gPRWozrirtNx7?= =?us-ascii?Q?lnMtn0J3WnMJQf8qihXYEO+k9iphndpqvV/yu0jq0kL64r+kMIOPb+r7GLre?= =?us-ascii?Q?ASXgGGL007Dg5wkid68M6Fw93qs6+dUBd/cKW584+juQ1cPbHsKMDgyLpKXR?= =?us-ascii?Q?nFy7c35bepcCvWlnsnc31OvipiTAMAKU/ADJPNzVD19IfWLfDFWYvcmtZpaT?= =?us-ascii?Q?ZhMRYfbpknvwr/6Q2HB2AXk5pXGOMf6rE7Dh7cPMW0itGgHsRnlCwEpwcV+N?= =?us-ascii?Q?WK2G+CW34yZjRUTyQZtEhvROOEx8cSzt+SxR0o59KKDbIVtpQ41I0cvZIYVF?= =?us-ascii?Q?USLXkUGyyyi0S4qGjEkoMmPQnclRN9mKpLbxgGSVb1R4Vz78KJ28Nf4ujzhZ?= =?us-ascii?Q?RSRcCvJPeFO10CkrgKEWFHCt6RnrDihXFM0t9brXNjmcicxwyBQbv27dHh2Y?= =?us-ascii?Q?oP2CS8sL5yLX1KOIba51Xn49GZgzKVOydjB9ATP2NoY55vC4byeXYKK2u0gm?= =?us-ascii?Q?fsuB1wNeJIXIbi/1mJ+2rLVJK7zTwwuLLtmIyxUWUSPVcc8YVLAF/p7yc0sF?= =?us-ascii?Q?xwfar+hb5EZFT0oRXiC86NIPpWZ218E/UeOs4gZSmvEAm8sYpcM9XsTUzOxR?= =?us-ascii?Q?z9Qyvp5tRjJFZiWVycsZHHNGYxIrh0kwluQkt3FD1kdUgv/ytpUpgh2tcoSr?= =?us-ascii?Q?3TesxAYCVFjV+YKA40RVvEzcLHTkvzd3eWqSklyoltdGZ0Xi5IbYb1KKmGHQ?= =?us-ascii?Q?8cpjm2cm47DWyFvg6WCooKiZ9IH1JoJVVUpOAEHTZjgoSYEt38fnMQ5fuVw+?= =?us-ascii?Q?zqV2OkC4yEzQxFiKL1IUfzFtUQ3RdbMfh2jBXmCAJzLtzjKjuyNm/ngc4v+m?= =?us-ascii?Q?GxI12lOhFXNdEUQZDJ8SRG36TnTmNkuVlk+vkLU8fLqFvqM5OGZlDYNWKdL+?= =?us-ascii?Q?c7HdpXtXsuEAoti2l6mUh928DL0+1dQbuLKG4df/gNCsQB0ZwL+/EPnsj41z?= =?us-ascii?Q?dVcY+/H+Z3hWrdm078nAATFLS9u6FLJRDVF5zAV2OlLiLiXFP0tMJyEsS+7z?= =?us-ascii?Q?TU96xDSPsZx7QaR2v/QaRNRstG72jbrNi26E?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(7416014)(1800799024)(376014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:45:50.2025 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9e732600-0222-41b2-cfe8-08ddf20b1125 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8450 Content-Type: text/plain; charset="utf-8" cxl_find_root_decoder() uses the endpoint decoder's HPA range to find the root decoder. This requires endpoints and root decoders to be in the same memory domain, which is not the case for systems that need address translation. Add a separate @range argument to function cxl_find_root_decoder() to specify the root decoder's address range. Now it is possible to pass a translated address range of an endpoint decoder to function cxl_find_root_decoder(). Patch is a prerequisite to implement address translation. Signed-off-by: Robert Richter Reviewed-by: Gregory Price Tested-by: Gregory Price --- drivers/cxl/core/region.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 13113920aba7..8ccc171ac724 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3376,19 +3376,18 @@ cxl_port_find_switch_decoder(struct cxl_port *port,= struct range *range) } =20 static struct cxl_root_decoder * -cxl_find_root_decoder(struct cxl_endpoint_decoder *cxled) +cxl_find_root_decoder(struct cxl_endpoint_decoder *cxled, struct range *ra= nge) { struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_port *port =3D cxled_to_port(cxled); struct cxl_root *cxl_root __free(put_cxl_root) =3D find_cxl_root(port); - struct cxl_decoder *root, *cxld =3D &cxled->cxld; - struct range *range =3D &cxld->hpa_range; + struct cxl_decoder *root; =20 root =3D cxl_port_find_switch_decoder(&cxl_root->port, range); if (!root) { dev_err(cxlmd->dev.parent, "%s:%s no CXL window for range %#llx:%#llx\n", - dev_name(&cxlmd->dev), dev_name(&cxld->dev), + dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), range->start, range->end); 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 05/11] cxl/region: Add @range argument to function cxl_calc_interleave_pos() Date: Fri, 12 Sep 2025 16:45:07 +0200 Message-ID: <20250912144514.526441-6-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636D:EE_|IA1PR12MB6212:EE_ X-MS-Office365-Filtering-Correlation-Id: da079c8f-be7f-4ab2-e691-08ddf20b1370 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|7416014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?WCf8VBKM8Auygb0f/jh01yQ4McHfCbIsnYpEBwT+2apkqhEQ4n+H5ZEBeuOF?= =?us-ascii?Q?4Bufd9v0AwbGFFdOUXPtm0A79AxOF0CpIHCvhpwqZ6HLK0NzARVCwyDtHU55?= =?us-ascii?Q?BnivRYZ5vKBRd/jCYbLTUtFQJqlQgHn3mwscfjxFItEG/JkAc/OAkVplEYMb?= =?us-ascii?Q?0XALor4kDjvu1HLDN1kuUfK2dpt6SmS/kqcA8HDwEtvXmtSUEICsouR16kLQ?= =?us-ascii?Q?V8WCuaeOOrJawwQv/9s2Mpr8DxbEbrrJHafYiivYQKeZqd+gm7FKIoeGLNFP?= =?us-ascii?Q?dO2OMsYBYtK0nmUnAz5TgVASNeqtFHaIwe8hFfO8Tl9qM0spJGJdim0+WG18?= =?us-ascii?Q?6nzSJNsgIWIe8KZnLiZ6uf4bDInYYu9BiQpRes2GUaMfwzRb273jzlBouAx1?= =?us-ascii?Q?rTIwfOhUWRubAwIVDTAQftIGWT9Dc9MTeCTuMDemMY8P1r4tgqG3pywYBMOP?= =?us-ascii?Q?G7Gu22BR/gqXsMjjeXbVeM7SaN0l8K5951aRJMQgyWG365GMox3KOliRsGMF?= =?us-ascii?Q?NN1Y2yFWT/ingp7r1JozpL1EHPgJYbgce/gFHBo038VSqJbkjxpUIw4ghcIp?= =?us-ascii?Q?HRGUu7KTdQV2d+kxqHYB91BgOnw9eUKIPrrWy2KXE1Bc/92kqHdjQm/5WTW6?= =?us-ascii?Q?MUaI/Xz8JS/2i4wKwGJ10HEQUOGPKnMZMLGW+UeZtLuK117W+LhsiWe5291e?= =?us-ascii?Q?LYFAW+ayyEE1eeXhOOBd8Vu+YWAQzzTD0bd2l7v5zPmftlv4xYwbMRaVzxB0?= =?us-ascii?Q?0YE3oIbCvMWqNqtlBuolLu6AjRXpMYPB7UedjbDyjEb62q2E4WWOit3KYIiT?= =?us-ascii?Q?QBgPj0TzHbNuGA5N8OeMFtevUtJnlRdMWkPz2EtZTZtzOvAJPOY9lknhrhcL?= =?us-ascii?Q?c3UYyc7vfxGrfaj30e3u7W6tfK8QK80nOytizJPzTygIESCMtME+WNOalX34?= =?us-ascii?Q?agJNQexuKKtr5cseBgF4ODJP1hOeApf19VKexxBL5z1rpUtxUZMz3jqoYWbD?= =?us-ascii?Q?cin8Optgu/M70B6KYc5O8MmDVM+T6v33BTcNu8rRdSh6ZM2JHhvC7JTsDW7U?= =?us-ascii?Q?0UT7I3ojOHgiY2sWBuRPPn1MKZuHdgAWQGW71cYN5NAMk3lpGBVSlEPQDqgU?= =?us-ascii?Q?n17ffdxCzXwVT4zyVGWDcOpAukTD8t2ZR4N/V4f1ZQWKjuWpO0LVshhB2mdm?= =?us-ascii?Q?oqA/6sZpQiCitQpwOEjn9hJO2ukOEzvVZAY2OOGFiXsrSVlNEJIuSmDNOOFT?= =?us-ascii?Q?AYFG3iUGhoZH1YSbet5AJF0g/v+qtmqTAsct33aZE2wru9vMGKC34bo6ZRYm?= =?us-ascii?Q?hUGbpe+LwXBD9y+XQfbPUBBQIeFus+bj+zBqu4lLUpTNjE+irX/kRQA5h62d?= =?us-ascii?Q?1t9T1anCJJYpp4h+IcrcxE8iY1wGl4fbBCootsbz1xUjl3jsiJqvt64HWGRf?= =?us-ascii?Q?wOnLq+5JIrP8m3tUmFvnD1rXCci8xSv0NYlAKY8M53kr+htlySxWfoTNDPxE?= =?us-ascii?Q?iVJGIPB9/81QQ+QhIEsr+tbo0kMquxRk3jRU?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(7416014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:45:54.0463 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: da079c8f-be7f-4ab2-e691-08ddf20b1370 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6212 Content-Type: text/plain; charset="utf-8" cxl_calc_interleave_pos() uses the endpoint decoder's HPA range to determine its interleaving position. This requires the endpoint decoders to be an SPA, which is not the case for systems that need address translation. Add a separate @range argument to function cxl_calc_interleave_pos() to specify the address range. Now it is possible to pass the SPA translated address range of an endpoint decoder to function cxl_calc_interleave_pos(). Patch is a prerequisite to implement address translation. Signed-off-by: Robert Richter Reviewed-by: Gregory Price Tested-by: Gregory Price --- drivers/cxl/core/region.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 8ccc171ac724..106692f1e310 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -1844,11 +1844,11 @@ static int find_pos_and_ways(struct cxl_port *port,= struct range *range, * Return: position >=3D 0 on success * -ENXIO on failure */ -static int cxl_calc_interleave_pos(struct cxl_endpoint_decoder *cxled) +static int cxl_calc_interleave_pos(struct cxl_endpoint_decoder *cxled, + struct range *range) { struct cxl_port *iter, *port =3D cxled_to_port(cxled); struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); - struct range *range =3D &cxled->cxld.hpa_range; int parent_ways =3D 0, parent_pos =3D 0, pos =3D 0; int rc; =20 @@ -1909,7 +1909,7 @@ static int cxl_region_sort_targets(struct cxl_region = *cxlr) for (i =3D 0; i < p->nr_targets; i++) { struct cxl_endpoint_decoder *cxled =3D p->targets[i]; =20 - cxled->pos =3D cxl_calc_interleave_pos(cxled); + cxled->pos =3D cxl_calc_interleave_pos(cxled, &cxlr->hpa_range); /* * Record that sorting failed, but still continue to calc * cxled->pos so that follow-on code paths can reliably @@ -2093,7 +2093,7 @@ static int cxl_region_attach(struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled =3D p->targets[i]; int test_pos; =20 - test_pos =3D cxl_calc_interleave_pos(cxled); + test_pos =3D cxl_calc_interleave_pos(cxled, &cxlr->hpa_range); dev_dbg(&cxled->cxld.dev, "Test cxl_calc_interleave_pos(): %s test_pos:%d cxled->pos:%d\n", (test_pos =3D=3D cxled->pos) ? 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 06/11] cxl/region: Separate region parameter setup and region construction Date: Fri, 12 Sep 2025 16:45:08 +0200 Message-ID: <20250912144514.526441-7-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00026367:EE_|DM4PR12MB7527:EE_ X-MS-Office365-Filtering-Correlation-Id: 26db415a-60a1-4d43-0a5e-08ddf20b158a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?jgWVuBnKyOCUQD3q4wIVJM82pCM6/I6Xp4YGHZ63YhwueYAU+TVTRoTAu4bs?= =?us-ascii?Q?Bz/0RGtiDsEupAnb1bMz3acnZv7K0Sxkij+/z/3LUfxWi9ClXquf0iy9kkas?= =?us-ascii?Q?Aiv89gBmKxJsSuo1VyQOpbWW67Ql9y269g5bwP4OKBOzwzXb4aUlRPqn6gyF?= =?us-ascii?Q?YdMMMaCx9izNnbK2+2xUDs/HN+R5xOqeL/rA6B3Ry+s0Z+pZxjc8Savv31om?= =?us-ascii?Q?yPGFUfNR8ntPk4mZY1hcP0WbvSrjnh/22mBfcsA66/aA74+DsXpGGRFUBIwT?= =?us-ascii?Q?XIUD9PoCdw51i0HMeIEWDM6VlP+olywAhoA/0tVVH/QLbKX8VUhqkYEPs93e?= =?us-ascii?Q?ekGlgkOK4lwvGEKy0EpfmdA41FUzZhA+UY8xSBpC1trena07xmy90lCZVigJ?= =?us-ascii?Q?V35vbKNH07S5NITpR+g+lG9haJIDMx3kFBy+YZlGKeLschqjwj8mjm9IwP64?= =?us-ascii?Q?MmwwBKDF8hh4SPm0ZoMS5TBU1hNOEY2c+tdhCEXl3DCjiqKsWbCK5h/z4+RH?= =?us-ascii?Q?1+VQVUdA4753fnQlOluMaz03juqKWuNgYnvRQKhSXJvVJta8lKPpXFMgdaEg?= =?us-ascii?Q?DczknluwjoyZRpfmrQt/GVH4TeKeyBjCykQf04BHwyWIS4fc5BjUl1W8aonG?= =?us-ascii?Q?4Zohn8k/NIJixIRkxNA5nHFYPyW08aCtVueiOUJD6PlbDfCyxtZnUcbHPxzb?= =?us-ascii?Q?J0+YUJaM35GRpYeU2+Y2CdOpSqcXfpnrb9lT8oIt8NEYmZ6bL3AfMcUxOQhd?= =?us-ascii?Q?HRkiMbORnshw32X76COhVRYbdYnkPTYIw9h0uO2ci3xMYdM0Af1lbHfnH1HE?= =?us-ascii?Q?TS7IzojVQpSJ71cx0cqvOjQsqRG4UL+lIb9sQlAD42rG++v4/V+P9HvPedBA?= =?us-ascii?Q?/f7waoYOYbIeg2bGVoKAOu8ZwWKFrERQYvYCZ++2HQr5GZOSi3Jiin6o0k8u?= =?us-ascii?Q?VkZGlOrZQC0VtisI49YR+lG6cBR/9FXk58/EICD6ZratYxpiuQl0KGhkPLbI?= =?us-ascii?Q?FiHD4UkLmcJjIQfz2xJt9HvmuREEeQFLKjEBpDpvBBTP2pz95ikxFuoDpy60?= =?us-ascii?Q?YobwP0grBSvS9SacveyebCLokjBvL3GFG1J6rHSHcgy/e0bpt6lx1D/rH3mr?= =?us-ascii?Q?2uIa8GOFXF34ly/ZIekXiN1C9mVZ7CHfiXYhiyCuh0bcbuKRu7pEIag9DGkw?= =?us-ascii?Q?8YlwCNFUOUDvyO6YVqF5idgvPcW4jI2I2CRNCvYmCDKmLQKcwgIFXDR+YFnx?= =?us-ascii?Q?heF6aEEDQMsSKQ7RRpVfTa0YKdMXsIFu3jAgIt61UnqNEHTefxdxypqrOVtG?= =?us-ascii?Q?r3zXKRqLeMyY2qsVPdfkzuPhjJKRuIF7uEI2Z4kV1RdFWB3kgwGVyE+Y0XmS?= =?us-ascii?Q?6+HxFBdiWrxTQP4/3MW3THkym8znDBu8YBm1oF3AloToMpp9L1m5v/Scp4sF?= =?us-ascii?Q?kF3ob5g/fifv67uv7SqM/euIVpOvM/UeorJQEspEQ3RG6KTHq16nFYwzcxa1?= =?us-ascii?Q?hxzaaJxRsBnAjCFihC0f8sj3LVhLI461rb8K?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(7416014)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:45:57.5797 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 26db415a-60a1-4d43-0a5e-08ddf20b158a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00026367.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7527 Content-Type: text/plain; charset="utf-8" To construct a region, the region parameters such as address range and interleaving config need to be determined. This is done while constructing the region by inspecting the endpoint decoder configuration. The endpoint decoder is passed as a function argument. With address translation the endpoint decoder data is no longer sufficient to extract the region parameters as some of the information is obtained using other methods such as using firmware calls. In a first step, separate code to determine and setup the region parameters from the region construction. Temporarily store all the data to create the region in the new struct cxl_region_context. Add a new function setup_region_parameters() to fill that struct and later use it to construct the region. This simplifies the extension of the function to support other methods needed, esp. to support address translation. Patch is a prerequisite to implement address translation. Signed-off-by: Robert Richter Reviewed-by: Gregory Price Tested-by: Gregory Price --- drivers/cxl/core/region.c | 50 +++++++++++++++++++++++++++++---------- 1 file changed, 38 insertions(+), 12 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 106692f1e310..57697504410b 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3414,6 +3414,26 @@ static int match_region_by_range(struct device *dev,= const void *data) return 0; } =20 +struct cxl_region_context { + struct cxl_endpoint_decoder *cxled; + struct cxl_memdev *cxlmd; + struct range hpa_range; + int interleave_ways; + int interleave_granularity; +}; + +static int setup_region_params(struct cxl_endpoint_decoder *cxled, + struct cxl_region_context *ctx) +{ + ctx->cxled =3D cxled; + ctx->cxlmd =3D cxled_to_memdev(cxled); + ctx->hpa_range =3D cxled->cxld.hpa_range; + ctx->interleave_ways =3D cxled->cxld.interleave_ways; + ctx->interleave_granularity =3D cxled->cxld.interleave_granularity; + + return 0; +} + static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, struct resource *res) { @@ -3453,11 +3473,12 @@ static int cxl_extended_linear_cache_resize(struct = cxl_region *cxlr, } =20 static int __construct_region(struct cxl_region *cxlr, - struct cxl_endpoint_decoder *cxled) + struct cxl_region_context *ctx) { + struct cxl_endpoint_decoder *cxled =3D ctx->cxled; struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; - struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); - struct range *range =3D &cxled->cxld.hpa_range; + struct cxl_memdev *cxlmd =3D ctx->cxlmd; + struct range *range =3D &ctx->hpa_range; struct cxl_region_params *p; struct resource *res; int rc; @@ -3506,8 +3527,8 @@ static int __construct_region(struct cxl_region *cxlr, } =20 p->res =3D res; - p->interleave_ways =3D cxled->cxld.interleave_ways; - p->interleave_granularity =3D cxled->cxld.interleave_granularity; + p->interleave_ways =3D ctx->interleave_ways; + p->interleave_granularity =3D ctx->interleave_granularity; p->state =3D CXL_CONFIG_INTERLEAVE_ACTIVE; =20 rc =3D sysfs_update_group(&cxlr->dev.kobj, get_cxl_region_target_group()); @@ -3527,9 +3548,10 @@ static int __construct_region(struct cxl_region *cxl= r, =20 /* Establish an empty region covering the given HPA range */ static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd, - struct cxl_endpoint_decoder *cxled) + struct cxl_region_context *ctx) { - struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); + struct cxl_endpoint_decoder *cxled =3D ctx->cxled; + struct cxl_memdev *cxlmd =3D ctx->cxlmd; struct cxl_port *port =3D cxlrd_to_port(cxlrd); struct cxl_dev_state *cxlds =3D cxlmd->cxlds; int rc, part =3D READ_ONCE(cxled->part); @@ -3548,7 +3570,7 @@ static struct cxl_region *construct_region(struct cxl= _root_decoder *cxlrd, return cxlr; } =20 - rc =3D __construct_region(cxlr, cxled); + rc =3D __construct_region(cxlr, ctx); if (rc) { devm_release_action(port->uport_dev, unregister_region, cxlr); return ERR_PTR(rc); @@ -3572,13 +3594,17 @@ cxl_find_region_by_range(struct cxl_root_decoder *c= xlrd, struct range *range) =20 int cxl_add_to_region(struct cxl_endpoint_decoder *cxled) { - struct range *range =3D &cxled->cxld.hpa_range; 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Fri, 12 Sep 2025 07:45:58 -0700 From: Robert Richter To: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Dave Jiang , Davidlohr Bueso CC: , , Gregory Price , "Fabio M. De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 07/11] cxl: Introduce callback to translate a decoder's HPA to the next parent port Date: Fri, 12 Sep 2025 16:45:09 +0200 Message-ID: <20250912144514.526441-8-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636D:EE_|SA5PPF7D510B798:EE_ X-MS-Office365-Filtering-Correlation-Id: d3028542-08d4-4c94-630b-08ddf20b19b8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?PYYnxSJO/r2fNe3Lm8z0Uo9uQ5/iHiLH8USpb45GpHyFliZsdANF6L8HBO/U?= =?us-ascii?Q?nlrbdX3cbr17wSAO6gv8xCtUWOVc38L1X2NuWnDyU9AcEo3PKRxiDMD8nhf2?= =?us-ascii?Q?5SDYR7SgurPXuecwsG1kasJEdAlAbTBw8p6Faqea/OukeLfxDRmZ3NqyiAE+?= =?us-ascii?Q?YYWTCUz9ZzogX17wM0D53/VODOUxShdayjd5/Vtxppk/G/ibswFBOLKlfzVC?= =?us-ascii?Q?6exvhFqxCFc5ZkqaEsHCJd31JiD+PTPEVw/Y76qZWknxbCmN9Hkc7P1O+Qlr?= =?us-ascii?Q?zKKR+/U3cxf7LcenzpGyIJt8K5VBNXSavDzTH0OaYafNMFA5QMfhVJV2APG9?= =?us-ascii?Q?vcH4eUwE0oDopvcmJTNc8uKbxHDOK5KIaFCZ9BHNmKPRVsdk2aN8w/+BKKOF?= =?us-ascii?Q?bJgyENfcmSgAH9YYCoVjUevBEcLuEPei/RipV3PNBb1D9DXMUUKROWnDcC90?= =?us-ascii?Q?odu6+wmATCMphZmcAi/EWjhGuiekss79PJRPjnYE/9QZ2taqhFKhmnjpFCbQ?= =?us-ascii?Q?6mpvJa3+MniBL2R/NPoo9Zf7CftA9Sv2sV0gzYt6+yDjsjhpqbQLHUU67I1d?= =?us-ascii?Q?ZUvQ7uUpYcnZrgHVo7XY+8MJXClpW2iD0IuUFz/JEhj1584PMIAPj9N7gI04?= =?us-ascii?Q?BlCZuDY+jfkGG17EtzTwVdzdU6/UOdUk3V9DTVAtd2FnZjCf7xzEbU/lPKqv?= =?us-ascii?Q?N+nUtNM3Jcu9BM0I69xCMYZ1mBVBRiOKUnSLTmLrDQkrHN1MVEldmOOZdTNX?= =?us-ascii?Q?TdNXINgBhjyFvU+254XDElcgGv+ikgaXlAfYg8A8uohXFV0QrEbFq2JESLyX?= =?us-ascii?Q?inY+I1Gr4eiqkRcFivpwoTsrUASYQ1IEN3PnXL73Y/81TA9z9NXx7kOTQ97P?= =?us-ascii?Q?zXGSPHIhKG1WisOO5Y8g1tBgz4PGSwWu21mDnoYxsx+d9JVv2v/B9IYXGLoq?= =?us-ascii?Q?HznpV45GuG39Zcj7j+QCQow6vQ8d/13jK9AkjtbREEt2hWH7g14+NUlhkayi?= =?us-ascii?Q?j7P110Lj4eHT1MBWk6cMGO59MIum+c7UiH58DnKEgmtehbX81UylmDPf01c9?= =?us-ascii?Q?BNQVfc4GuqgZk2FmiMxWklD1cTUC4vr1jXT5rtlRTgud97ltKaiFzU8sa1kZ?= =?us-ascii?Q?Wyy81JRDJ02oGDQ2fxw8B35xqSpFQGnDBgQCyQQyP1b9OgqRy9rHff4IPogb?= =?us-ascii?Q?bH2O/UpuF0fHM2c5VL2WQ8LMvC4B5q0nVDzEDWPGtdSdibtDCQMPlZukq/op?= =?us-ascii?Q?7gJZB1CZVKMwHojLDlfOTpA8cvjkdUwIGXZDeJQ0NjtzHEJKie/+mjAvlal9?= =?us-ascii?Q?+k/HjmtUU2gSnB+ra8yF8wgS/bk9Ve9AbXceeS4BZvhhupQ21FkP9FAKoz+m?= =?us-ascii?Q?QZ6vLx0erTa4TvnfW5DqLYP4JG1rxaeZGSc6HAG5kAwPxeNK7C98COz9d2YL?= =?us-ascii?Q?8X9rr1xUItRLlb5DW7tGTquSJTN4vx6twIv0vGmHiFbabK9+mRwS1HhNUbA/?= =?us-ascii?Q?ZD2fIMbwYg9itbfC20zJii6+4HYRNyFnrzzZ?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:46:04.5792 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d3028542-08d4-4c94-630b-08ddf20b19b8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA5PPF7D510B798 Content-Type: text/plain; charset="utf-8" To enable address translation, the endpoint decoder's HPA range must be translated when crossing memory domains to the next parent port's address ranges up to the root port. The root port's HPA range is equivalent to the system's SPA range. Introduce a callback to translate an address of the decoder's HPA range to the address range of the parent port. The callback can be set for ports that need to handle address translation. Reviewed-by: Gregory Price Signed-off-by: Robert Richter Tested-by: Gregory Price --- drivers/cxl/cxl.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index f182982f1c14..eb837867d932 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -429,6 +429,17 @@ struct cxl_rd_ops { u64 (*spa_to_hpa)(struct cxl_root_decoder *cxlrd, u64 spa); }; =20 +/** + * cxl_to_hpa_fn - type of a callback function to translate an HPA + * @cxld: cxl_decoder to translate from + * @hpa: HPA of the @cxld decoder's address range + * + * The callback translates a decoder's HPA to the address range of the + * decoder's parent port. The return value is the translated HPA on + * success or ULLONG_MAX otherwise. + */ +typedef u64 (*cxl_to_hpa_fn)(struct cxl_decoder *cxld, u64 hpa); + /** * struct cxl_root_decoder - Static platform CXL address decoder * @res: host / parent resource for region allocations @@ -599,6 +610,7 @@ struct cxl_dax_region { * @parent_dport: dport that points to this port in the parent * @decoder_ida: allocator for decoder ids * @reg_map: component and ras register mapping parameters + * @to_hpa: Callback to translate a child port's decoder address to the po= rt's HPA address range * @nr_dports: number of entries in @dports * @hdm_end: track last allocated HDM decoder instance for allocation orde= ring * @commit_end: cursor to track highest committed decoder for commit order= ing @@ -619,6 +631,7 @@ struct cxl_port { struct cxl_dport *parent_dport; struct ida decoder_ida; struct cxl_register_map reg_map; + cxl_to_hpa_fn to_hpa; int nr_dports; int hdm_end; int commit_end; --=20 2.39.5 From nobody Thu Oct 2 18:19:32 2025 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2046.outbound.protection.outlook.com [40.107.220.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FA142264CD; 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 08/11] cxl/region: Implement endpoint decoder address translation Date: Fri, 12 Sep 2025 16:45:10 +0200 Message-ID: <20250912144514.526441-9-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636D:EE_|CY8PR12MB7436:EE_ X-MS-Office365-Filtering-Correlation-Id: bf4d2159-92ed-4850-9129-08ddf20b1c60 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|7416014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?rdQjv5Sd0uWNJv5bc4eOU37qw1DlovfQdkmD4rdQPGSXBhpGnw5cycNp5yCl?= =?us-ascii?Q?Md0svLr61jxfq6/blXa3pPdAE0+PWr8gGhJq/dASWC7NK8PUuQ217NPAzJhj?= =?us-ascii?Q?Ja6+om2WB6rw3R5CPRqni6zJW7QyuOL/yPWSXsnRN+UrcB9mcTD1OkvQ30CC?= =?us-ascii?Q?Vxd2/lIQBgqd6aOybVZ66PNyTQN1yVB1Ns0e7LFl2U8m+NLJz58+cSh2vJUV?= =?us-ascii?Q?/9tZs6VkHfmMz+XERDDuBvnqHNulNCHIM8SVSa0L66gvKHbw8QLfXYLYorP+?= =?us-ascii?Q?Lp4FfQO9Q8fOoMwecPfJ3Alrr97XOg/RkqHcs5ucqMqbB/fApQSLP5DwMWtT?= =?us-ascii?Q?IVTC1d32oVNqQTRKsF4VXfDEEcPgsI/sOwIKbxGgs+stzjk9gP589Mc7Jr0w?= =?us-ascii?Q?CiXgY8FHmh8pJrRs4b3umwiy+4JMHL64RtIOLOf23CmNZgZAuJJx8KtiXNb4?= =?us-ascii?Q?HaMo+Ulv64t/cc5xYCjGXHEgCh89Epf5qdsW9QIhm1zKy8dfOWTv5q0GUCZg?= =?us-ascii?Q?g+KjXzfSTJuZKwz1L26a8ZRcZ8kuAXcEJDrVlhOMTtYIj9n6ghGqtO5QjpUs?= =?us-ascii?Q?qSnWW0TRw8Pq6Etr3Es7OpQtueRLQwWOHfcRw2nDYT2QsCUqItEo7B2XLn0t?= =?us-ascii?Q?+V3NZQq10PwQZjPl2dMbJtWOs12a5sSahbgvyCH9eI0YFQ9O0LXCVpKVeuBm?= =?us-ascii?Q?bmqCz+8f3TWs0qHrcIde5ZEN4cxyw22SqFiBmjtysEW/KDGrUufP6bacCjxN?= =?us-ascii?Q?gDwlftdR0dHBED/F0lLTA91sRiIp3PQhAy9XFZil31d9af7AC5FNSFHW3VmC?= =?us-ascii?Q?2YP0KCGEdlfDuEWtQKl2kqi2mZ/qpHIYK5wti2ux9SVujsZV+P6gjHaOm/hu?= =?us-ascii?Q?XDpZqi46352pt09zcMazAvwYU+YVE3fh4laYJ33T/JUJSTGQ+Mr5mZV6sNGQ?= =?us-ascii?Q?LXuEpxbBP/vMKr5Af/9ZQDgGB31H3I/TU8hOWFZAt37KNhlTFrLTI8h3MH0f?= =?us-ascii?Q?hW8w+HQnx8P7ar+s3OKuQ8DktYcMsFy15K3MDLh1Fr419F/24wyywngiYLN7?= =?us-ascii?Q?6qzL8z5le4/dOQn0RgtRd3hb3748tpG7dpZOwE0lWcpoPijylPLf6zXTxcbx?= =?us-ascii?Q?tH6hzk94VQi0R6Hib4soJkluLSWtMgpDft9zepaGvsiSXBgzGeqqK+Rw+PIR?= =?us-ascii?Q?TmGyuy9W1y1TL6gS5Nkn1M8Uy4/RMUyxk3Ni2EpgcylyC4KsXQiiy+U2w3e7?= =?us-ascii?Q?lfy37N2lXhKEdQ/U8bY8v+6Ci0vSfnq5fvMTu1VwJ/3BtkqhW1dkGR7y9kf1?= =?us-ascii?Q?udiJjhmDT/i0lRKsSuSFbMRR+mHZf0KyMh9anriFaXS19vIsoRLVs2zgEBeJ?= =?us-ascii?Q?TxK7luYgyBCB2r7OhQiVOXf2vVWwNl1ihHy3d5L3Iy8IwevJqno4YZyS/Faf?= =?us-ascii?Q?0HWzTntoKxN+WX8XyyeNjhShXj6/e04OC7VRF0r7ygh4qL9O9v2+TBkoEQOW?= =?us-ascii?Q?4Mo1yedEODNdV8t7E+oc1KDAHcbK5NAymFGs?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(7416014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:46:09.0375 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bf4d2159-92ed-4850-9129-08ddf20b1c60 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7436 Content-Type: text/plain; charset="utf-8" Systems that need address translation have the endpoint decoders programmed for a different address space. Host physical addresses (HPA) are different from their system physical addresses (SPA). The decoder's address range and interleaving configuration of such endpoints cannot be used to determine the region parameters. The region's address range must be SPA which the decoder does not provide. In addition, an endpoint's incoming HPA is already converted to the devices physical address (DPA). Thus it has interleaving disabled. Address translation may provide different ways to determine an endpoint's SPA, e.g. it may support a firmware call. This allows the determination of the region's parameters without inspecting the endpoint decoders. Implement the setup of address translation given there is a function to convert an endpoint's HPA (which is identical to its DPA) to an SPA. Use the previously introduced cxl_to_hpa_fn callback for this. Convert the decoder's address range and ensure it is 256MB aligned. Identify the region's interleaving ways by inspecting the address ranges. Also determine the interleaving granularity using the address translation callback. Note that the position of the chunk from one interleaving block to the next may vary and thus cannot be considered constant. Address offsets larger than the interleaving block size cannot be used to calculate the granularity. Thus, probe the granularity using address translation for various HPAs in the same interleaving block. Note that this patch does not yet enable address translation as callbacks have not been initialized. Signed-off-by: Robert Richter Tested-by: Gregory Price --- drivers/cxl/core/region.c | 95 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 94 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 57697504410b..9fb1e9508213 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3422,16 +3422,109 @@ struct cxl_region_context { int interleave_granularity; }; =20 +static int setup_address_translation(struct cxl_endpoint_decoder *cxled, + struct cxl_region_context *ctx) +{ + struct cxl_port *port =3D to_cxl_port(cxled->cxld.dev.parent->parent); + struct cxl_decoder *cxld =3D &cxled->cxld; + struct range range =3D ctx->hpa_range; + u64 spa_len, len =3D range_len(&range); + u64 addr, base =3D range.start; + int ways, gran; + + if (!len || !port->to_hpa) + return 0; + + if (!IS_ALIGNED(range.start, SZ_256M) || + !IS_ALIGNED(range.end + 1, SZ_256M)) { + dev_warn(&port->dev, + "CXL address translation: Unaligned decoder HPA range: %#llx-%#llx(%s)\= n", + range.start, range.end, dev_name(&cxld->dev)); + return -ENXIO; + } + + /* Translate HPA range to SPA. */ + range.start =3D port->to_hpa(cxld, range.start); + range.end =3D port->to_hpa(cxld, range.end); + + if (range.start =3D=3D ULLONG_MAX || range.end =3D=3D ULLONG_MAX) { + dev_warn(&port->dev, + "CXL address translation: Failed to translate HPA range: %#llx-%#llx:%#= llx-%#llx(%s)\n", + range.start, range.end, ctx->hpa_range.start, + ctx->hpa_range.end, dev_name(&cxld->dev)); + return -ENXIO; + } + + /* + * Since translated addresses include the interleaving + * offsets, align the range to 256 MB. + */ + range.start =3D ALIGN_DOWN(range.start, SZ_256M); + range.end =3D ALIGN(range.end, SZ_256M) - 1; + + spa_len =3D range_len(&range); + if (!len || !spa_len || spa_len % len) { + dev_warn(&port->dev, + "CXL address translation: HPA range not contiguous: %#llx-%#llx:%#llx-%= #llx(%s)\n", + range.start, range.end, ctx->hpa_range.start, + ctx->hpa_range.end, dev_name(&cxld->dev)); + return -ENXIO; + } + + ways =3D spa_len / len; + gran =3D SZ_256; + + /* + * Determine interleave granularity + * + * Note: The position of the chunk from one interleaving block + * to the next may vary and thus cannot be considered + * constant. Address offsets larger than the interleaving + * block size cannot be used to calculate the granularity. + */ + while (ways > 1 && gran <=3D SZ_16M) { + addr =3D port->to_hpa(cxld, base + gran); + if (addr !=3D base + gran) + break; + gran <<=3D 1; + } + + if (gran > SZ_16M) { + dev_warn(&port->dev, + "CXL address translation: Cannot determine granularity: %#llx-%#llx:%#l= lx-%#llx(%s)\n", + range.start, range.end, ctx->hpa_range.start, + ctx->hpa_range.end, dev_name(&cxld->dev)); + return -ENXIO; + } + + ctx->hpa_range =3D range; + ctx->interleave_ways =3D ways; + ctx->interleave_granularity =3D gran; + + dev_dbg(&cxld->dev, + "address mapping found for %s (hpa -> spa): %#llx+%#llx -> %#llx+%#llx w= ays:%d granularity:%d\n", + dev_name(ctx->cxlmd->dev.parent), base, len, range.start, + spa_len, ways, gran); + + return 0; +} + static int setup_region_params(struct cxl_endpoint_decoder *cxled, struct cxl_region_context *ctx) { + int rc; + ctx->cxled =3D cxled; ctx->cxlmd =3D cxled_to_memdev(cxled); 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 09/11] cxl/region: Lock decoders that need address translation Date: Fri, 12 Sep 2025 16:45:11 +0200 Message-ID: <20250912144514.526441-10-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636D:EE_|DM6PR12MB4451:EE_ X-MS-Office365-Filtering-Correlation-Id: adc6e995-1ea5-4045-9aa3-08ddf20b1f7e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|1800799024|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?c5eR1w1Js3PiGnbCg9i7c2ScQfureja1qNUSZorEt1ZW8e1N0iy/9twI69hV?= =?us-ascii?Q?PpIjOJ8uUt27/iU4akt823sQoTFR6DlwvmDREnty1jp/LGV2jW0CWXJ4m4rR?= =?us-ascii?Q?Sc/7r8peXyrPVaTpKlVt3l9XDfSIqN2vIuuluY7WDovb3YxdxUNak7DPIOkq?= =?us-ascii?Q?Qm9HGHNQprn9plXAVM+/QI0+Itx1S9UZu5Ujq5H+uoDruZt9OoSoR+vgjHG5?= =?us-ascii?Q?HMo8ISQbfServPgK790st3YdqEksrxrVfwJk+R3eVmsVsnzmzW00vQ8HVO3A?= =?us-ascii?Q?1FT4HjsGKvXxuuR+3L/264L5NHmlc0oF7LoV/giH/5PT7NkKMYRXk48sP4IN?= =?us-ascii?Q?fBVLx/MbZGzQst3hqWAPkWHJdTe6+NR+TjW6LQxwN8x1w28V+FBeNsy1+N/w?= =?us-ascii?Q?NlFI0i5d4vMZgDDQ8Zd31gMof+R3adeGdLsnLuHYsgVs5scN0w2zUxq3wQ9K?= =?us-ascii?Q?BrmAjQK7hDWhvHktSqGY0w1M7bpfZt4LT4XUGtV34J196BM9811zhCblhUzy?= =?us-ascii?Q?L9lyxTjLWiTbCwv7W1fO0RrRShLV8nwOrv4XvBSYggvZ3ZGHpD+1kVKQCS/e?= =?us-ascii?Q?cUKRVLcLjmGviULNXZd2XlOog8Rg3nDLJoiP7Tc701OZ7kKU+VNNGRS3FxuB?= =?us-ascii?Q?MDAFdEMJFzI/e/mNSoByer/qu7+PY0jFU5j0TEhmD1UTY5odEDF2JXUd+cqr?= =?us-ascii?Q?smbZZJvZ2/jlAKRx/nesGwEGYcy0Tep4gvHrjfeNU1/BxAKYAmSxFBmNiR2v?= =?us-ascii?Q?FYaaJnC/46sCjj5GvlymJYc9W09UZj6Xne856lrRBU46FaND2ihSyHpKKhmu?= =?us-ascii?Q?HfqWYb7OaUXZ4Q8sG3d2+P4+mKLBMO6MnXjGpq2vK/u1rskQRbNDGFV+RSZz?= =?us-ascii?Q?WsG8Qm2Ci8G7XIQDz8RY1HC0Pt2HjJGAergRY1xs/r4TDQI4Abz9oOoEmZBc?= =?us-ascii?Q?y/U5q8RwZJ77nxV5s/U3+O92fKagnx6W5uGGx3q7c2/7Cdxf6aPQUheCSMIM?= =?us-ascii?Q?xz7uekUjBjRiMQurXK2MbIoK7YzmXHaUpCV2/20a8tmMBMQDguk4kXQ600Et?= =?us-ascii?Q?Lm/cU88LoaBBOCJ+gQ5aL/Io+nKZvCC0AgzUqhMgEOHtB791QyzBg+XE7HVX?= =?us-ascii?Q?If84Yhsh5W7huESS2wnKp9HI2dHZivi/N3Bia5QsRXBsdOJrqAqETfeQnZr8?= =?us-ascii?Q?HP0jbfqrQ++U4wt0YIxi/+M3OAcpog2RtBCVSCIcqWkimhPxsaUsHaKWrIqX?= =?us-ascii?Q?FauWhDX4WPmNbvEVKvmjL19vDfu2BnlShURIB+KpCS9E648f71UbVabZ46CD?= =?us-ascii?Q?mhhb/ZQCYlvZn9M7Ho5fTzVHw+aoZ3wyiYkruM967XTJpcwZ2O/wbSWf8pQS?= =?us-ascii?Q?cV6JphXHqAe1hw+y44AftwPAwBrNdgeNy+rP2+PVhmYl1LejdMN/SJapHmgd?= =?us-ascii?Q?XBqFwXJacKRxByRlXMbhizkYmL2lzQhOoaNZpqoUq05mWJbHe7KUa/G4NwYB?= =?us-ascii?Q?B7imShazSM2ufu85CUhD0F+1nVq7XZi0FrOc?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(7416014)(1800799024)(36860700013)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:46:14.2687 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: adc6e995-1ea5-4045-9aa3-08ddf20b1f7e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4451 Content-Type: text/plain; charset="utf-8" There is only support to translate addresses from an endpoint to its parent port, but not in the opposite direction from the parent to the endpoint. Thus, the endpoint address range cannot be determined and setup manually for a given SPA range of a region. If the parent implements the ->to_hpa() callback, address translation is needed. Then, forbid reprogramming of the decoders and lock them. Signed-off-by: Robert Richter Reviewed-by: Gregory Price Tested-by: Gregory Price --- drivers/cxl/core/region.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 9fb1e9508213..44ea59252ff0 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3497,6 +3497,16 @@ static int setup_address_translation(struct cxl_endp= oint_decoder *cxled, return -ENXIO; } =20 + /* + * There is only support to translate from the endpoint to its + * parent port, but not in the opposite direction from the + * parent to the endpoint. Thus, the endpoint address range + * cannot be determined and setup manually. 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 10/11] cxl/acpi: Prepare use of EFI runtime services Date: Fri, 12 Sep 2025 16:45:12 +0200 Message-ID: <20250912144514.526441-11-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636D:EE_|DM4PR12MB6397:EE_ X-MS-Office365-Filtering-Correlation-Id: 4deb88da-af72-4479-f085-08ddf20b2133 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|7416014|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?WE1hWZS5rx1b2G/sFjM+8TwJXKxdPChqoi4tN3XB0Z/MMSb7mx45s9r5Kc1O?= =?us-ascii?Q?yHd50E7dhWj/tHPs6v663gVFmX8Qw0s1754HQB3R+7Be7al9m784n+ZHtxPt?= =?us-ascii?Q?bfk5sdq8yZTJ99gpO6aVG0UTQY57GqFFE7+KpUOVc8fDaX2PgJKpTRx26Pdy?= =?us-ascii?Q?snIKGJFsAKNluEUrJ7sq61v4PyIh1AKtUScuv3M0u5w+QL7bV+z5RjB1kgvL?= =?us-ascii?Q?Gs7NloeSkxqwzgr431AmzCiDiF7DRyC/v3Jm+AI1cpxs5g1MQsE7kZIyMADP?= =?us-ascii?Q?acz7Suh2iOABZ8rpMplDyOyjKMwtz/iLU+vjApeJB/rSDJqC4VM0qTbYvRC6?= =?us-ascii?Q?rcr5xfcA2QPRvWeXLtuHBfqtewJdJTnN5RULVltHNw2pNICym6BqQr8OTK/0?= =?us-ascii?Q?VUk6AjqlE+SSMar2NyBN45G1caykFb2vQUnzJh4dxfsUpeEb+uoi56dbHjgU?= =?us-ascii?Q?j4ctiA3AW7VYXSThL3JEHhvLggqdcWfbrz9EI75WUuT35LBQuCRiBDoYDSE/?= =?us-ascii?Q?ChWLqQkt0ULwhNmfYOC/XjIDRx96DHUhKJu6Koe+55ljsFEd0a5V3vpwwPYs?= =?us-ascii?Q?PPTwz6MWuB/vg91tmgYFepOujYym6qaUzOUbE29XzkHK1SqksTcGcV36EBBI?= =?us-ascii?Q?jGvkA3W9s1mlE3Wnw+/qQLkwf6wlQj18c+4wrQQRa0JNRdJu5fqABCv5KiXB?= =?us-ascii?Q?x5FOHr4DWhJd3YWAYXbOAyM9bD9pKt/rYEQ6FO78uHnjlF1Mz6xkiE5Lu3Oc?= =?us-ascii?Q?PH1h4qmdqTSk8j13UB8vKJd9C3pOioOkFo1fMA6alqsDkQkYxUSp6wlGo6OZ?= =?us-ascii?Q?iARqu1bRf6aJEEWmME/vj64KvLbR3IFrJUB1aVPlxIToMjH9J5hvaJvWDEG4?= =?us-ascii?Q?J7ULhz1lar7Sp5akrloDGrr6EQ7f8BACH3CeX8HY7yGJxay6cBtabp6Jkbge?= =?us-ascii?Q?2/YFGMIoofOVs64id3iXPwLC0gcR5tpOnSdObH+OMPyIgm1ma1nyEjWocUqU?= =?us-ascii?Q?6ENj2Mx3YiaIxXwnSsv/vXFt9NLtX5Y/mgbtkZ3KBa7N8fnMdTwUtZD7+uBq?= =?us-ascii?Q?xugOJpPyKWGW9sd9VSNJcma3EOiSE2McXyRlDitF8ZcY/yORqz2iZSweOBNj?= =?us-ascii?Q?k9xUzn3c3qxlhSBPkaGFkHAtc50keBKYTP3YdBsv/+g2Hyd8HPyqD6B4N7qr?= =?us-ascii?Q?6CmDbx1p8aThjW5wsTAlVqw+JZAtBr0KzzW7FFABpX7oubVw/CBQCOn3yTZz?= =?us-ascii?Q?7KBYkqt2oqG5CKRJI129209fE2RaBDBxWnSvhzF+X8xZNpjTrT8rGthph4Tf?= =?us-ascii?Q?3p0dkT73lV0ReyvUmnMDx87EC4EQh/rnmDdakAcuj1MVXyyluQhm/KN05pso?= =?us-ascii?Q?F+xTImSZpIyxcuaScZXxUtxkd75zktUnD1QA++UycfWdctywCmsP7bnSnQNS?= =?us-ascii?Q?wDwrkt/VnbbzCU0baKz/4ppR7tLXFlnpc+BGCpDpNKQdGSFRcOKA1KlLZuOF?= =?us-ascii?Q?2RpR80Ce4jMO7Acry5owKx6pMls0AmneqEom?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(7416014)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:46:17.1357 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4deb88da-af72-4479-f085-08ddf20b2133 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6397 Content-Type: text/plain; charset="utf-8" In order to use EFI runtime services, esp. ACPI PRM which uses the efi_rts_wq workqueue, initialize EFI before CXL ACPI. There is a subsys_initcall order dependency if driver is builtin: subsys_initcall(cxl_acpi_init); subsys_initcall(efisubsys_init); Prevent the efi_rts_wq workqueue being used by cxl_acpi_init() before its allocation. Use subsys_initcall_sync(cxl_acpi_init) to always run efisubsys_init() first. Reported-by: Gregory Price Tested-by: Joshua Hahn Reviewed-by: Joshua Hahn Signed-off-by: Robert Richter Reviewed-by: Gregory Price Tested-by: Gregory Price --- drivers/cxl/acpi.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index 26c494704437..95a5ba395c1a 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -1012,8 +1012,12 @@ static void __exit cxl_acpi_exit(void) cxl_bus_drain(); } =20 -/* load before dax_hmem sees 'Soft Reserved' CXL ranges */ -subsys_initcall(cxl_acpi_init); +/* + * Load before dax_hmem sees 'Soft Reserved' CXL ranges. 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v3 11/11] cxl: Enable AMD Zen5 address translation using ACPI PRMT Date: Fri, 12 Sep 2025 16:45:13 +0200 Message-ID: <20250912144514.526441-12-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250912144514.526441-1-rrichter@amd.com> References: <20250912144514.526441-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636B:EE_|SA0PR12MB4351:EE_ X-MS-Office365-Filtering-Correlation-Id: 296c6c8b-d4ff-4818-19b1-08ddf20b21eb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?utf-8?B?UnlxWDkrSEpvMkl4OS9hTzVZUEFIekpXSm9pRzU0MXhFTEN3dHk4WU8wUGNl?= =?utf-8?B?RVVGeFAycnRTQStjN1ZaUWVMT2dTVnJySkNsRkQwUmEycDFvYy80UU80blpw?= =?utf-8?B?cGhMb1BBUE1NdERGMlhGc2lZSzZqVFJCMnJNbHdDVSsrSXZ2YmxEVzFXOHFs?= =?utf-8?B?ckthaE90cE9uSWtySVdtYmtZUnR4QVdkaVVlRUhQVk03SDRnbFBWVXFuMGZa?= =?utf-8?B?bG9tVDZyZGh5S0hWOXdVajlIcHNuVGZwbjJMRk01RGRUV05iRmVEMHNKZ00x?= =?utf-8?B?NmE4YnFQKzJwTmljZWhUUXFWRjRKUHkzRUFFaUR1UmdyOUxHb3lCZUJVS2g3?= =?utf-8?B?Vitqc2FreHJxdTVKUmNyS2hLUXQzV1pGT0JkS2lpa25MYnFQQTJrcnJWVER4?= =?utf-8?B?ellib0s5Zkh2Nkd6aklQWjcwSXpDb1NIb2FDMXNMWnMzcTJzVy9xd1psR0Jo?= =?utf-8?B?b0FBMHJvWC9tZVdmd2duLzErNjVFQ0ZLU21RSVZzSW9iTDRacnQyNG96UXRj?= =?utf-8?B?ZjlDWTAvcHZTc25BZzRkT2Y4RzY1RDd4L0xBSk5tamlRcXdmeXF4Vk9WdkU0?= =?utf-8?B?a3Bxc2pFNG5DMTFQcERrdTh4KzljYzlna0tkdm8zaTloSnZsTEpJKzI0MGYr?= =?utf-8?B?c0p4SWVLMVFxaklGalhOc2lKMVlTWDBYVEVjYmZwR2Z6Nndwckw4ZVk5NnhW?= =?utf-8?B?a3dMcWFiSUQ5NGcrUmt5NmhJWWs2UXlXaGY5SXhkL1FBRjg4bUtFYmFueTFq?= =?utf-8?B?ZEIzR1JxTlVUcmw3NEp1NTVKTkFFYm1LZFpUYzVIN2x6bDZnc0hMeWdmcElJ?= =?utf-8?B?SUxlRHlTZGhobHV4ajY1bjdXSk04bjBhRjJweE5qTVpLV0Z5T3ROWXFiRWh4?= =?utf-8?B?UkIvY2kwMnIzbUtFVDNZbldBV2h3c2JIODUzV1JrZVRBd0lpZkNsWHc4V2M2?= =?utf-8?B?VGhYajZJL0VBRmZPSkFLekRKbUErZ3ByWVNmSjAwL0VTT2pvRXArMXNQeXhB?= =?utf-8?B?TVdrRTVMTll4UHZZdWg4YkpLbWozQTFGNW1HbCtma3ZLaUlXQTE3MXhHejZr?= =?utf-8?B?VWVGWHJ2bEZNb01TYzJ1dnFUZk5rbEE1QVkvNVlZUHNueEh4OXM2TjEyWGdk?= =?utf-8?B?QnNRRjJVVGM1YTBZdEdIbEZxZ0tyTERRWUNVUjVsc0x5Q2FPY2piYmlVTnVL?= =?utf-8?B?endCR2R4aXJtQkptSGUvZE5XZXY4SDJFYmROZ1ZEWFU4ck1NWW8zOUNWYVJP?= =?utf-8?B?TGZOdjJweXNCa1QveHluZFFVWk1BWmJvOGZKUUMvOWRGRG82OWNkYlhwdFRs?= =?utf-8?B?OXBIRmlvb3ExbjdYZitKQkhZTWw3V2JWaXF6UnduSUJLOCtham1GVHlKa0Zo?= =?utf-8?B?NERRKzY5SVpKeCtlVFR1RFhTN0l0ZVJNeUcwSTJPYjFJeU5sbHBwSXVMdjFY?= =?utf-8?B?aXVxK0Z2RFo1QjFMU1h0RFJubWpjcWd4ekVtVW5vL0JRSTNyZXFXbCtWdm5H?= =?utf-8?B?N1dRQzZReFBhWXNaaVJtanM5Y0xzWDNaTnlDVURXUHJIUWxCSW5iejgzUVQz?= =?utf-8?B?dmNWc1ZqTzhLbXFTN2hma0ppQmlIQzBwc002Q2wwT2ljK1duSy9BRkVwYlpM?= =?utf-8?B?WVhoRlk4L3hHSWswSmpNa2RhU1c2bnRrWWhUeWpaMkxNemgyK3NJbWh3WXFm?= =?utf-8?B?czlmTVVHaW16OTQzOTFyOE41M05CL2ZvY25aWlVValFEWXQ0TUFMeVVoaUty?= =?utf-8?B?RmgzRnhmcTc2V0tGdE4zYWdoSmdieUxrd3k2QUZnMUJvME1wRi9VUUlad1li?= =?utf-8?B?ZkFXaTgxN1haeFBrNzAxRVNBOE5vTzU0b3grUUJFU2tTNWhuN0FIa0Zncm5x?= =?utf-8?B?SjhEM1ovNlB5SmxkR3lzUkNqcHlya1RIU0I0NjZaNFQ3NDdRLzFOenZwWnBG?= =?utf-8?B?aEZSUFE3SzVSdnYzNldiall2S2xvNVB6eXRYRmo0elVuaU05amgxRjhXMnFj?= =?utf-8?B?QnRqL2U2UzNLb29nQzJqajF0d01DNmpmM2w0eC9NNEJuTE92VUFKcmZIeTla?= =?utf-8?B?dDJWclduaUlXVUdNMCt1STRyNUZRdjNrb3E0UT09?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(7416014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 14:46:18.3484 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 296c6c8b-d4ff-4818-19b1-08ddf20b21eb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4351 Add AMD Zen5 support for address translation. Zen5 systems may be configured to use 'Normalized addresses'. Then, CXL endpoints use their own physical address space and are programmed passthrough (DPA =3D=3D HPA), the number of interleaving ways for the endpoint is set to one. The Host Physical Addresses (HPAs) need to be translated from the endpoint to its CXL host bridge. The HPA of a CXL host bridge is equivalent to the System Physical Address (SPA). ACPI Platform Runtime Mechanism (PRM) is used to translate the CXL Device Physical Address (DPA) to its System Physical Address. This is documented in: AMD Family 1Ah Models 00h=E2=80=930Fh and Models 10h=E2=80=931Fh ACPI v6.5 Porting Guide, Publication # 58088 https://www.amd.com/en/search/documentation/hub.html To implement AMD Zen5 address translation the following steps are needed: AMD Zen5 systems support the ACPI PRM CXL Address Translation firmware call (Address Translation - CXL DPA to System Physical Address, see ACPI v6.5 Porting Guide above) when address translation is enabled. The existence of the callback can be identified using a specific GUID as documented. The initialization code checks firmware and kernel support of ACPI PRM. Introduce a new file core/atl.c to handle ACPI PRM specific address translation code. Naming is loosely related to the kernel's AMD Address Translation Library (CONFIG_AMD_ATL) but implementation does not dependent on it, nor it is vendor specific. Use Kbuild and Kconfig options respectively to enable the code depending on architecture and platform options. Implement an ACPI PRM firmware call for CXL address translation in the new function cxl_prm_to_hpa(). This includes sanity checks. Enable the callback for applicable CXL host bridges using the new cxl_atl_init() function. Signed-off-by: Robert Richter Tested-by: Gregory Price --- drivers/cxl/Kconfig | 4 ++ drivers/cxl/core/Makefile | 1 + drivers/cxl/core/atl.c | 138 ++++++++++++++++++++++++++++++++++++++ drivers/cxl/core/core.h | 1 + drivers/cxl/core/port.c | 8 +++ 5 files changed, 152 insertions(+) create mode 100644 drivers/cxl/core/atl.c diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig index 48b7314afdb8..31f9c96ef908 100644 --- a/drivers/cxl/Kconfig +++ b/drivers/cxl/Kconfig @@ -233,4 +233,8 @@ config CXL_MCE def_bool y depends on X86_MCE && MEMORY_FAILURE =20 +config CXL_ATL + def_bool y + depends on ACPI_PRMT + endif diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile index 5ad8fef210b5..11fe272a6e29 100644 --- a/drivers/cxl/core/Makefile +++ b/drivers/cxl/core/Makefile @@ -20,3 +20,4 @@ cxl_core-$(CONFIG_CXL_REGION) +=3D region.o cxl_core-$(CONFIG_CXL_MCE) +=3D mce.o cxl_core-$(CONFIG_CXL_FEATURES) +=3D features.o cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) +=3D edac.o +cxl_core-$(CONFIG_CXL_ATL) +=3D atl.o diff --git a/drivers/cxl/core/atl.c b/drivers/cxl/core/atl.c new file mode 100644 index 000000000000..5fc21eddaade --- /dev/null +++ b/drivers/cxl/core/atl.c @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2025 Advanced Micro Devices, Inc. + */ + +#include +#include + +#include +#include "core.h" + +static bool check_prm_address_translation(struct cxl_port *port) +{ + /* Applies to CXL host bridges only */ + return !is_cxl_root(port) && port->host_bridge && + is_cxl_root(to_cxl_port(port->dev.parent)); +} + +/* + * PRM Address Translation - CXL DPA to System Physical Address + * + * Reference: + * + * AMD Family 1Ah Models 00h=E2=80=930Fh and Models 10h=E2=80=931Fh + * ACPI v6.5 Porting Guide, Publication # 58088 + */ + +static const guid_t prm_cxl_dpa_spa_guid =3D + GUID_INIT(0xee41b397, 0x25d4, 0x452c, 0xad, 0x54, 0x48, 0xc6, 0xe3, + 0x48, 0x0b, 0x94); + +struct prm_cxl_dpa_spa_data { + u64 dpa; + u8 reserved; + u8 devfn; + u8 bus; + u8 segment; + void *out; +} __packed; + +static u64 prm_cxl_dpa_spa(struct pci_dev *pci_dev, u64 dpa) +{ + struct prm_cxl_dpa_spa_data data; + u64 spa; + int rc; + + data =3D (struct prm_cxl_dpa_spa_data) { + .dpa =3D dpa, + .devfn =3D pci_dev->devfn, + .bus =3D pci_dev->bus->number, + .segment =3D pci_domain_nr(pci_dev->bus), + .out =3D &spa, + }; + + rc =3D acpi_call_prm_handler(prm_cxl_dpa_spa_guid, &data); + if (rc) { + pci_dbg(pci_dev, "failed to get SPA for %#llx: %d\n", dpa, rc); + return ULLONG_MAX; + } + + pci_dbg(pci_dev, "PRM address translation: DPA -> SPA: %#llx -> %#llx\n",= dpa, spa); + + return spa; +} + +static u64 cxl_prm_to_hpa(struct cxl_decoder *cxld, u64 hpa) +{ + struct cxl_memdev *cxlmd; + struct pci_dev *pci_dev; + struct cxl_port *port; + struct cxl_endpoint_decoder *cxled; + + /* Only translate from endpoint to its parent port. */ + if (!is_endpoint_decoder(&cxld->dev)) + return hpa; + + cxled =3D to_cxl_endpoint_decoder(&cxld->dev); + + /* + * Nothing to do if base is non-zero and Normalized Addressing + * is disabled. + */ + if (cxld->hpa_range.start !=3D cxled->dpa_res->start) + return hpa; + + /* + * Endpoints are programmed passthrough in Normalized + * Addressing mode. + */ + if (cxld->interleave_ways !=3D 1) { + dev_dbg(&cxld->dev, "unexpected interleaving config: ways: %d granularit= y: %d\n", + cxld->interleave_ways, cxld->interleave_granularity); + return ULLONG_MAX; + } + + if (hpa < cxld->hpa_range.start || hpa > cxld->hpa_range.end) { + dev_dbg(&cxld->dev, "hpa addr %#llx out of range %#llx-%#llx\n", + hpa, cxld->hpa_range.start, cxld->hpa_range.end); + return ULLONG_MAX; + } + + port =3D to_cxl_port(cxld->dev.parent); + cxlmd =3D port ? to_cxl_memdev(port->uport_dev) : NULL; + if (!port || !dev_is_pci(cxlmd->dev.parent)) { + dev_dbg(&cxld->dev, "No endpoint found: %s, range %#llx-%#llx\n", + dev_name(cxld->dev.parent), cxld->hpa_range.start, + cxld->hpa_range.end); + return ULLONG_MAX; + } + pci_dev =3D to_pci_dev(cxlmd->dev.parent); + + return prm_cxl_dpa_spa(pci_dev, hpa); +} + +static void cxl_prm_init(struct cxl_port *port) +{ + u64 spa; + struct prm_cxl_dpa_spa_data data =3D { .out =3D &spa, }; + int rc; + + if (!check_prm_address_translation(port)) + return; + + /* Check kernel (-EOPNOTSUPP) and firmware support (-ENODEV) */ + rc =3D acpi_call_prm_handler(prm_cxl_dpa_spa_guid, &data); + if (rc =3D=3D -EOPNOTSUPP || rc =3D=3D -ENODEV) + return; + + port->to_hpa =3D cxl_prm_to_hpa; + + dev_dbg(port->host_bridge, "PRM address translation enabled for %s.\n", + dev_name(&port->dev)); +} + +void cxl_atl_init(struct cxl_port *port) +{ + cxl_prm_init(port); +} diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index eac8cc1bdaa0..624e438d052a 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -150,6 +150,7 @@ int cxl_port_get_switch_dport_bandwidth(struct cxl_port= *port, int cxl_ras_init(void); void cxl_ras_exit(void); int cxl_gpf_port_setup(struct cxl_dport *dport); +void cxl_atl_init(struct cxl_port *port); =20 #ifdef CONFIG_CXL_FEATURES struct cxl_feat_entry * diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 8f36ff413f5d..8007e002888e 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -831,6 +831,12 @@ static void cxl_debugfs_create_dport_dir(struct cxl_dp= ort *dport) &cxl_einj_inject_fops); } =20 +static void setup_address_translation(struct cxl_port *port) +{ + if (IS_ENABLED(CONFIG_CXL_ATL)) + cxl_atl_init(port); +} + static int cxl_port_add(struct cxl_port *port, resource_size_t component_reg_phys, struct cxl_dport *parent_dport) @@ -868,6 +874,8 @@ static int cxl_port_add(struct cxl_port *port, return rc; } =20 + setup_address_translation(port); + rc =3D device_add(dev); if (rc) return rc; --=20 2.39.5