From nobody Thu Oct 2 19:40:17 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60119311586; Fri, 12 Sep 2025 12:25:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679925; cv=none; b=o5G8KMwxjywCbAfdF+AvDEKVkz7QMsjnOVmT5PyI8PSi6FrE+txtoFYZ8DnhawAiqtocJGAimIaFwT3GRVZk4TirdbaxQvKL/0yxADKExzbgbqZ0PgN+48U4tTt+DE8rpGow3i34jHSZX+7oWVI7BErYZNeEsJwNqHLVYeUojvQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679925; c=relaxed/simple; bh=ZcdHHOjr6w/+7SBqUPpnD4x7r6S1keqUXYAopj4SC4U=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=uS3mzaMpodYUWoNVCmk3MdLQJv/BOzcjJOZue7icXz4umKhALydlR07ldOk1DL5GF/V/3NwapuWSjyxrcxRP6D3zWHA5bFYcgPpkFr5gTOEcrEry3cMKXdvJwlKB5z4GHH7hSM3DtsSfIfW7VqEp9X0dM74zDyy7vcw92NcxP+g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=GdOWqbFA; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="GdOWqbFA" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58CCP0Fm968105; Fri, 12 Sep 2025 07:25:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757679900; bh=xkyghYoL/WFd/TQbtBpt5wxJ2U0314AhC/F/CN6/vD0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GdOWqbFADCc00cN1nU4PgUgvAdqVlT2tirur0NezSdJh85L6mUL+HBvaB62b3ENpV NTO1Pz/YawAcQ0YhoW1fKwLYKlFG/I1DrVsXhWtUIRrll8AojfsL+SbvXrfO7qAja3 mCo/Ph/z64QJU6k5l8BvMKecCOIgEkr7wbT1FhEk= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58CCP0Ts1969788 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 12 Sep 2025 07:25:00 -0500 Received: from DFLE203.ent.ti.com (10.64.6.61) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 12 Sep 2025 07:25:00 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE203.ent.ti.com (10.64.6.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:25:00 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLa3589278; Fri, 12 Sep 2025 07:24:53 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 08/10] PCI: keystone: Add ks_pcie_disable_error_irq() helper for cleanup Date: Fri, 12 Sep 2025 17:46:19 +0530 Message-ID: <20250912122356.3326888-9-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_disable_error_irq() to disable the error interrupts that have been enabled by ks_pcie_enable_error_irq(). Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-9-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pci-keystone.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 3a3188e89a2a..2da9feaaf9ee 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -329,6 +329,15 @@ static void ks_pcie_handle_intx_irq(struct keystone_pc= ie *ks_pcie, ks_pcie_app_writel(ks_pcie, IRQ_EOI, offset); } =20 +static void ks_pcie_disable_error_irq(struct keystone_pcie *ks_pcie) +{ + u32 val; + + val =3D ks_pcie_app_readl(ks_pcie, ERR_IRQ_ENABLE_SET); + val &=3D ~ERR_IRQ_ALL; + ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, val); +} + static void ks_pcie_enable_error_irq(struct keystone_pcie *ks_pcie) { ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, ERR_IRQ_ALL); --=20 2.43.0