From nobody Thu Oct 2 18:21:54 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16539285CBB; Fri, 12 Sep 2025 12:24:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679882; cv=none; b=HaRB9lVHdetTptjysZwgCWXv2oeuFHZ0urG8NqODg4VdpR/ZgdnTrG6sujdeabaqI3a1j0pUI0XZ1qu/W15kdCJHHBR5sdSqW61DSY/wUS7DH92Tl0rPsIyTuYaoNcCxFdJaoyjictAIuP8OZSespTTUvRhYhgq1uhL3TiI6ogM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679882; c=relaxed/simple; bh=+ioEaPsrf2CwCUWS4VOtc1FA1+YANGjmTjCyNrixHqk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mKLVlYZyVaP4oARV17Vxk8DjqUS7AmO6k/le7KEtARHR7I71RGqGyADq+EtDuIe+EDysXbP+Tvn3D8/R3eGcsFrR9TSN2GloRheHE4GPohOLqmQli/pGqy5DnMZR3AdYBRz5iDNUmIsKaBRLlQw698wnuMzX0KRFQ/umiIO6cEc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=p0NIyCeK; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="p0NIyCeK" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58CCOBjD517246; Fri, 12 Sep 2025 07:24:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757679851; bh=d3XdTXMqViHW3w0akxLE5zgfCKDRWCS1IEbV2e3TwRo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=p0NIyCeKeJOHH6wpTbvd9FkVF2uY/Jl3hsoV7NsT1McJn8qbJgsZJGOLEfzPOaQhE t07O4d5IBu8cGxLxgQWe53uwtH0V4aNFO/BFGsXEPgRPS8h2tCiJNyHlOagX6TSvbO DEa26VcrtMfTxTyE+NGq9xfnIWHEUOhK7aB7OSdw= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58CCOBxn1291279 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 12 Sep 2025 07:24:11 -0500 Received: from DLEE204.ent.ti.com (157.170.170.84) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 12 Sep 2025 07:24:10 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE204.ent.ti.com (157.170.170.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:24:10 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLT3589278; Fri, 12 Sep 2025 07:24:04 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 01/10] PCI: Export pci_get_host_bridge_device() for use by pci-keystone Date: Fri, 12 Sep 2025 17:46:12 +0530 Message-ID: <20250912122356.3326888-2-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The pci-keystone.c driver uses the 'pci_get_host_bridge_device()' helper. In preparation for enabling the pci-keystone.c driver to be built as a loadable module, export 'pci_get_host_bridge_device()'. Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-2-s-vadapalli@ti.com/ No changes since v1. drivers/pci/host-bridge.c | 1 + include/linux/pci.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c index afa50b446567..be5ef6516cff 100644 --- a/drivers/pci/host-bridge.c +++ b/drivers/pci/host-bridge.c @@ -33,6 +33,7 @@ struct device *pci_get_host_bridge_device(struct pci_dev = *dev) kobject_get(&bridge->kobj); return bridge; } +EXPORT_SYMBOL_GPL(pci_get_host_bridge_device); =20 void pci_put_host_bridge_device(struct device *dev) { diff --git a/include/linux/pci.h b/include/linux/pci.h index d1fdf81fbe1e..b253cbc27d36 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -646,6 +646,7 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t pr= iv); struct pci_host_bridge *devm_pci_alloc_host_bridge(struct device *dev, size_t priv); void pci_free_host_bridge(struct pci_host_bridge *bridge); +struct device *pci_get_host_bridge_device(struct pci_dev *dev); struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); =20 void pci_set_host_bridge_release(struct pci_host_bridge *bridge, --=20 2.43.0 From nobody Thu Oct 2 18:21:54 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E63AD302776; Fri, 12 Sep 2025 12:24:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679890; cv=none; b=AsbPO5X5VwXdVO/ShulOOJGi2nr2YQ1cpjJZ/S+ytQFRjYZx3gc+8KOvMllqA2zYlf6qHZ/4ipMkR4zVJbmQTTp7YJ4UbF32cFHA8Tjm+NmYPQtKhKHC4Nl7xgOefDdVTrwWNZ/TgXDQ7MxEe4CUTT3s2EsrjqLBUSCmD6h2Bs4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679890; c=relaxed/simple; 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Fri, 12 Sep 2025 07:24:17 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLU3589278; Fri, 12 Sep 2025 07:24:11 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 02/10] PCI: dwc: Export dw_pcie_allocate_domains() for pci-keystone Date: Fri, 12 Sep 2025 17:46:13 +0530 Message-ID: <20250912122356.3326888-3-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The pci-keystone.c driver uses the 'dw_pcie_allocate_domains()' helper. In preparation for enabling the pci-keystone.c driver to be built as a loadable module, export 'dw_pcie_allocate_domains()'. Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-3-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pcie-designware-host.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index 952f8594b501..3cc83d921376 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -229,6 +229,7 @@ int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) =20 return 0; } +EXPORT_SYMBOL_GPL(dw_pcie_allocate_domains); =20 void dw_pcie_free_msi(struct dw_pcie_rp *pp) { --=20 2.43.0 From nobody Thu Oct 2 18:21:54 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E54D32F617C; Fri, 12 Sep 2025 12:24:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679888; cv=none; b=mxh9pmWidcuvA57e+lguIsXKIpy0NrH2yJl4z7g5nYwZGxzbTbbVv+kbh2Jank1whOisH+JHo8aRBOCHa/oVTH2NH156GcvydJr0N0dBY6XRnDIBelkFtIdt04V0m8Rn/mrqpuqDSBJ7PgwD+9+lORolL2pB5tc+kbO3XyFziVs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679888; c=relaxed/simple; bh=Rgx1GvIwMLh688LHM4GBTxzehQd62fpaaJpFV614cvA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=L7tzBOSKrLiXFpbeFv/ut00ZLFNSjav7PW/RqwiZBGmKLB49MkWV44NORkaVBPtEwiQBjh19MTGgvHJArpze7/9l37aD95DlJre2zMDSqX/3Myr1ZBAPYwY6VvKeuASC7KdCw/MSqw/6lgZl3KRRkb637FlCb2t9T/u4AlE5MIk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=tewUMk2H; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="tewUMk2H" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58CCOPBL967959; Fri, 12 Sep 2025 07:24:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757679865; bh=pqDTwaoHFH/fcGY1igBafDBCN/IWj/jn4EnovKh1SuI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tewUMk2HpYVPiVcXkcmBK6UewUsL3w12oB+eNlZRSAw55qyL4aqJuyCDiIIxQ3s9z Z2KLnzzzHn2QzV8jU+zdPkk1EJ0SWulHjEKzGXRUZ+hjfVE18ApIQOVfgQfj5N0gJj H2X5x55kKhZR0VZMFnalz7mUiaWb2tyD5C2Qb7YI= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58CCOP2A1969681 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 12 Sep 2025 07:24:25 -0500 Received: from DFLE204.ent.ti.com (10.64.6.62) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 12 Sep 2025 07:24:24 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE204.ent.ti.com (10.64.6.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:24:24 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLV3589278; Fri, 12 Sep 2025 07:24:18 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 03/10] PCI: dwc: Add dw_pcie_free_domains() helper for cleanup Date: Fri, 12 Sep 2025 17:46:14 +0530 Message-ID: <20250912122356.3326888-4-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function dw_pcie_free_domains() which will undo the allocation performed by the dw_pcie_allocate_domains() function. Export this helper for the users of dw_pcie_allocate_domains(). Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-4-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pcie-designware-host.c | 9 +++++++++ drivers/pci/controller/dwc/pcie-designware.h | 5 +++++ 2 files changed, 14 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index 3cc83d921376..df55c0ed75e4 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -211,6 +211,15 @@ static const struct irq_domain_ops dw_pcie_msi_domain_= ops =3D { .free =3D dw_pcie_irq_domain_free, }; =20 +void dw_pcie_free_domains(struct dw_pcie_rp *pp) +{ + if (pp->irq_domain) { + irq_domain_remove(pp->irq_domain); + pp->irq_domain =3D NULL; + } +} +EXPORT_SYMBOL_GPL(dw_pcie_free_domains); + int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) { struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/con= troller/dwc/pcie-designware.h index a333ab0b0bbd..89659d05ab29 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -801,6 +801,7 @@ void dw_pcie_free_msi(struct dw_pcie_rp *pp); int dw_pcie_setup_rc(struct dw_pcie_rp *pp); int dw_pcie_host_init(struct dw_pcie_rp *pp); void dw_pcie_host_deinit(struct dw_pcie_rp *pp); +void dw_pcie_free_domains(struct dw_pcie_rp *pp); int dw_pcie_allocate_domains(struct dw_pcie_rp *pp); void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int d= evfn, int where); @@ -845,6 +846,10 @@ static inline void dw_pcie_host_deinit(struct dw_pcie_= rp *pp) { } =20 +static inline void dw_pcie_free_domains(struct dw_pcie_rp *pp) +{ +} + static inline int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) { return 0; --=20 2.43.0 From nobody Thu Oct 2 18:21:54 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6D80301031; Fri, 12 Sep 2025 12:24:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; 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Fri, 12 Sep 2025 07:24:32 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE207.ent.ti.com (157.170.170.95) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:24:32 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLW3589278; Fri, 12 Sep 2025 07:24:25 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 04/10] PCI: dwc: ep: Export dw_pcie_ep_raise_msix_irq() for pci-keystone Date: Fri, 12 Sep 2025 17:46:15 +0530 Message-ID: <20250912122356.3326888-5-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The pci-keystone.c driver uses the 'dw_pcie_ep_raise_msix_irq()' helper. In preparation for enabling the pci-keystone.c driver to be built as a loadable module, export 'dw_pcie_ep_raise_msix_irq()'. Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-5-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pcie-designware-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/= controller/dwc/pcie-designware-ep.c index 7f2112c2fb21..19571ac2b961 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -797,6 +797,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8= func_no, =20 return 0; } +EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_msix_irq); =20 /** * dw_pcie_ep_cleanup - Cleanup DWC EP resources after fundamental reset --=20 2.43.0 From nobody Thu Oct 2 18:21:54 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EBF65309DC1; Fri, 12 Sep 2025 12:24:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679900; cv=none; b=L9XT7YMeXrI+fwWcntRoXRw9s2BcY1Iq98cLHl55P98qEwYlYGWh5/gVclykGZfPNJyEgcyxiKfS9uW/we1MT0Hfe6DTQ8480/VMvguEhdaUs73LB1H+9ROGRvQaFUbB7JzlZyrXkDxuGuJwJY2Pt90lmiX0xoM2l2mWhVxxFlE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679900; c=relaxed/simple; bh=hjEjo1uLoOWxAHax+AlLFxg47ht5MuU75YE0ZPcRkNY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qUxbkv0mCT78J3MlI5jbaGMUpFNnDolfaygaTS4QY1t/zGWdbuLB31+78rrUhPB8OTR+3BsVfN56SqYcbW/RKvyBUGtkQPtZ5dydft10U7MLY1X2pUYXkUiEHo7DwV+d6Pf9H1xdGoehTPBAq68C85O70vuilM/gsAz0FMh9wPo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=L+A+bOhv; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="L+A+bOhv" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58CCOdU81030262; Fri, 12 Sep 2025 07:24:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757679879; bh=1b/F6WA6EQOMUHO5172BD3euAaLVPBGiusexrCvLpJU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=L+A+bOhvijc7F1Pm0hASmWo2WFks9qFqfVEG4SFZZy6cybEsdQ0dqLiaK2cLzLRHt rLsB75TLNOa7/nGreq7I7BqChTt+3Db3gEv5b177OW6FxHMMHKbim+lRoLIqfsQ2t6 IhbCjFW40wuDreOTqVJ9pQO8BU/gwNbWL8LcSG44= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58CCOdP32760539 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 12 Sep 2025 07:24:39 -0500 Received: from DLEE201.ent.ti.com (157.170.170.76) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 12 Sep 2025 07:24:39 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE201.ent.ti.com (157.170.170.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:24:39 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLX3589278; Fri, 12 Sep 2025 07:24:32 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 05/10] PCI: keystone: Add ks_pcie_free_msi_irq() helper for cleanup Date: Fri, 12 Sep 2025 17:46:16 +0530 Message-ID: <20250912122356.3326888-6-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_free_msi_irq() which will undo the configuration performed by the ks_pcie_config_msi_irq() function. This will be required for implementing a future helper function to undo the configuration performed by the ks_pcie_host_init() function. Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-6-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pci-keystone.c | 25 +++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index d03e95bf7d54..81c3686688c0 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -666,6 +666,31 @@ static void ks_pcie_intx_irq_handler(struct irq_desc *= desc) chained_irq_exit(chip, desc); } =20 +static void ks_pcie_free_msi_irq(struct keystone_pcie *ks_pcie) +{ + struct device_node *np =3D ks_pcie->np; + struct device_node *intc_np; + int irq_count, irq, i; + + if (!IS_ENABLED(CONFIG_PCI_MSI)) + return; + + /* Nothing to do if MSI Interrupt Controller does not exist */ + intc_np =3D of_get_child_by_name(np, "msi-interrupt-controller"); + if (!intc_np) + return; + + /* irq_count should be non-zero. Else, ks_pcie_host_init would have faile= d. */ + irq_count =3D of_irq_count(intc_np); + + for (i =3D 0; i < irq_count; i++) { + /* We expect to get an irq since it succeeded during 'config'. */ + irq =3D irq_of_parse_and_map(intc_np, i); + irq_set_chained_handler(irq, NULL); + } + of_node_put(intc_np); +} + static int ks_pcie_config_msi_irq(struct keystone_pcie *ks_pcie) { struct device *dev =3D ks_pcie->pci->dev; --=20 2.43.0 From nobody Thu Oct 2 18:21:54 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C0A23019AC; Fri, 12 Sep 2025 12:25:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679918; cv=none; b=LHP5vXgIwopyS+WUkWuHiG2Zt3zj7E6ig17QIMnArbqBA2/TI7I5M8k/eS27b7pdmU1+8KAdOSZ0iRUa4KBdTocDVLRBU452vHxCn34ozGfeVf4Q6tuvF1+D4cJjWMKvY8r8qXWJVm8Fcd6BUdJlE6XtBc9eIAAM00wiPe9bjRc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679918; c=relaxed/simple; bh=lOl1bORjgtUVblIfSnhHhHV6S3RXTIIydyYBHH+vI90=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=DzvkG6wGXm2jN1ozOUPQ5g16wctB3+PD6ULMoQshzhmA/+Tw63aFIkbPbomQCIdoOuEFKN+upb2b4VkLz5Z5M3aE3VJRYWJLLmVdlXPRByUzOZ5aFFYZv0dgM2nIcbq0ePoVD1ii9nsMxd7dbzjqApG6vU+FPzAzC3p6BC5I2FE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=SFDYyMZu; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="SFDYyMZu" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58CCOkQ11030270; Fri, 12 Sep 2025 07:24:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757679886; bh=akHgpV0QofSJh7+9oJVQtZLcV4mul4y96HgMakofh04=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SFDYyMZuL/p17Zovwj5vhVROb6DWXPCjna7kNgtW0JhBYEpUY8imhcRAi4wjd3NQO BcOW0sKgZkiKeddP6JVN25nNmyR5UTtdR1QBOILm8zCpSi38Sh/iw8BnlUt8k0m1Q3 J8LwDK1c/ZiK7MmPEMEihl/1SrhItHkqlrnBnzxM= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58CCOk9a1291380 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 12 Sep 2025 07:24:46 -0500 Received: from DLEE210.ent.ti.com (157.170.170.112) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 12 Sep 2025 07:24:46 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE210.ent.ti.com (157.170.170.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:24:46 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLY3589278; Fri, 12 Sep 2025 07:24:39 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 06/10] PCI: keystone: Add ks_pcie_free_intx_irq() helper for cleanup Date: Fri, 12 Sep 2025 17:46:17 +0530 Message-ID: <20250912122356.3326888-7-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_free_intx_irq() which will undo the configuration performed by the ks_pcie_config_intx_irq() function. This will be required for implementing a future helper function to undo the configuration performed by the ks_pcie_host_init() function. Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-7-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pci-keystone.c | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 81c3686688c0..074566fb1d74 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -745,6 +745,35 @@ static int ks_pcie_config_msi_irq(struct keystone_pcie= *ks_pcie) return ret; } =20 +static void ks_pcie_free_intx_irq(struct keystone_pcie *ks_pcie) +{ + struct device_node *np =3D ks_pcie->np; + struct device_node *intc_np; + int irq_count, i; + u32 val; + + /* Nothing to do if INTx Interrupt Controller does not exist */ + intc_np =3D of_get_child_by_name(np, "legacy-interrupt-controller"); + if (!intc_np) + return; + + /* irq_count should be non-zero. Else, ks_pcie_host_init would have faile= d. */ + irq_count =3D of_irq_count(intc_np); + + /* Disable all legacy interrupts */ + for (i =3D 0; i < PCI_NUM_INTX; i++) { + val =3D ks_pcie_app_readl(ks_pcie, IRQ_ENABLE_SET(i)); + val &=3D ~INTx_EN; + ks_pcie_app_writel(ks_pcie, IRQ_ENABLE_SET(i), val); + } + + irq_domain_remove(ks_pcie->intx_irq_domain); + for (i =3D 0; i < irq_count; i++) + irq_set_chained_handler(ks_pcie->intx_host_irqs[i], NULL); + + of_node_put(intc_np); +} + static int ks_pcie_config_intx_irq(struct keystone_pcie *ks_pcie) { struct device *dev =3D ks_pcie->pci->dev; --=20 2.43.0 From nobody Thu Oct 2 18:21:55 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49EDC30FC2B; Fri, 12 Sep 2025 12:25:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679921; cv=none; b=FWbd5tmHY9T+MIEB2gkKVZ1wnlqUGLz22KGQl0V/ObMAEddALT8xo+kAdw0CHpvf/WmLRd1If5MkftCOSYqM0A+qGnfPeTTnv9bt/9WGfEGNY2xu2UJkRo/idPfkCqzfs6/OMECeQAObv/+LYbukIXiDv+MsCB4+dVtzGBB5Ijk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679921; c=relaxed/simple; bh=0Mu2TfwYTvGNT0/SOuznU8Xo9nEgevesqabtorRMzNY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=r0Se2xe795M2LKzMqv3HC+hRPbIRIYveA1Tms9hpHl9RpouNZSqONVZpBVP39pH6USttsR0zXav3pK0hbyc8SqCPT84OGgrWsValLqI7Gm2+OzWSD7N+NV10tRhTg3vo0v6tmY50dQZKEiW5myZsy7gr/DsAAxn4xsZFVHY1ojY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=bFgUuti5; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="bFgUuti5" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58CCOrbn517286; Fri, 12 Sep 2025 07:24:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757679893; bh=vj2uaDJCxGQbaAM5o1tES0SUnARreMitm6wm4PP1R30=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=bFgUuti5l61jeacjYH7OkeHcu6S6d9/GAcx/aiKxVI93iaBFlotTTLz3E3IbscnsP CpkCje3swMwqyiNLrPoUoQ7YpGltPGsSLFzD3eCF01J4soG1vkfs9tYK8whgX5Y3O6 AfSy9QCMy8vqnrzSOwsj+kLjc/zjtxDSJHojY8lY= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58CCOrtr1969762 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 12 Sep 2025 07:24:53 -0500 Received: from DLEE200.ent.ti.com (157.170.170.75) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 12 Sep 2025 07:24:53 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE200.ent.ti.com (157.170.170.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:24:53 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLZ3589278; Fri, 12 Sep 2025 07:24:46 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 07/10] PCI: keystone: Add ks_pcie_host_deinit() helper for cleanup Date: Fri, 12 Sep 2025 17:46:18 +0530 Message-ID: <20250912122356.3326888-8-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_host_deinit() to undo the configuration performed by the ks_pcie_host_init() function and also to free the MSI Domains if the '.msi_init' callback was implemented which would have made a call to dw_pcie_allocate_domains(). Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-8-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pci-keystone.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 074566fb1d74..3a3188e89a2a 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -885,6 +885,18 @@ static int ks_pcie_init_id(struct keystone_pcie *ks_pc= ie) return 0; } =20 +static void ks_pcie_host_deinit(struct dw_pcie_rp *pp) +{ + struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); + struct keystone_pcie *ks_pcie =3D to_keystone_pcie(pci); + + ks_pcie_stop_link(pci); + ks_pcie_free_msi_irq(ks_pcie); + ks_pcie_free_intx_irq(ks_pcie); + if (pci->pp.ops->msi_init) + dw_pcie_free_domains(pp); +} + static int ks_pcie_host_init(struct dw_pcie_rp *pp) { struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); @@ -929,11 +941,13 @@ static int ks_pcie_host_init(struct dw_pcie_rp *pp) =20 static const struct dw_pcie_host_ops ks_pcie_host_ops =3D { .init =3D ks_pcie_host_init, + .deinit =3D ks_pcie_host_deinit, .msi_init =3D ks_pcie_msi_host_init, }; =20 static const struct dw_pcie_host_ops ks_pcie_am654_host_ops =3D { .init =3D ks_pcie_host_init, + .deinit =3D ks_pcie_host_deinit, }; =20 static irqreturn_t ks_pcie_err_irq_handler(int irq, void *priv) --=20 2.43.0 From nobody Thu Oct 2 18:21:55 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60119311586; Fri, 12 Sep 2025 12:25:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679925; cv=none; b=o5G8KMwxjywCbAfdF+AvDEKVkz7QMsjnOVmT5PyI8PSi6FrE+txtoFYZ8DnhawAiqtocJGAimIaFwT3GRVZk4TirdbaxQvKL/0yxADKExzbgbqZ0PgN+48U4tTt+DE8rpGow3i34jHSZX+7oWVI7BErYZNeEsJwNqHLVYeUojvQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679925; c=relaxed/simple; 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Fri, 12 Sep 2025 07:25:00 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLa3589278; Fri, 12 Sep 2025 07:24:53 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 08/10] PCI: keystone: Add ks_pcie_disable_error_irq() helper for cleanup Date: Fri, 12 Sep 2025 17:46:19 +0530 Message-ID: <20250912122356.3326888-9-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Introduce the helper function ks_pcie_disable_error_irq() to disable the error interrupts that have been enabled by ks_pcie_enable_error_irq(). Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-9-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pci-keystone.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 3a3188e89a2a..2da9feaaf9ee 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -329,6 +329,15 @@ static void ks_pcie_handle_intx_irq(struct keystone_pc= ie *ks_pcie, ks_pcie_app_writel(ks_pcie, IRQ_EOI, offset); } =20 +static void ks_pcie_disable_error_irq(struct keystone_pcie *ks_pcie) +{ + u32 val; + + val =3D ks_pcie_app_readl(ks_pcie, ERR_IRQ_ENABLE_SET); + val &=3D ~ERR_IRQ_ALL; + ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, val); +} + static void ks_pcie_enable_error_irq(struct keystone_pcie *ks_pcie) { ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, ERR_IRQ_ALL); --=20 2.43.0 From nobody Thu Oct 2 18:21:55 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62B6A3009F1; Fri, 12 Sep 2025 12:25:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679931; cv=none; b=NvdjfIJomqvqOQaDOjwxtCC8bj+4XZWnBC3uAKQlno9E0mAhi++pm6jCDqErt97us3P9j5bFop6gW42A5t4K999pUdL6AD9zQPW+EERAPCDgIunWsnxadkrPcY3J5ucd1ETGGmbElLE0L4In44prMu6fz/AkViD0CckvoI60lOc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679931; c=relaxed/simple; bh=uAmLqt2uYW6hGY3CCbjNVJwY2tGhzkjYsKl26ulAF1Y=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=rUXIhtDfCf4xymNYgND1pVJI1GyzjEhe4PGQ/VdHi64+diNrJhwm43DwBj1LIQYH8+9SmtlnX0Fy7cdJohMTpKkVLFONAQobd0EyNV3+6Gm8k2m+i8PPLskcg4spp0+/XvcPkIRKmgPhghPNnHOEMYRJYx3w7ZZI/zQtViZLbzQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=rDToLn5f; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="rDToLn5f" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58CCP85t517320; Fri, 12 Sep 2025 07:25:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757679908; bh=twQ/qDEYavg0CzDuS8LI1uuNmhbFxWRYMM68N+ELTS8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rDToLn5foQeG4gqx7PEjuuMdZQFOm2U67cDhQHwTDku6j6C46vNwDTA5bxIj1NRtD u8MJAq7ui5ol3bXrz/hpbpGrx1/05NXtC9nnlCn0/ci73xWLmiu4EekbTinQqElHu1 cPt68ORYxZlQFaPDpML0OgDIt2pe7B3ucjE4Zr8g= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58CCP8sJ1849867 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 12 Sep 2025 07:25:08 -0500 Received: from DLEE210.ent.ti.com (157.170.170.112) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 12 Sep 2025 07:25:07 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE210.ent.ti.com (157.170.170.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:25:07 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLb3589278; Fri, 12 Sep 2025 07:25:00 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 09/10] PCI: keystone: Exit ks_pcie_probe() for the default switch-case of "mode" Date: Fri, 12 Sep 2025 17:46:20 +0530 Message-ID: <20250912122356.3326888-10-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" In ks_pcie_probe(), the switch-case for the "mode" is used to configure the PCIe Controller for either Root-Complex or Endpoint mode of operation. Prior to the switch-case statement for "mode" an invalid mode will result in probe failure only if "dw_pcie_ver_is_ge(pci, 480A)" is true, which is the case for the AM654 platform. On the other hand, when that is not the case, "ks_pcie_set_mode()" will be invoked, which does not validate the mode. As a result, it is possible for the switch-case statement for "mode" to receive an invalid mode. Currently, an error message is displayed in the "default" case where "mode" is neither "DW_PCIE_RC_TYPE" nor "DW_PCIE_EP_TYPE", but the probe succeeds. However, since the configuration required for Root-Complex and Endpoint mode have not been performed, the Controller is not operational. Fix this by exiting "ks_pcie_probe()" with the return value of "-EINVAL" in addition to displaying the existing error message. Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-11-s-vadapalli@ti.com/ No changes since v1. drivers/pci/controller/dwc/pci-keystone.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 2da9feaaf9ee..e85942b4f6be 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -1414,6 +1414,8 @@ static int ks_pcie_probe(struct platform_device *pdev) break; default: dev_err(dev, "INVALID device type %d\n", mode); + ret =3D -EINVAL; + goto err_get_sync; } =20 ks_pcie_enable_error_irq(ks_pcie); --=20 2.43.0 From nobody Thu Oct 2 18:21:55 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18F0D303A13; Fri, 12 Sep 2025 12:25:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679940; cv=none; b=X2JfBKZ8mL5xHh6/rKbIxAf31bEnQdT7p/rCMx274wyY2+N/pziwZh1OzzNhozd/daVdF1aApWeTqr7x96Fw5JYt7Uq4R3l5W65lhFHa6GoRHKZAz089E4AOV4rmKeULkU5RZTgweiOJwULFxRZbjl6j69HfdZ2eRRVhk0tkJD8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757679940; c=relaxed/simple; bh=3P3PAZ/ZvvSohXI8QCKB1SR20xpdsKjkvrAi8p8Li3g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kSSelVlqTQuuQAZbgKm25qiFZAItj1MW/SDL5rw/DEAOxSSrKruPn/bJTv9Ds7mfxokX8j5Bz6FW294AC2w869VkBJwwDsE2akS6dF0hQihd59OmGldeRFcFDhUjDXuF2HG73nk2TUKcOY2oYR5CITwdLFE39wdeRBRGbFcodPo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=sga40TPb; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="sga40TPb" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58CCPE65968259; Fri, 12 Sep 2025 07:25:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757679914; bh=W3wNqasuPPpJNRZvnxmgSVHOkxs2jXZ6/IsjcnNJii8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=sga40TPbvjpvMJSKV3OTySsYpLMeyuYrTyLC7WNggLMultoS43/tpiKtMCAzfBXQS fniBw15seitUR9P2KOIQXTYBwZ06SqUOl1gNhQeGz24W2MYo46s7sr4TpAOSGkCCIA KHUgLc/KoT4EKWnuRU4cWXztv04tche0ZphoEkus= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58CCPEX91291704 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 12 Sep 2025 07:25:14 -0500 Received: from DLEE201.ent.ti.com (157.170.170.76) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 12 Sep 2025 07:25:14 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE201.ent.ti.com (157.170.170.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Fri, 12 Sep 2025 07:25:14 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.231.84]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58CCNuLc3589278; Fri, 12 Sep 2025 07:25:07 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , <18255117159@163.com>, CC: , , , , , Subject: [PATCH v2 10/10] PCI: keystone: Add support to build as a loadable module Date: Fri, 12 Sep 2025 17:46:21 +0530 Message-ID: <20250912122356.3326888-11-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912122356.3326888-1-s-vadapalli@ti.com> References: <20250912122356.3326888-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The 'pci-keystone.c' driver is the application/glue/wrapper driver for the Designware PCIe Controllers on TI SoCs. Now that all of the helper APIs that the 'pci-keystone.c' driver depends upon have been exported for use, enable support to build the driver as a loadable module. Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20250903124505.365913-12-s-vadapalli@ti.com/ Changes since v1: - Based on the feedback from Manivannan Sadhasivam at: https://lore.kernel.org/r/2gzqupa7i7qhiscwm4uin2jmdb6qowp55mzk7w4o3f73ob6= 4e7@taf5vjd7lhc5/ builtin_platform_driver() is being retained in the driver due to which the change made in the v1 patch of replacing builtin_platform_driver() with module_platform_driver() has been discarded in this patch. drivers/pci/controller/dwc/Kconfig | 6 +++--- drivers/pci/controller/dwc/pci-keystone.c | 22 ++++++++++++++++++++++ 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dw= c/Kconfig index 34abc859c107..46012d6a607e 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -482,10 +482,10 @@ config PCI_DRA7XX_EP This uses the DesignWare core. =20 config PCI_KEYSTONE - bool + tristate =20 config PCI_KEYSTONE_HOST - bool "TI Keystone PCIe controller (host mode)" + tristate "TI Keystone PCIe controller (host mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -497,7 +497,7 @@ config PCI_KEYSTONE_HOST DesignWare core functions to implement the driver. =20 config PCI_KEYSTONE_EP - bool "TI Keystone PCIe controller (endpoint mode)" + tristate "TI Keystone PCIe controller (endpoint mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index e85942b4f6be..661e31b60a48 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -132,6 +133,7 @@ struct keystone_pcie { struct device_node *msi_intc_np; struct irq_domain *intx_irq_domain; struct device_node *np; + struct gpio_desc *reset_gpio; =20 /* Application register space */ void __iomem *va_app_base; /* DT 1st resource */ @@ -1211,6 +1213,7 @@ static const struct of_device_id ks_pcie_of_match[] = =3D { }, { }, }; +MODULE_DEVICE_TABLE(of, ks_pcie_of_match); =20 static int ks_pcie_probe(struct platform_device *pdev) { @@ -1329,6 +1332,7 @@ static int ks_pcie_probe(struct platform_device *pdev) dev_err(dev, "Failed to get reset GPIO\n"); goto err_link; } + ks_pcie->reset_gpio =3D gpiod; =20 /* Obtain references to the PHYs */ for (i =3D 0; i < num_lanes; i++) @@ -1440,9 +1444,23 @@ static void ks_pcie_remove(struct platform_device *p= dev) { struct keystone_pcie *ks_pcie =3D platform_get_drvdata(pdev); struct device_link **link =3D ks_pcie->link; + struct dw_pcie *pci =3D ks_pcie->pci; int num_lanes =3D ks_pcie->num_lanes; + const struct ks_pcie_of_data *data; struct device *dev =3D &pdev->dev; + enum dw_pcie_device_mode mode; + + ks_pcie_disable_error_irq(ks_pcie); + data =3D of_device_get_match_data(dev); + mode =3D data->mode; + if (mode =3D=3D DW_PCIE_RC_TYPE) { + dw_pcie_host_deinit(&pci->pp); + } else { + pci_epc_deinit_notify(pci->ep.epc); + dw_pcie_ep_deinit(&pci->ep); + } =20 + gpiod_set_value_cansleep(ks_pcie->reset_gpio, 0); pm_runtime_put(dev); pm_runtime_disable(dev); ks_pcie_disable_phy(ks_pcie); @@ -1459,3 +1477,7 @@ static struct platform_driver ks_pcie_driver =3D { }, }; builtin_platform_driver(ks_pcie_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("PCIe host controller driver for Texas Instruments Keys= tone SoCs"); +MODULE_AUTHOR("Murali Karicheri "); --=20 2.43.0