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(unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 229880974; Fri, 12 Sep 2025 16:59:02 +0800 (GMT+08:00) From: Damon Ding To: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, jingoohan1@gmail.com, inki.dae@samsung.com, sw0312.kim@samsung.com, kyungmin.park@samsung.com, krzk@kernel.org, alim.akhtar@samsung.com, hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, dmitry.baryshkov@oss.qualcomm.com, dianders@chromium.org, m.szyprowski@samsung.com, luca.ceresoli@bootlin.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, Damon Ding Subject: [PATCH v5 02/17] drm/bridge: analogix_dp: Move &drm_bridge_funcs.mode_set to &drm_bridge_funcs.atomic_enable Date: Fri, 12 Sep 2025 16:58:31 +0800 Message-Id: <20250912085846.7349-3-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250912085846.7349-1-damon.ding@rock-chips.com> References: <20250912085846.7349-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a993d2646cc03a3kunm813a8c8ea45b33 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGktNTVZCSR1LTxpMSUlCQ0NWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSEpKQk 1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=Zbo6mOcNxm6e+nxPNjhDjfj3odewHBMVoe2Z9f29PEEeYCDou/c/eFoyIctHsaD5w5YF76i2UUI9Lsa/zyBEfIz+WX32NUBPMJDIptfbirjImtvmkd99Z/FW2cvmJ0tbcvf9az2AJ1rea+dc/bBbPOcLcOvgmDTBIJKwjgCtKd4=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=5rT3Uj90o6n1MAWl76/V/H3c62dOJ056k8A1rPD+vgg=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" According to the include/drm/drm_bridge.h, the callback &drm_bridge_funcs.mode_set is deprecated and it should be better to include the mode setting in the &drm_bridge_funcs.atomic_enable instead. Signed-off-by: Damon Ding Reviewed-by: Dmitry Baryshkov --- .../drm/bridge/analogix/analogix_dp_core.c | 161 +++++++++--------- 1 file changed, 82 insertions(+), 79 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/g= pu/drm/bridge/analogix/analogix_dp_core.c index 0d7941d37771..e08511e8c9d5 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1086,12 +1086,88 @@ static int analogix_dp_set_bridge(struct analogix_d= p_device *dp) return ret; } =20 +static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge, + const struct drm_display_mode *mode) +{ + struct analogix_dp_device *dp =3D to_dp(bridge); + struct drm_display_info *display_info =3D &dp->connector.display_info; + struct video_info *video =3D &dp->video_info; + struct device_node *dp_node =3D dp->dev->of_node; + int vic; + + /* Input video interlaces & hsync pol & vsync pol */ + video->interlaced =3D !!(mode->flags & DRM_MODE_FLAG_INTERLACE); + video->v_sync_polarity =3D !!(mode->flags & DRM_MODE_FLAG_NVSYNC); + video->h_sync_polarity =3D !!(mode->flags & DRM_MODE_FLAG_NHSYNC); + + /* Input video dynamic_range & colorimetry */ + vic =3D drm_match_cea_mode(mode); + if ((vic =3D=3D 6) || (vic =3D=3D 7) || (vic =3D=3D 21) || (vic =3D=3D 22= ) || + (vic =3D=3D 2) || (vic =3D=3D 3) || (vic =3D=3D 17) || (vic =3D=3D 18= )) { + video->dynamic_range =3D CEA; + video->ycbcr_coeff =3D COLOR_YCBCR601; + } else if (vic) { + video->dynamic_range =3D CEA; + video->ycbcr_coeff =3D COLOR_YCBCR709; + } else { + video->dynamic_range =3D VESA; + video->ycbcr_coeff =3D COLOR_YCBCR709; + } + + /* Input vide bpc and color_formats */ + switch (display_info->bpc) { + case 12: + video->color_depth =3D COLOR_12; + break; + case 10: + video->color_depth =3D COLOR_10; + break; + case 8: + video->color_depth =3D COLOR_8; + break; + case 6: + video->color_depth =3D COLOR_6; + break; + default: + video->color_depth =3D COLOR_8; + break; + } + if (display_info->color_formats & DRM_COLOR_FORMAT_YCBCR444) + video->color_space =3D COLOR_YCBCR444; + else if (display_info->color_formats & DRM_COLOR_FORMAT_YCBCR422) + video->color_space =3D COLOR_YCBCR422; + else + video->color_space =3D COLOR_RGB; + + /* + * NOTE: those property parsing code is used for providing backward + * compatibility for samsung platform. + * Due to we used the "of_property_read_u32" interfaces, when this + * property isn't present, the "video_info" can keep the original + * values and wouldn't be modified. + */ + of_property_read_u32(dp_node, "samsung,color-space", + &video->color_space); + of_property_read_u32(dp_node, "samsung,dynamic-range", + &video->dynamic_range); + of_property_read_u32(dp_node, "samsung,ycbcr-coeff", + &video->ycbcr_coeff); + of_property_read_u32(dp_node, "samsung,color-depth", + &video->color_depth); + if (of_property_read_bool(dp_node, "hsync-active-high")) + video->h_sync_polarity =3D true; + if (of_property_read_bool(dp_node, "vsync-active-high")) + video->v_sync_polarity =3D true; + if (of_property_read_bool(dp_node, "interlaced")) + video->interlaced =3D true; +} + static void analogix_dp_bridge_atomic_enable(struct drm_bridge *bridge, struct drm_atomic_state *old_state) { struct analogix_dp_device *dp =3D to_dp(bridge); struct drm_crtc *crtc; - struct drm_crtc_state *old_crtc_state; + struct drm_crtc_state *old_crtc_state, *new_crtc_state; int timeout_loop =3D 0; int ret; =20 @@ -1099,6 +1175,11 @@ static void analogix_dp_bridge_atomic_enable(struct = drm_bridge *bridge, if (!crtc) return; =20 + new_crtc_state =3D drm_atomic_get_new_crtc_state(old_state, crtc); + if (!new_crtc_state) + return; + analogix_dp_bridge_mode_set(bridge, &new_crtc_state->adjusted_mode); + old_crtc_state =3D drm_atomic_get_old_crtc_state(old_state, crtc); /* Not a full enable, just disable PSR and continue */ if (old_crtc_state && old_crtc_state->self_refresh_active) { @@ -1205,83 +1286,6 @@ static void analogix_dp_bridge_atomic_post_disable(s= truct drm_bridge *bridge, DRM_ERROR("Failed to enable psr (%d)\n", ret); } =20 -static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge, - const struct drm_display_mode *orig_mode, - const struct drm_display_mode *mode) -{ - struct analogix_dp_device *dp =3D to_dp(bridge); - struct drm_display_info *display_info =3D &dp->connector.display_info; - struct video_info *video =3D &dp->video_info; - struct device_node *dp_node =3D dp->dev->of_node; - int vic; - - /* Input video interlaces & hsync pol & vsync pol */ - video->interlaced =3D !!(mode->flags & DRM_MODE_FLAG_INTERLACE); - video->v_sync_polarity =3D !!(mode->flags & DRM_MODE_FLAG_NVSYNC); - video->h_sync_polarity =3D !!(mode->flags & DRM_MODE_FLAG_NHSYNC); - - /* Input video dynamic_range & colorimetry */ - vic =3D drm_match_cea_mode(mode); - if ((vic =3D=3D 6) || (vic =3D=3D 7) || (vic =3D=3D 21) || (vic =3D=3D 22= ) || - (vic =3D=3D 2) || (vic =3D=3D 3) || (vic =3D=3D 17) || (vic =3D=3D 18= )) { - video->dynamic_range =3D CEA; - video->ycbcr_coeff =3D COLOR_YCBCR601; - } else if (vic) { - video->dynamic_range =3D CEA; - video->ycbcr_coeff =3D COLOR_YCBCR709; - } else { - video->dynamic_range =3D VESA; - video->ycbcr_coeff =3D COLOR_YCBCR709; - } - - /* Input vide bpc and color_formats */ - switch (display_info->bpc) { - case 12: - video->color_depth =3D COLOR_12; - break; - case 10: - video->color_depth =3D COLOR_10; - break; - case 8: - video->color_depth =3D COLOR_8; - break; - case 6: - video->color_depth =3D COLOR_6; - break; - default: - video->color_depth =3D COLOR_8; - break; - } - if (display_info->color_formats & DRM_COLOR_FORMAT_YCBCR444) - video->color_space =3D COLOR_YCBCR444; - else if (display_info->color_formats & DRM_COLOR_FORMAT_YCBCR422) - video->color_space =3D COLOR_YCBCR422; - else - video->color_space =3D COLOR_RGB; - - /* - * NOTE: those property parsing code is used for providing backward - * compatibility for samsung platform. - * Due to we used the "of_property_read_u32" interfaces, when this - * property isn't present, the "video_info" can keep the original - * values and wouldn't be modified. - */ - of_property_read_u32(dp_node, "samsung,color-space", - &video->color_space); - of_property_read_u32(dp_node, "samsung,dynamic-range", - &video->dynamic_range); - of_property_read_u32(dp_node, "samsung,ycbcr-coeff", - &video->ycbcr_coeff); - of_property_read_u32(dp_node, "samsung,color-depth", - &video->color_depth); - if (of_property_read_bool(dp_node, "hsync-active-high")) - video->h_sync_polarity =3D true; - if (of_property_read_bool(dp_node, "vsync-active-high")) - video->v_sync_polarity =3D true; - if (of_property_read_bool(dp_node, "interlaced")) - video->interlaced =3D true; -} - static const struct drm_bridge_funcs analogix_dp_bridge_funcs =3D { .atomic_duplicate_state =3D drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state =3D drm_atomic_helper_bridge_destroy_state, @@ -1290,7 +1294,6 @@ static const struct drm_bridge_funcs analogix_dp_brid= ge_funcs =3D { .atomic_enable =3D analogix_dp_bridge_atomic_enable, .atomic_disable =3D analogix_dp_bridge_atomic_disable, .atomic_post_disable =3D analogix_dp_bridge_atomic_post_disable, - .mode_set =3D analogix_dp_bridge_mode_set, .attach =3D analogix_dp_bridge_attach, }; =20 --=20 2.34.1