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Fri, 12 Sep 2025 09:47:11 -0700 (PDT) Received: from [127.0.1.1] ([46.53.240.27]) by smtp.googlemail.com with ESMTPSA id a640c23a62f3a-b07c337e785sm229786066b.25.2025.09.12.09.47.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Sep 2025 09:47:10 -0700 (PDT) From: Dzmitry Sankouski Date: Fri, 12 Sep 2025 19:47:03 +0300 Subject: [PATCH v3 3/3] arch: arm64: dts: qcom: sdm845-starqltechn: fix max77705 interrupts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250912-starqltechn-correct_max77705_nodes-v3-3-4ce9f694ecd9@gmail.com> References: <20250912-starqltechn-correct_max77705_nodes-v3-0-4ce9f694ecd9@gmail.com> In-Reply-To: <20250912-starqltechn-correct_max77705_nodes-v3-0-4ce9f694ecd9@gmail.com> To: Chanwoo Choi , Krzysztof Kozlowski , Lee Jones , Rob Herring , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Konrad Dybcio , Dzmitry Sankouski X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757695624; l=2075; i=dsankouski@gmail.com; s=20240619; h=from:subject:message-id; bh=Wdm08EMxHowe+0+mJzP63NKr1uwq70hOA6Ki2Hqxf6o=; b=hS4I7dnxRbG+ysuZp6N+mtNFzY53m0BYtow1zdjEfzBBPBfwa+tB2dc4pGnbdHjShwDLHhT1x ZaELJes2HjNB6ft/Y/pHGx5raoRUYJNMuLxrQ4uajCAYMsrE3AdMjNI X-Developer-Key: i=dsankouski@gmail.com; a=ed25519; pk=YJcXFcN1EWrzBYuiE2yi5Mn6WLn6L1H71J+f7X8fMag= Since max77705 has a register, which indicates interrupt source, it acts as an interrupt controller. Direct MAX77705's subdevices to use the IC's internal interrupt controller, instead of listening to every interrupt fired by the chip towards the host device. Signed-off-by: Dzmitry Sankouski --- Changes for v2: - fix commit message to be more clear Changes for v2: - fix commit msg header prefix to 'arm64: dts: qcom: sdm845-starqltechn:' - remove binding header for interrupt numbers - make interrupt-cells 1, because irq trigger type is not used --- arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts b/arch= /arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts index 8a1e4c76914c..597e25d27d76 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts @@ -584,13 +584,15 @@ &uart9 { &i2c14 { status =3D "okay"; =20 - pmic@66 { + max77705: pmic@66 { compatible =3D "maxim,max77705"; reg =3D <0x66>; interrupt-parent =3D <&pm8998_gpios>; interrupts =3D <11 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; pinctrl-0 =3D <&pmic_int_default>; pinctrl-names =3D "default"; + #interrupt-cells =3D <1>; =20 leds { compatible =3D "maxim,max77705-rgb"; @@ -629,8 +631,8 @@ max77705_charger: charger@69 { reg =3D <0x69>; compatible =3D "maxim,max77705-charger"; monitored-battery =3D <&battery>; - interrupt-parent =3D <&pm8998_gpios>; - interrupts =3D <11 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent =3D <&max77705>; + interrupts =3D <0>; }; =20 fuel-gauge@36 { @@ -638,8 +640,8 @@ fuel-gauge@36 { compatible =3D "maxim,max77705-battery"; power-supplies =3D <&max77705_charger>; maxim,rsns-microohm =3D <5000>; - interrupt-parent =3D <&pm8998_gpios>; - interrupts =3D <11 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent =3D <&max77705>; + interrupts =3D <2>; }; }; =20 --=20 2.39.5