From nobody Thu Oct 2 19:28:03 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1D2733A004; Fri, 12 Sep 2025 18:38:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757702299; cv=pass; b=Kvaz2eyjlcvpgULqCmShoLFwfTZsGdS4WdKcbARMYW1CdZtb/am9p7TIlSXttbkLI2eEPwaAtWurpPe4sNbgw+xaF9Xb+DZNNbR5Ga49gNd9bA/A7m6eJeVcLRPlCvQ+PlSr9FBsPmEeBswLjAblPVi6k1erqoWGOvP8DgwMkuQ= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757702299; c=relaxed/simple; bh=drrwRIWbT/6jTbyDuHbWwnUu/ItZ1Sdr3GaC8JKkbaM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tPxxUcnN1P0/wUiejhrTrmjVt0AijpfXfovyRCM531d0Iwt9HRLyr6bmZOn+hXDo7ojROcUxJSIz3/FihT1dsvGJ6wMLG+xSIAkwOqMBpDTCowgLKz3PhC0J5i+4m5UYFukeGQzo6Pq83MBUjWJopuw5sSk4VnQKGkjrVSi984k= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=UmNxMtxo; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="UmNxMtxo" ARC-Seal: i=1; a=rsa-sha256; t=1757702274; cv=none; d=zohomail.com; s=zohoarc; b=G5NKDoUWA7fUF6oU8rPcNYu1AON7niiwV0XRbLDfvWv39oQmjol/MEgnDxzCbLF3rLpjubQ0wdGFouwFIKxbnzxpBEo/yAYFJCPYoiwdMIBIQa7+7POL2gCNxqdBS/X+0BdZXSh4E804/8eIoQamDJumfRxcSWJdPO5y6VmM488= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1757702274; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=SYOU/8VrDAp+vsF12aSnGJc7uo89fJ6a5IP9fscM8+4=; b=Mhn2Iz3Pwacrnc73OySUCJ3IcbZV/iwS6tcIkrVH3XXhToBnbPcm0VBKhArr2rqeVXXiyvGbalfAkiYlncqjhJRQyQ8oyVJae1JmJBGc1Xp9E1/aQtgW/gJPaQJKh7ATmN5VWesf3cGrpeJHGvz2cuwqcvPI8Zhcv5sJSzj3hM4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1757702274; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=SYOU/8VrDAp+vsF12aSnGJc7uo89fJ6a5IP9fscM8+4=; b=UmNxMtxocGD6PV00JP1QPGSyhPJ08T0XNONQcW7XeB9I/zcWsuP6q+ZQTPyGjuSj R9Bz0dCHNHYisE4k/Zm+8DCnakmDvUjuB9HIDX9McEhDPtcFuUtzFJLYG5ALvWKZlZz y1qTNZPe9gcyCVB7dfk4Ffa6XcuPF5XLLV6AO8Bc= Received: by mx.zohomail.com with SMTPS id 1757702273859380.4056309139387; Fri, 12 Sep 2025 11:37:53 -0700 (PDT) From: Nicolas Frattaroli Date: Fri, 12 Sep 2025 20:37:03 +0200 Subject: [PATCH v2 04/10] dt-bindings: mailbox: Add MT8196 GPUEB Mailbox Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250912-mt8196-gpufreq-v2-4-779a8a3729d9@collabora.com> References: <20250912-mt8196-gpufreq-v2-0-779a8a3729d9@collabora.com> In-Reply-To: <20250912-mt8196-gpufreq-v2-0-779a8a3729d9@collabora.com> To: AngeloGioacchino Del Regno , Boris Brezillon , Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Jassi Brar , Kees Cook , "Gustavo A. R. Silva" , Chia-I Wu , Chen-Yu Tsai Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, linux-hardening@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB", acting as glue logic to control power and frequency of the Mali GPU. This MCU runs special-purpose firmware for this use, and the main application processor communicates with it through a mailbox. Add a binding that describes this mailbox. Signed-off-by: Nicolas Frattaroli Acked-by: Conor Dooley --- .../mailbox/mediatek,mt8196-gpueb-mbox.yaml | 64 ++++++++++++++++++= ++++ 1 file changed, 64 insertions(+) diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpue= b-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpu= eb-mbox.yaml new file mode 100644 index 0000000000000000000000000000000000000000..56508f406fce88c7c1699aa67b5= 7394fc7b1c357 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.= yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-gpueb-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MFlexGraphics GPUEB Mailbox Controller + +maintainers: + - Nicolas Frattaroli + +properties: + compatible: + enum: + - mediatek,mt8196-gpueb-mbox + + reg: + items: + - description: mailbox data registers + - description: mailbox control registers + + reg-names: + items: + - const: data + - const: ctl + + clocks: + items: + - description: main clock of the GPUEB MCU + + interrupts: + items: + - description: fires when a new message is received + + "#mbox-cells": + const: 1 + description: + The number of the mailbox channel. + +required: + - compatible + - reg + - reg-names + - clocks + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + #include + #include + #include + + gpueb_mbox: mailbox@4b09fd80 { + compatible =3D "mediatek,mt8196-gpueb-mbox"; + reg =3D <0x4b09fd80 0x280>, + <0x4b170000 0x7c>; + reg-names =3D "data", "ctl"; + clocks =3D <&topckgen CLK_TOP_MFG_EB>; + interrupts =3D ; + #mbox-cells =3D <1>; + }; --=20 2.51.0