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This patch introduces scmi_clk_imx_set_spread_spectrum to pass SS configuration to the SCMI firmware, which handles the actual implementation. To ensure this feature is only enabled on NXP platforms, scmi_clk_imx_extended_config_oem is added. Since SS is only applicable to PLL clocks, config_oem_get is used to verify SS support for a given clock. i.MX95 SCMI firmware Spread Spectrum extConfigValue definition is as below, no modulation method because firmware forces to use down spread. extConfigValue[7:0] - spread percentage (%) extConfigValue[23:8] - Modulation Frequency (KHz) extConfigValue[24] - Enable/Disable extConfigValue[31:25] - Reserved Signed-off-by: Peng Fan --- drivers/clk/clk-scmi.c | 64 +++++++++++++++++++++++++++++++++++++++= +--- include/linux/scmi_protocol.h | 5 ++++ 2 files changed, 65 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index d2408403283fc72f0cf902e65f4c08bcbc7b4b0b..bb5e20dab18e92932ab4b99192b= 496e0c4d96417 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include =20 #define NOT_ATOMIC false @@ -23,6 +24,7 @@ enum scmi_clk_feats { SCMI_CLK_RATE_CTRL_SUPPORTED, SCMI_CLK_PARENT_CTRL_SUPPORTED, SCMI_CLK_DUTY_CYCLE_SUPPORTED, + SCMI_CLK_IMX_SSC_SUPPORTED, SCMI_CLK_FEATS_COUNT }; =20 @@ -98,6 +100,35 @@ static int scmi_clk_set_parent(struct clk_hw *hw, u8 pa= rent_index) return scmi_proto_clk_ops->parent_set(clk->ph, clk->id, parent_index); } =20 +static int scmi_clk_imx_set_spread_spectrum(struct clk_hw *hw, + struct clk_spread_spectrum *clk_ss) +{ + struct scmi_clk *clk =3D to_scmi_clk(hw); + int ret; + u32 val; + + /* + * extConfigValue[7:0] - spread percentage (%) + * extConfigValue[23:8] - Modulation Frequency + * extConfigValue[24] - Enable/Disable + * extConfigValue[31:25] - Reserved + */ + val =3D FIELD_PREP(SCMI_CLOCK_IMX_SS_PERCENTAGE_MASK, clk_ss->spread_bp /= 10000); + val |=3D FIELD_PREP(SCMI_CLOCK_IMX_SS_MOD_FREQ_MASK, clk_ss->modfreq_hz); + if (clk_ss->method !=3D CLK_SSC_NO_SPREAD) + val |=3D SCMI_CLOCK_IMX_SS_ENABLE_MASK; + ret =3D scmi_proto_clk_ops->config_oem_set(clk->ph, clk->id, + SCMI_CLOCK_CFG_IMX_SSC, + val, false); + if (ret) + dev_warn(clk->dev, + "Failed to set spread spectrum(%u,%u,%u) for clock ID %d\n", + clk_ss->modfreq_hz, clk_ss->spread_bp, clk_ss->method, + clk->id); + + return ret; +} + static u8 scmi_clk_get_parent(struct clk_hw *hw) { struct scmi_clk *clk =3D to_scmi_clk(hw); @@ -316,11 +347,33 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long = feats_key) ops->set_duty_cycle =3D scmi_clk_set_duty_cycle; } =20 + if (feats_key & BIT(SCMI_CLK_IMX_SSC_SUPPORTED)) + ops->set_spread_spectrum =3D scmi_clk_imx_set_spread_spectrum; + return ops; } =20 +static void scmi_clk_imx_extended_config_oem(const struct scmi_handle *han= dle, + struct scmi_clk *sclk, + unsigned int *feats_key) +{ + int ret; + u32 val; + + if (strcmp(handle->version->vendor_id, SCMI_IMX_VENDOR) || + strcmp(handle->version->sub_vendor_id, SCMI_IMX_SUBVENDOR)) + return; + + ret =3D scmi_proto_clk_ops->config_oem_get(sclk->ph, sclk->id, + SCMI_CLOCK_CFG_IMX_SSC, + &val, NULL, false); + if (!ret) + *feats_key |=3D BIT(SCMI_CLK_IMX_SSC_SUPPORTED); +} + /** * scmi_clk_ops_select() - Select a proper set of clock operations + * @handle: A reference to an SCMI entity * @sclk: A reference to an SCMI clock descriptor * @atomic_capable: A flag to indicate if atomic mode is supported by the * transport @@ -345,8 +398,8 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long fe= ats_key) * NULL otherwise. */ static const struct clk_ops * -scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable, - unsigned int atomic_threshold_us, +scmi_clk_ops_select(const struct scmi_handle *handle, struct scmi_clk *scl= k, + bool atomic_capable, unsigned int atomic_threshold_us, const struct clk_ops **clk_ops_db, size_t db_size) { const struct scmi_clock_info *ci =3D sclk->info; @@ -370,9 +423,12 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic= _capable, if (!ci->parent_ctrl_forbidden) feats_key |=3D BIT(SCMI_CLK_PARENT_CTRL_SUPPORTED); =20 - if (ci->extended_config) + if (ci->extended_config) { feats_key |=3D BIT(SCMI_CLK_DUTY_CYCLE_SUPPORTED); =20 + scmi_clk_imx_extended_config_oem(handle, sclk, &feats_key); + } + if (WARN_ON(feats_key >=3D db_size)) return NULL; =20 @@ -459,7 +515,7 @@ static int scmi_clocks_probe(struct scmi_device *sdev) * to avoid sharing the devm_ allocated clk_ops between multiple * SCMI clk driver instances. */ - scmi_ops =3D scmi_clk_ops_select(sclk, transport_is_atomic, + scmi_ops =3D scmi_clk_ops_select(handle, sclk, transport_is_atomic, atomic_threshold_us, scmi_clk_ops_db, ARRAY_SIZE(scmi_clk_ops_db)); diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index aafaac1496b06a6e4f0ca32eee58a9edf7d4a70f..37f422b4b1ef2af2b4231a16771= 61aa24e07d0e2 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -80,9 +80,14 @@ enum scmi_clock_oem_config { SCMI_CLOCK_CFG_DUTY_CYCLE =3D 0x1, SCMI_CLOCK_CFG_PHASE, SCMI_CLOCK_CFG_OEM_START =3D 0x80, + SCMI_CLOCK_CFG_IMX_SSC =3D 0x80, SCMI_CLOCK_CFG_OEM_END =3D 0xFF, }; =20 +#define SCMI_CLOCK_IMX_SS_PERCENTAGE_MASK GENMASK(7, 0) +#define SCMI_CLOCK_IMX_SS_MOD_FREQ_MASK GENMASK(23, 8) +#define SCMI_CLOCK_IMX_SS_ENABLE_MASK BIT(24) + /** * struct scmi_clk_proto_ops - represents the various operations provided * by SCMI Clock Protocol --=20 2.37.1