From nobody Thu Oct 2 21:54:44 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69D51314A70; Thu, 11 Sep 2025 10:30:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757586638; cv=none; b=s7wUA+0xwSKtJFXQTooa4iU5MP9y0IghVUCsRDtEnhuuVjK29O1puLKcPAbXlrMsZNjxQ83v5ZjqJOgJtyQcDLQJKkiwLJV0WB8ThVczlaYs6h69yUX4jt6xYi6hY//+iiJMEjuzyCxIaTf+KNwL/G6zDdTSyZrPgX3FS8nk3io= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757586638; c=relaxed/simple; bh=mL1keaVcCmXR44t5ETTNVeSTJ2vYgXxd4jL1GRNcLM4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Q/UJV8m5xFHwscsrvL0b8x5DHFbcyGQkGmg6WhYf0qFF2R4BZWGiYLiOe/5iRJQ19dmqO9+syoOv5wzwwDafTqGCpnf6XCrGWAzPHC0U1KsIMRbxXg16FYmfG1PubIU2/IFsQSXXHFx4MJC3dpaiZFR8wqffXbt0drOY0qAnGAk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=o1kWxlVo; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="o1kWxlVo" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58BAU5xu726609; Thu, 11 Sep 2025 05:30:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757586605; bh=nyTFgo2j2zQqNxj8tbajA2Qe6oVyfqpx1oJa6xWNvKk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=o1kWxlVovFNDTj9AQeVyjNc05eVad519Jx7Hqi0PPQ6HZAIIG5fEDwoEItEw7kv9i bCyNNS7FBPWPRvWs4PoqFJv8xdMbsL5IUYlOjur339R0DxnOh2Ou3L1AkVdh67D3ve mKkYWvH2IwXtoVFgaLP02/azGNJD7PIhxSnpih7Q= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58BAU5vQ1876793 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Thu, 11 Sep 2025 05:30:05 -0500 Received: from DLEE213.ent.ti.com (157.170.170.116) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Thu, 11 Sep 2025 05:30:04 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE213.ent.ti.com (157.170.170.116) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Thu, 11 Sep 2025 05:30:04 -0500 Received: from ws.dhcp.ti.com (ws.dhcp.ti.com [172.24.233.149]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58BASXbq1985821; Thu, 11 Sep 2025 05:29:57 -0500 From: Rishikesh Donadkar To: , , CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v7 12/16] media: ti: j721e-csi2rx: Submit all available buffers Date: Thu, 11 Sep 2025 15:58:28 +0530 Message-ID: <20250911102832.1583440-13-r-donadkar@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250911102832.1583440-1-r-donadkar@ti.com> References: <20250911102832.1583440-1-r-donadkar@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" From: Jai Luthra We already make sure to submit all available buffers to DMA in each DMA completion callback. Move that logic in a separate function, and use it during stream start as well, as most application queue all their buffers before stream on. Signed-off-by: Jai Luthra Reviewed-by: Tomi Valkeinen Reviewed-by: Yemike Abhilash Chandra Co-developed-by: Rishikesh Donadkar Signed-off-by: Rishikesh Donadkar --- .../platform/ti/j721e-csi2rx/j721e-csi2rx.c | 45 ++++++++++--------- 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/driver= s/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c index f0c6f931bfc7..45d652e4304c 100644 --- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c +++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c @@ -672,11 +672,32 @@ static int ti_csi2rx_drain_dma(struct ti_csi2rx_ctx *= ctx) return ret; } =20 +static int ti_csi2rx_dma_submit_pending(struct ti_csi2rx_ctx *ctx) +{ + struct ti_csi2rx_dma *dma =3D &ctx->dma; + struct ti_csi2rx_buffer *buf; + int ret =3D 0; + + /* If there are more buffers to process then start their transfer. */ + while (!list_empty(&dma->queue)) { + buf =3D list_entry(dma->queue.next, struct ti_csi2rx_buffer, list); + ret =3D ti_csi2rx_start_dma(ctx, buf); + if (ret) { + dev_err(ctx->csi->dev, + "Failed to queue the next buffer for DMA\n"); + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); + list_del(&buf->list); + } else { + list_move_tail(&buf->list, &dma->submitted); + } + } + return ret; +} + static void ti_csi2rx_dma_callback(void *param) { struct ti_csi2rx_buffer *buf =3D param; struct ti_csi2rx_ctx *ctx =3D buf->ctx; - struct ti_csi2rx_dev *csi =3D ctx->csi; struct ti_csi2rx_dma *dma =3D &ctx->dma; unsigned long flags; =20 @@ -693,18 +714,7 @@ static void ti_csi2rx_dma_callback(void *param) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); list_del(&buf->list); =20 - /* If there are more buffers to process then start their transfer. */ - while (!list_empty(&dma->queue)) { - buf =3D list_entry(dma->queue.next, struct ti_csi2rx_buffer, list); - - if (ti_csi2rx_start_dma(ctx, buf)) { - dev_err(csi->dev, "Failed to queue the next buffer for DMA\n"); - list_del(&buf->list); - vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); - } else { - list_move_tail(&buf->list, &dma->submitted); - } - } + ti_csi2rx_dma_submit_pending(ctx); =20 if (list_empty(&dma->submitted)) dma->state =3D TI_CSI2RX_DMA_IDLE; @@ -962,7 +972,6 @@ static int ti_csi2rx_start_streaming(struct vb2_queue *= vq, unsigned int count) struct ti_csi2rx_ctx *ctx =3D vb2_get_drv_priv(vq); struct ti_csi2rx_dev *csi =3D ctx->csi; struct ti_csi2rx_dma *dma =3D &ctx->dma; - struct ti_csi2rx_buffer *buf; unsigned long flags; int ret =3D 0; =20 @@ -1001,16 +1010,13 @@ static int ti_csi2rx_start_streaming(struct vb2_que= ue *vq, unsigned int count) ctx->sequence =3D 0; =20 spin_lock_irqsave(&dma->lock, flags); - buf =3D list_entry(dma->queue.next, struct ti_csi2rx_buffer, list); =20 - ret =3D ti_csi2rx_start_dma(ctx, buf); + ret =3D ti_csi2rx_dma_submit_pending(ctx); if (ret) { - dev_err(csi->dev, "Failed to start DMA: %d\n", ret); spin_unlock_irqrestore(&dma->lock, flags); - goto err_pipeline; + goto err_dma; } =20 - list_move_tail(&buf->list, &dma->submitted); dma->state =3D TI_CSI2RX_DMA_ACTIVE; spin_unlock_irqrestore(&dma->lock, flags); =20 @@ -1025,7 +1031,6 @@ static int ti_csi2rx_start_streaming(struct vb2_queue= *vq, unsigned int count) =20 err_dma: ti_csi2rx_stop_dma(ctx); -err_pipeline: video_device_pipeline_stop(&ctx->vdev); writel(0, csi->shim + SHIM_CNTL); writel(0, csi->shim + SHIM_DMACNTX(ctx->idx)); --=20 2.34.1