From nobody Thu Oct 2 21:55:29 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 460062C327D; Thu, 11 Sep 2025 07:57:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757577470; cv=none; b=tEMSN45Jip+kJsjYlipRJ+e3Kx+VLhpQLDYPfbmx7nECkoejihoAn4qrr3R02UpSGgSDXzwuD7qUg+8Ey9vwe/M1CBpNECUs0wSJzy6VsBBSAz7BbHx6oAsqIEmT/yPLmYrCTElMafvdHcKIWcqvlvuuCzinZGHYWmjR/gpNFgM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757577470; c=relaxed/simple; bh=IAxgNbJGd3/oP9q1FLQX9YXGLqA1E1HjfwvAaKjpyHI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=HyCXmD/yU5q2rmACYsc4BNNWWd4ezEcfUIFO+Dw+NvIt5FvGnj0kTFxAEW2xU77B4bT3prZPMqJJJvihS+yHHsMjmsQ0kJYfc6CDkaB0x4aap1uPCo8dA6QBlrrolkgKDBBanEXi4BcCbbcnW0y54gu9l1iFrHYqxxvOHSyv64E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=m9xynmmo; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="m9xynmmo" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1757577469; x=1789113469; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IAxgNbJGd3/oP9q1FLQX9YXGLqA1E1HjfwvAaKjpyHI=; b=m9xynmmo2eVQwaZ0VCOr89ZE4IWh6BwNwWvc6zXk3EfRp6ACnFqCf0WZ I2tOYYvfcjk3XrIsFqfvA3M2i1GU84RjJxu/61IPmxGENT+cp7/seNupG T7KslAdoryN5L/+O5NEjCgeQ6uOXjjqSGFYj87V1YJuR2XJzzMKfVqN+L hu1Bu0XotZj4epG3yP4H+OsmDGBvh7Fdt99wnh7Ev+ka1bT7pDMvRcf2G OiMsgKXOoWQ4xZjb8HE7gNmt3pvWL1FdsbQlgQpVrQ+cu3YUQIyM1X0S7 SaBSxvu1wKHOeT0eNUmWyk7WW+NOSFQZTAZkY7N72DmMxT+pniNokRPRh Q==; X-CSE-ConnectionGUID: Xmk+WQxbS5yK/puVGEgc6Q== X-CSE-MsgGUID: 3mO7qcr8TC+4yjyXatrrog== X-IronPort-AV: E=McAfee;i="6800,10657,11549"; a="70999287" X-IronPort-AV: E=Sophos;i="6.18,256,1751266800"; d="scan'208";a="70999287" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2025 00:57:28 -0700 X-CSE-ConnectionGUID: gmapQe/zSUKriqtkGuXbwg== X-CSE-MsgGUID: W5vBlPAvSlSbgBpu2YqvCQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,256,1751266800"; d="scan'208";a="173186230" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.245.187]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2025 00:57:19 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: linux-pci@vger.kernel.org, Bjorn Helgaas , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , =?UTF-8?q?Christian=20K=C3=B6nig?= , =?UTF-8?q?Micha=C5=82=20Winiarski?= , Alex Deucher , amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen , Lucas De Marchi , Rodrigo Vivi , Simona Vetter , Tvrtko Ursulin , ?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org, =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 05/11] PCI: Add pci_rebar_size_supported() helper Date: Thu, 11 Sep 2025 10:55:59 +0300 Message-Id: <20250911075605.5277-6-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250911075605.5277-1-ilpo.jarvinen@linux.intel.com> References: <20250911075605.5277-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Many callers of pci_rebar_get_possible_sizes() are interested in finding out if a particular BAR Size (PCIe r6.2 sec. 7.8.6.3) is supported by the particular BAR. Add pci_rebar_size_supported() into PCI core to make it easy for the drivers to determine if the BAR Size is supported or not. Use the new function in pci_resize_resource() and in pci_iov_vf_bar_set_size(). Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/iov.c | 7 +------ drivers/pci/rebar.c | 29 +++++++++++++++++++++++------ include/linux/pci.h | 1 + 3 files changed, 25 insertions(+), 12 deletions(-) diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index ac4375954c94..51844a9176a0 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c @@ -1334,7 +1334,6 @@ EXPORT_SYMBOL_GPL(pci_sriov_configure_simple); */ int pci_iov_vf_bar_set_size(struct pci_dev *dev, int resno, int size) { - u32 sizes; int ret; =20 if (!pci_resource_is_iov(resno)) @@ -1343,11 +1342,7 @@ int pci_iov_vf_bar_set_size(struct pci_dev *dev, int= resno, int size) if (pci_iov_is_memory_decoding_enabled(dev)) return -EBUSY; =20 - sizes =3D pci_rebar_get_possible_sizes(dev, resno); - if (!sizes) - return -ENOTSUPP; - - if (!(sizes & BIT(size))) + if (!pci_rebar_size_supported(dev, resno, size)) return -EINVAL; =20 ret =3D pci_rebar_set_size(dev, resno, size); diff --git a/drivers/pci/rebar.c b/drivers/pci/rebar.c index 64315dd8b6bb..735d9afd6ab1 100644 --- a/drivers/pci/rebar.c +++ b/drivers/pci/rebar.c @@ -3,6 +3,7 @@ * PCI Resizable BAR Extended Capability handling. */ =20 +#include #include #include #include @@ -124,6 +125,27 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev,= int bar) } EXPORT_SYMBOL(pci_rebar_get_possible_sizes); =20 +/** + * pci_rebar_size_supported - check if size is supported for BAR + * @pdev: PCI device + * @bar: BAR to check + * @size: size as defined in the PCIe spec (0=3D1MB, 31=3D128TB) + * + * Return: %true if @bar is resizable and @size is a supported, otherwise + * %false. + */ +bool pci_rebar_size_supported(struct pci_dev *pdev, int bar, int size) +{ + u64 sizes; + + sizes =3D pci_rebar_get_possible_sizes(pdev, bar); + if (!sizes) + return false; + + return BIT(size) & sizes; +} +EXPORT_SYMBOL_GPL(pci_rebar_size_supported); + /** * pci_rebar_get_current_size - get the current size of a Resizable BAR * @pdev: PCI device @@ -231,7 +253,6 @@ int pci_resize_resource(struct pci_dev *dev, int resno,= int size) struct resource *res =3D pci_resource_n(dev, resno); struct pci_host_bridge *host; int old, ret; - u32 sizes; =20 /* Check if we must preserve the firmware's resource assignment */ host =3D pci_find_host_bridge(dev->bus); @@ -245,11 +266,7 @@ int pci_resize_resource(struct pci_dev *dev, int resno= , int size) if (pci_resize_is_memory_decoding_enabled(dev, resno)) return -EBUSY; =20 - sizes =3D pci_rebar_get_possible_sizes(dev, resno); - if (!sizes) - return -ENOTSUPP; - - if (!(sizes & BIT(size))) + if (!pci_rebar_size_supported(dev, resno, size)) return -EINVAL; =20 old =3D pci_rebar_get_current_size(dev, resno); diff --git a/include/linux/pci.h b/include/linux/pci.h index 6f0c31290675..917c3b897739 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1423,6 +1423,7 @@ void pci_release_resource(struct pci_dev *dev, int re= sno); int pci_rebar_bytes_to_size(u64 bytes); resource_size_t pci_rebar_size_to_bytes(int size); u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar); +bool pci_rebar_size_supported(struct pci_dev *pdev, int bar, int size); int __must_check pci_resize_resource(struct pci_dev *dev, int i, int size); =20 int pci_select_bars(struct pci_dev *dev, unsigned long flags); --=20 2.39.5