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a=openpgp; fpr=20997BF613E7EF6D5FFDBA2FE7218A68D412C2B5 Remove file documentation from stih407-c8sectpfe driver. Signed-off-by: Raphael Gallais-Pou --- .../bindings/media/stih407-c8sectpfe.txt | 88 ------------------= ---- 1 file changed, 88 deletions(-) diff --git a/Documentation/devicetree/bindings/media/stih407-c8sectpfe.txt = b/Documentation/devicetree/bindings/media/stih407-c8sectpfe.txt deleted file mode 100644 index 880d4d70c9fd741ac13101721ced18f04336c373..000000000000000000000000000= 0000000000000 --- a/Documentation/devicetree/bindings/media/stih407-c8sectpfe.txt +++ /dev/null @@ -1,88 +0,0 @@ -STMicroelectronics STi c8sectpfe binding -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D - -This document describes the c8sectpfe device bindings that is used to get = transport -stream data into the SoC on the TS pins, and into DDR for further processi= ng. - -It is typically used in conjunction with one or more demodulator and tuner= devices -which converts from the RF to digital domain. Demodulators and tuners are = usually -located on an external DVB frontend card connected to SoC TS input pins. - -Currently 7 TS input (tsin) channels are supported on the stih407 family S= oC. - -Required properties (controller (parent) node): -- compatible : Should be "stih407-c8sectpfe" - -- reg : Address and length of register sets for each device in - "reg-names" - -- reg-names : The names of the register addresses corresponding to the - registers filled in "reg": - - c8sectpfe: c8sectpfe registers - - c8sectpfe-ram: c8sectpfe internal sram - -- clocks : phandle list of c8sectpfe clocks -- clock-names : should be "c8sectpfe" -See: Documentation/devicetree/bindings/clock/clock-bindings.txt - -- pinctrl-names : a pinctrl state named tsin%d-serial or tsin%d-parallel (= where %d is tsin-num) - must be defined for each tsin child node. -- pinctrl-0 : phandle referencing pin configuration for this tsin configur= ation -See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt - - -Required properties (tsin (child) node): - -- tsin-num : tsin id of the InputBlock (must be between 0 to 6) -- i2c-bus : phandle to the I2C bus DT node which the demodulators & tuners= on this tsin channel are connected. -- reset-gpios : reset gpio for this tsin channel. - -Optional properties (tsin (child) node): - -- invert-ts-clk : Bool property to control sense of ts input clock (data = stored on falling edge of clk). -- serial-not-parallel : Bool property to configure input bus width (serial= on ts_data<7>). -- async-not-sync : Bool property to control if data is received in asynchr= onous mode - (all bits/bytes with ts_valid or ts_packet asserted are valid). - -- dvb-card : Describes the NIM card connected to this tsin channel. - -Example: - -/* stih410 SoC b2120 + b2004a + stv0367-pll(NIMB) + stv0367-tda18212 (NIMA= ) DT example) */ - - c8sectpfe@8a20000 { - compatible =3D "st,stih407-c8sectpfe"; - reg =3D <0x08a20000 0x10000>, <0x08a00000 0x4000>; - reg-names =3D "stfe", "stfe-ram"; - interrupts =3D , ; - interrupt-names =3D "stfe-error-irq", "stfe-idle-irq"; - pinctrl-0 =3D <&pinctrl_tsin0_serial>; - pinctrl-1 =3D <&pinctrl_tsin0_parallel>; - pinctrl-2 =3D <&pinctrl_tsin3_serial>; - pinctrl-3 =3D <&pinctrl_tsin4_serial_alt3>; - pinctrl-4 =3D <&pinctrl_tsin5_serial_alt1>; - pinctrl-names =3D "tsin0-serial", - "tsin0-parallel", - "tsin3-serial", - "tsin4-serial", - "tsin5-serial"; - clocks =3D <&clk_s_c0_flexgen CLK_PROC_STFE>; - clock-names =3D "c8sectpfe"; - - /* tsin0 is TSA on NIMA */ - tsin0: port@0 { - tsin-num =3D <0>; - serial-not-parallel; - i2c-bus =3D <&ssc2>; - reset-gpios =3D <&pio15 4 GPIO_ACTIVE_HIGH>; - dvb-card =3D ; - }; - - tsin3: port@3 { - tsin-num =3D <3>; - serial-not-parallel; - i2c-bus =3D <&ssc3>; - reset-gpios =3D <&pio15 7 GPIO_ACTIVE_HIGH>; - dvb-card =3D ; - }; - }; --=20 2.51.0