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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b54a387cd4bsm2107453a12.35.2025.09.11.07.56.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Sep 2025 07:56:33 -0700 (PDT) From: Xiangxu Yin Date: Thu, 11 Sep 2025 22:55:06 +0800 Subject: [PATCH v4 09/13] phy: qcom: qmp-usbc: Add TCSR parsing and PHY mode setting Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250911-add-displayport-support-for-qcs615-platform-v4-9-2702bdda14ed@oss.qualcomm.com> References: <20250911-add-displayport-support-for-qcs615-platform-v4-0-2702bdda14ed@oss.qualcomm.com> In-Reply-To: <20250911-add-displayport-support-for-qcs615-platform-v4-0-2702bdda14ed@oss.qualcomm.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, fange.zhang@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, li.liu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, Dmitry Baryshkov , Bjorn Andersson , Konrad Dybcio , Xiangxu Yin X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757602528; l=4233; i=xiangxu.yin@oss.qualcomm.com; s=20241125; h=from:subject:message-id; bh=mc60fbGnoAVEo5yG+c12CgJyqEsRxFDHJbOqeLy8ArY=; b=SBS1/8HrXVaD6s2hujd4K482pOZYmdQ76wxvNB8nYNvez9CiGfPDcHnXCpjF5aCAf5pHlWsYG VudOVMF1sUvD28zAAEmVHwrpU/l47Mo4Xn3Ozy2hOioRZYXiYluCkkq X-Developer-Key: i=xiangxu.yin@oss.qualcomm.com; a=ed25519; pk=F1TwipJzpywfbt3n/RPi4l/A4AVF+QC89XzCHgZYaOc= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA2MDAzMSBTYWx0ZWRfX0RS6qa5RzIO5 zNoOg5ZMs3yGQe+Mp/jjz70IaNVoqdLU55gRKW8g/Ys2Z6OQHgZN2GWADRheCiMyOr7on78+H/Y mGEw7B/zBHCzYwXE4uC7Vna+FIQ5pNj27Z8Z8ALske9J6x9LnPy9ohv8GO1zZgioRvC+PdB4tM+ 99jjiEtAIaNHSdHlRrmAN5kQg5/ssJ8PsCG9WVkjqOzCd+VzOFtSzzvdC2C+Mhw9U132vf/Ykbq SzPTgrMydu/TVK0VeffeU/8z52NvSnId3EWeUpzbXSPk6TWgTRusMvyHDQA59cnN5kE4z2l5RV0 FytC1qmbSb+tNOSqZDF4v2UXIk5953AT1Ax2xqgTg7AYR7mZW1FU23wQF4ZNFsXqK+BqkP0hAnS ZXvXf8Sh X-Proofpoint-ORIG-GUID: hczVHZXgw2fIw4dLytMekr1YwmZv33Wl X-Proofpoint-GUID: hczVHZXgw2fIw4dLytMekr1YwmZv33Wl X-Authority-Analysis: v=2.4 cv=VIDdn8PX c=1 sm=1 tr=0 ts=68c2e324 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=ADjXBmbmjA5MTMSrQwQA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-11_01,2025-09-11_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 spamscore=0 suspectscore=0 bulkscore=0 phishscore=0 adultscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509060031 Parse TCSR registers to support DP mode signaling via dp_phy_mode_reg. Move USB PHY-only register configuration from com_init to qmp_usbc_usb_power_on. Signed-off-by: Xiangxu Yin --- drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 47 ++++++++++++++++++++--------= ---- 1 file changed, 29 insertions(+), 18 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c b/drivers/phy/qualcom= m/phy-qcom-qmp-usbc.c index 95a099de908e7f3478eb1e18326b21d4014d8da6..c57596fe0d5cd5c15105ad8183c= cdc047953e4d5 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c @@ -33,6 +33,8 @@ #include "phy-qcom-qmp-dp-phy-v2.h" =20 #define PHY_INIT_COMPLETE_TIMEOUT 10000 +#define SW_PORTSELECT_VAL BIT(0) +#define SW_PORTSELECT_MUX BIT(1) =20 /* set of registers with offsets different per-PHY */ enum qphy_reg_layout { @@ -686,12 +688,16 @@ static const struct qmp_phy_cfg qcs615_usb3dp_phy_cfg= =3D { .num_vregs =3D ARRAY_SIZE(qmp_phy_qcs615_vreg_l), }; =20 +static void qmp_usbc_set_phy_mode(struct qmp_usbc *qmp, bool is_dp) +{ + if (qmp->tcsr_map && qmp->dp_phy_mode_reg) + regmap_write(qmp->tcsr_map, qmp->dp_phy_mode_reg, is_dp); +} + static int qmp_usbc_com_init(struct phy *phy) { struct qmp_usbc *qmp =3D phy_get_drvdata(phy); const struct qmp_phy_cfg *cfg =3D qmp->cfg; - void __iomem *pcs =3D qmp->pcs; - u32 val =3D 0; int ret; =20 ret =3D regulator_bulk_enable(cfg->num_vregs, qmp->vregs); @@ -716,16 +722,6 @@ static int qmp_usbc_com_init(struct phy *phy) if (ret) goto err_assert_reset; =20 - qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); - -#define SW_PORTSELECT_VAL BIT(0) -#define SW_PORTSELECT_MUX BIT(1) - /* Use software based port select and switch on typec orientation */ - val =3D SW_PORTSELECT_MUX; - if (qmp->orientation =3D=3D TYPEC_ORIENTATION_REVERSE) - val |=3D SW_PORTSELECT_VAL; - writel(val, qmp->pcs_misc); - return 0; =20 err_assert_reset: @@ -996,6 +992,14 @@ static int qmp_usbc_usb_power_on(struct phy *phy) unsigned int val; int ret; =20 + qphy_setbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); + + /* Use software based port select and switch on typec orientation */ + val =3D SW_PORTSELECT_MUX; + if (qmp->orientation =3D=3D TYPEC_ORIENTATION_REVERSE) + val |=3D SW_PORTSELECT_VAL; + writel(val, qmp->pcs_misc); + qmp_configure(qmp->dev, qmp->serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); =20 @@ -1068,6 +1072,8 @@ static int qmp_usbc_usb_enable(struct phy *phy) if (ret) goto out_unlock; =20 + qmp_usbc_set_phy_mode(qmp, false); + ret =3D qmp_usbc_usb_power_on(phy); if (ret) { qmp_usbc_com_exit(phy); @@ -1493,6 +1499,7 @@ static int qmp_usbc_typec_switch_set(struct typec_swi= tch_dev *sw, qmp_usbc_com_exit(qmp->usb_phy); =20 qmp_usbc_com_init(qmp->usb_phy); + qmp_usbc_set_phy_mode(qmp, false); qmp_usbc_usb_power_on(qmp->usb_phy); } =20 @@ -1634,15 +1641,16 @@ static int qmp_usbc_parse_dt(struct qmp_usbc *qmp) return 0; } =20 -static int qmp_usbc_parse_vls_clamp(struct qmp_usbc *qmp) +static int qmp_usbc_parse_tcsr(struct qmp_usbc *qmp) { struct of_phandle_args tcsr_args; struct device *dev =3D qmp->dev; - int ret; + int ret, args_count; =20 - /* for backwards compatibility ignore if there is no property */ - ret =3D of_parse_phandle_with_fixed_args(dev->of_node, "qcom,tcsr-reg", 1= , 0, - &tcsr_args); + args_count =3D of_property_count_u32_elems(dev->of_node, "qcom,tcsr-reg"); + args_count =3D args_count - 1; + ret =3D of_parse_phandle_with_fixed_args(dev->of_node, "qcom,tcsr-reg", + args_count, 0, &tcsr_args); if (ret =3D=3D -ENOENT) return 0; else if (ret < 0) @@ -1655,6 +1663,9 @@ static int qmp_usbc_parse_vls_clamp(struct qmp_usbc *= qmp) =20 qmp->vls_clamp_reg =3D tcsr_args.args[0]; =20 + if (args_count > 1) + qmp->dp_phy_mode_reg =3D tcsr_args.args[1]; + return 0; } =20 @@ -1694,7 +1705,7 @@ static int qmp_usbc_probe(struct platform_device *pde= v) if (ret) return ret; =20 - ret =3D qmp_usbc_parse_vls_clamp(qmp); + ret =3D qmp_usbc_parse_tcsr(qmp); if (ret) return ret; =20 --=20 2.34.1