From nobody Thu Oct 2 22:40:28 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 36D3E34166F; Wed, 10 Sep 2025 20:45:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757537113; cv=none; b=i1TT/2Xbedhusn2QlwJEEaFKYcpkjmMqkdMemUyVti+FDPoCeSrLwvf09oY0LScEB0xbzPela5yMvV2/nJnyBg4uE3zx5RDCqfHJM7k382MMN5aut4lQCUTSjlO/eKIhKTE9AjASkY08OGFix7eP13Hybs8pCQuqJMChdSQnnHc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757537113; c=relaxed/simple; bh=o+xFkpUfgOG9TcCM2SUXqYxVokWP+lHkm3PeLjE2MzY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BYpJ7/wmdkejaqZwPNg/cABwuMM3hrau7OsNPn0hZBN2IVUnkcDhw5478fAg8iej8u+c7UjB6ojArnjWNeGsRANPkfqCvEAjyXiqOBDQqRm8pCT2/MjZ26GyqjM2DIQZZZPbVRbJEoSjxhKU1ZLfgpFDuAXgsANql16UZ/5ClJk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 71DC4244C; Wed, 10 Sep 2025 13:45:02 -0700 (PDT) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 099733F63F; Wed, 10 Sep 2025 13:45:05 -0700 (PDT) From: James Morse To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org Cc: James Morse , D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich , Dave Martin Subject: [PATCH v2 20/29] arm_mpam: Allow configuration to be applied and restored during cpu online Date: Wed, 10 Sep 2025 20:43:00 +0000 Message-Id: <20250910204309.20751-21-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20250910204309.20751-1-james.morse@arm.com> References: <20250910204309.20751-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When CPUs come online the MSC's original configuration should be restored. Add struct mpam_config to hold the configuration. This has a bitmap of features that were modified. Once the maximum partid is known, allocate a configuration array for each component, and reprogram each RIS configuration from this. CC: Dave Martin Signed-off-by: James Morse Reviewed-by: Ben Horgan Reviewed-by: Jonathan Cameron --- Changes since v1: * Switched entry_rcu to srcu versions. Changes since RFC: * Added a comment about the ordering around max_partid. * Allocate configurations after interrupts are registered to reduce churn. * Added mpam_assert_partid_sizes_fixed(); * Make reset use an all-ones instead of zero config. --- drivers/resctrl/mpam_devices.c | 269 +++++++++++++++++++++++++++++--- drivers/resctrl/mpam_internal.h | 29 +++- 2 files changed, 271 insertions(+), 27 deletions(-) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index ec1db5f8b05c..7fd149109c75 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -114,6 +114,16 @@ static LLIST_HEAD(mpam_garbage); /* When mpam is disabled, the printed reason to aid debugging */ static char *mpam_disable_reason; =20 +/* + * Once mpam is enabled, new requestors cannot further reduce the available + * partid. Assert that the size is fixed, and new requestors will be turned + * away. + */ +static void mpam_assert_partid_sizes_fixed(void) +{ + WARN_ON_ONCE(!partid_max_published); +} + static u32 __mpam_read_reg(struct mpam_msc *msc, u16 reg) { WARN_ON_ONCE(!cpumask_test_cpu(smp_processor_id(), &msc->accessibility)); @@ -363,12 +373,16 @@ static void mpam_class_destroy(struct mpam_class *cla= ss) add_to_garbage(class); } =20 +static void __destroy_component_cfg(struct mpam_component *comp); + static void mpam_comp_destroy(struct mpam_component *comp) { struct mpam_class *class =3D comp->class; =20 lockdep_assert_held(&mpam_list_lock); =20 + __destroy_component_cfg(comp); + list_del_rcu(&comp->class_list); add_to_garbage(comp); =20 @@ -833,50 +847,105 @@ static void mpam_reset_msc_bitmap(struct mpam_msc *m= sc, u16 reg, u16 wd) __mpam_write_reg(msc, reg, bm); } =20 -static void mpam_reset_ris_partid(struct mpam_msc_ris *ris, u16 partid) +/* Called via IPI. Call while holding an SRCU reference */ +static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid, + struct mpam_config *cfg) { struct mpam_msc *msc =3D ris->vmsc->msc; struct mpam_props *rprops =3D &ris->props; =20 - mpam_assert_srcu_read_lock_held(); - mutex_lock(&msc->part_sel_lock); __mpam_part_sel(ris->ris_idx, partid, msc); =20 - if (mpam_has_feature(mpam_feat_cpor_part, rprops)) - mpam_reset_msc_bitmap(msc, MPAMCFG_CPBM, rprops->cpbm_wd); + if (mpam_has_feature(mpam_feat_cpor_part, rprops) && + mpam_has_feature(mpam_feat_cpor_part, cfg)) { + if (cfg->reset_cpbm) + mpam_reset_msc_bitmap(msc, MPAMCFG_CPBM, + rprops->cpbm_wd); + else + mpam_write_partsel_reg(msc, CPBM, cfg->cpbm); + } =20 - if (mpam_has_feature(mpam_feat_mbw_part, rprops)) - mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM, rprops->mbw_pbm_bits); + if (mpam_has_feature(mpam_feat_mbw_part, rprops) && + mpam_has_feature(mpam_feat_mbw_part, cfg)) { + if (cfg->reset_mbw_pbm) + mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM, + rprops->mbw_pbm_bits); + else + mpam_write_partsel_reg(msc, MBW_PBM, cfg->mbw_pbm); + } =20 - if (mpam_has_feature(mpam_feat_mbw_min, rprops)) + if (mpam_has_feature(mpam_feat_mbw_min, rprops) && + mpam_has_feature(mpam_feat_mbw_min, cfg)) mpam_write_partsel_reg(msc, MBW_MIN, 0); =20 - if (mpam_has_feature(mpam_feat_mbw_max, rprops)) - mpam_write_partsel_reg(msc, MBW_MAX, MPAMCFG_MBW_MAX_MAX); + if (mpam_has_feature(mpam_feat_mbw_max, rprops) && + mpam_has_feature(mpam_feat_mbw_max, cfg)) + mpam_write_partsel_reg(msc, MBW_MAX, cfg->mbw_max); =20 - if (mpam_has_feature(mpam_feat_mbw_prop, rprops)) + if (mpam_has_feature(mpam_feat_mbw_prop, rprops) && + mpam_has_feature(mpam_feat_mbw_prop, cfg)) mpam_write_partsel_reg(msc, MBW_PROP, 0); mutex_unlock(&msc->part_sel_lock); } =20 +struct reprogram_ris { + struct mpam_msc_ris *ris; + struct mpam_config *cfg; +}; + +/* Call with MSC lock held */ +static int mpam_reprogram_ris(void *_arg) +{ + u16 partid, partid_max; + struct reprogram_ris *arg =3D _arg; + struct mpam_msc_ris *ris =3D arg->ris; + struct mpam_config *cfg =3D arg->cfg; + + if (ris->in_reset_state) + return 0; + + spin_lock(&partid_max_lock); + partid_max =3D mpam_partid_max; + spin_unlock(&partid_max_lock); + for (partid =3D 0; partid <=3D partid_max; partid++) + mpam_reprogram_ris_partid(ris, partid, cfg); + + return 0; +} + +static void mpam_init_reset_cfg(struct mpam_config *reset_cfg) +{ + memset(reset_cfg, 0, sizeof(*reset_cfg)); + + reset_cfg->features =3D ~0; + reset_cfg->cpbm =3D ~0; + reset_cfg->mbw_pbm =3D ~0; + reset_cfg->mbw_max =3D MPAMCFG_MBW_MAX_MAX; + + reset_cfg->reset_cpbm =3D true; + reset_cfg->reset_mbw_pbm =3D true; +} + /* * Called via smp_call_on_cpu() to prevent migration, while still being * pre-emptible. */ static int mpam_reset_ris(void *arg) { - u16 partid, partid_max; + struct mpam_config reset_cfg; struct mpam_msc_ris *ris =3D arg; + struct reprogram_ris reprogram_arg; =20 if (ris->in_reset_state) return 0; =20 - spin_lock(&partid_max_lock); - partid_max =3D mpam_partid_max; - spin_unlock(&partid_max_lock); - for (partid =3D 0; partid < partid_max; partid++) - mpam_reset_ris_partid(ris, partid); + mpam_init_reset_cfg(&reset_cfg); + + reprogram_arg.ris =3D ris; + reprogram_arg.cfg =3D &reset_cfg; + + mpam_reprogram_ris(&reprogram_arg); =20 return 0; } @@ -922,6 +991,40 @@ static void mpam_reset_msc(struct mpam_msc *msc, bool = online) } } =20 +static void mpam_reprogram_msc(struct mpam_msc *msc) +{ + u16 partid; + bool reset; + struct mpam_config *cfg; + struct mpam_msc_ris *ris; + + /* + * No lock for mpam_partid_max as partid_max_published has been + * set by mpam_enabled(), so the values can no longer change. + */ + mpam_assert_partid_sizes_fixed(); + + guard(srcu)(&mpam_srcu); + list_for_each_entry_srcu(ris, &msc->ris, msc_list, + srcu_read_lock_held(&mpam_srcu)) { + if (!mpam_is_enabled() && !ris->in_reset_state) { + mpam_touch_msc(msc, &mpam_reset_ris, ris); + ris->in_reset_state =3D true; + continue; + } + + reset =3D true; + for (partid =3D 0; partid <=3D mpam_partid_max; partid++) { + cfg =3D &ris->vmsc->comp->cfg[partid]; + if (cfg->features) + reset =3D false; + + mpam_reprogram_ris_partid(ris, partid, cfg); + } + ris->in_reset_state =3D reset; + } +} + static void _enable_percpu_irq(void *_irq) { int *irq =3D _irq; @@ -944,7 +1047,7 @@ static int mpam_cpu_online(unsigned int cpu) _enable_percpu_irq(&msc->reenable_error_ppi); =20 if (atomic_fetch_inc(&msc->online_refs) =3D=3D 0) - mpam_reset_msc(msc, true); + mpam_reprogram_msc(msc); } srcu_read_unlock(&mpam_srcu, idx); =20 @@ -1577,6 +1680,45 @@ static void mpam_unregister_irqs(void) cpus_read_unlock(); } =20 +static void __destroy_component_cfg(struct mpam_component *comp) +{ + add_to_garbage(comp->cfg); +} + +static int __allocate_component_cfg(struct mpam_component *comp) +{ + mpam_assert_partid_sizes_fixed(); + + if (comp->cfg) + return 0; + + comp->cfg =3D kcalloc(mpam_partid_max + 1, sizeof(*comp->cfg), GFP_KERNEL= ); + if (!comp->cfg) + return -ENOMEM; + init_garbage(comp->cfg); + + return 0; +} + +static int mpam_allocate_config(void) +{ + int err =3D 0; + struct mpam_class *class; + struct mpam_component *comp; + + lockdep_assert_held(&mpam_list_lock); + + list_for_each_entry(class, &mpam_classes, classes_list) { + list_for_each_entry(comp, &class->components, class_list) { + err =3D __allocate_component_cfg(comp); + if (err) + return err; + } + } + + return 0; +} + static void mpam_enable_once(void) { int err; @@ -1596,12 +1738,21 @@ static void mpam_enable_once(void) */ cpus_read_lock(); mutex_lock(&mpam_list_lock); - mpam_enable_merge_features(&mpam_classes); + do { + mpam_enable_merge_features(&mpam_classes); =20 - err =3D mpam_register_irqs(); - if (err) - pr_warn("Failed to register irqs: %d\n", err); + err =3D mpam_register_irqs(); + if (err) { + pr_warn("Failed to register irqs: %d\n", err); + break; + } =20 + err =3D mpam_allocate_config(); + if (err) { + pr_err("Failed to allocate configuration arrays.\n"); + break; + } + } while (0); mutex_unlock(&mpam_list_lock); cpus_read_unlock(); =20 @@ -1624,6 +1775,9 @@ static void mpam_reset_component_locked(struct mpam_c= omponent *comp) struct mpam_msc_ris *ris; =20 lockdep_assert_cpus_held(); + mpam_assert_partid_sizes_fixed(); + + memset(comp->cfg, 0, (mpam_partid_max * sizeof(*comp->cfg))); =20 guard(srcu)(&mpam_srcu); list_for_each_entry_srcu(vmsc, &comp->vmsc, comp_list, @@ -1723,6 +1877,77 @@ void mpam_enable(struct work_struct *work) mpam_enable_once(); } =20 +struct mpam_write_config_arg { + struct mpam_msc_ris *ris; + struct mpam_component *comp; + u16 partid; +}; + +static int __write_config(void *arg) +{ + struct mpam_write_config_arg *c =3D arg; + + mpam_reprogram_ris_partid(c->ris, c->partid, &c->comp->cfg[c->partid]); + + return 0; +} + +#define maybe_update_config(cfg, feature, newcfg, member, changes) do { \ + if (mpam_has_feature(feature, newcfg) && \ + (newcfg)->member !=3D (cfg)->member) { \ + (cfg)->member =3D (newcfg)->member; \ + cfg->features |=3D (1 << feature); \ + \ + (changes) |=3D (1 << feature); \ + } \ +} while (0) + +static mpam_features_t mpam_update_config(struct mpam_config *cfg, + const struct mpam_config *newcfg) +{ + mpam_features_t changes =3D 0; + + maybe_update_config(cfg, mpam_feat_cpor_part, newcfg, cpbm, changes); + maybe_update_config(cfg, mpam_feat_mbw_part, newcfg, mbw_pbm, changes); + maybe_update_config(cfg, mpam_feat_mbw_max, newcfg, mbw_max, changes); + + return changes; +} + +int mpam_apply_config(struct mpam_component *comp, u16 partid, + struct mpam_config *cfg) +{ + struct mpam_write_config_arg arg; + struct mpam_msc_ris *ris; + struct mpam_vmsc *vmsc; + struct mpam_msc *msc; + + lockdep_assert_cpus_held(); + + /* Don't pass in the current config! */ + WARN_ON_ONCE(&comp->cfg[partid] =3D=3D cfg); + + if (!mpam_update_config(&comp->cfg[partid], cfg)) + return 0; + + arg.comp =3D comp; + arg.partid =3D partid; + + guard(srcu)(&mpam_srcu); + list_for_each_entry_srcu(vmsc, &comp->vmsc, comp_list, + srcu_read_lock_held(&mpam_srcu)) { + msc =3D vmsc->msc; + + list_for_each_entry_srcu(ris, &vmsc->ris, vmsc_list, + srcu_read_lock_held(&mpam_srcu)) { + arg.ris =3D ris; + mpam_touch_msc(msc, __write_config, &arg); + } + } + + return 0; +} + static int __init mpam_msc_driver_init(void) { if (!system_supports_mpam()) diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index b69fa9199cb4..17570d9aae9b 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -169,11 +169,7 @@ struct mpam_props { u16 num_mbwu_mon; }; =20 -static inline bool mpam_has_feature(enum mpam_device_features feat, - struct mpam_props *props) -{ - return (1 << feat) & props->features; -} +#define mpam_has_feature(_feat, x) ((1 << (_feat)) & (x)->features) =20 static inline void mpam_set_feature(enum mpam_device_features feat, struct mpam_props *props) @@ -204,6 +200,20 @@ struct mpam_class { struct mpam_garbage garbage; }; =20 +struct mpam_config { + /* Which configuration values are valid. */ + mpam_features_t features; + + u32 cpbm; + u32 mbw_pbm; + u16 mbw_max; + + bool reset_cpbm; + bool reset_mbw_pbm; + + struct mpam_garbage garbage; +}; + struct mpam_component { u32 comp_id; =20 @@ -212,6 +222,12 @@ struct mpam_component { =20 cpumask_t affinity; =20 + /* + * Array of configuration values, indexed by partid. + * Read from cpuhp callbacks, hold the cpuhp lock when writing. + */ + struct mpam_config *cfg; + /* member of mpam_class:components */ struct list_head class_list; =20 @@ -276,6 +292,9 @@ extern u8 mpam_pmg_max; void mpam_enable(struct work_struct *work); void mpam_disable(struct work_struct *work); =20 +int mpam_apply_config(struct mpam_component *comp, u16 partid, + struct mpam_config *cfg); + int mpam_get_cpumask_from_cache_id(unsigned long cache_id, u32 cache_level, cpumask_t *affinity); =20 --=20 2.39.5