From nobody Thu Oct 2 21:41:03 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BD2030FF26; Wed, 10 Sep 2025 21:23:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757539440; cv=none; b=XJDYRN1l7gw5iheBzI3k3Mccx0ThlzyTeDHL6t9VgBVrhenRYtNn5ujoYCSi5UI9gC9b5GtO0LV2sqrV4BjFIjkZZv9gCbqPegi3mAJBP0HgzJ1NErEa0tskO4QJ4NUCM+mKYctNsFpyZCjPH7j8J0M8igyeH4tx27944J7CgKU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757539440; c=relaxed/simple; bh=PbQeF3y+qwgBCbyFKvOZXgZH5WFcFU8Cgb1ja0zs8uU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=tLoOpMknHlUylvyz8eaHH+d+Q3u14zEALbtAKY0OjjmTOsIfJBhM86939Lzo/aJFfXQTWHGlY5oHMs5/NQ6/X+x5FyBw4xcphOUUkOFr1DLbuy2NpjASAG3h3xidcrqt5LhIgVug1qicqSCJZfFQlSm+ZbVMGJYL3jq8C2zm+k4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=FdyknXB3; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="FdyknXB3" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58ALNoH4146663; Wed, 10 Sep 2025 16:23:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757539430; bh=fkjPzOus4exPAHnEz6RTPXE//hfUlcCGzFIQiKl5DiE=; h=From:Date:Subject:References:In-Reply-To:To:CC; b=FdyknXB3VPlFUy9nK5nSE36PDZYZo8a7pTSuDLfpmnGUXI6vpZr9uSUk+8x5o5kb+ m7GtK7NL73n+2aQ6OYZ7V/WBqn7KOyb0Y4rr8qEPpal221daZx4SIXq30Z0AFlqkUl 0rq2q5GA7HxHcMITXxK9WPg4M75I4F7KHXztYtA4= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58ALNnGV014784 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 10 Sep 2025 16:23:49 -0500 Received: from DLEE207.ent.ti.com (157.170.170.95) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 10 Sep 2025 16:23:49 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE207.ent.ti.com (157.170.170.95) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Wed, 10 Sep 2025 16:23:49 -0500 Received: from [127.0.1.1] (uda0506412.dhcp.ti.com [128.247.81.19]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58ALNnZ41097742; Wed, 10 Sep 2025 16:23:49 -0500 From: Kendall Willis Date: Wed, 10 Sep 2025 16:23:31 -0500 Subject: [PATCH v2 1/2] dt-bindings: serial: 8250_omap: Add wakeup pinctrl state Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250910-uart-daisy-chain-8250-omap-v2-1-e90d44c1a9ac@ti.com> References: <20250910-uart-daisy-chain-8250-omap-v2-0-e90d44c1a9ac@ti.com> In-Reply-To: <20250910-uart-daisy-chain-8250-omap-v2-0-e90d44c1a9ac@ti.com> To: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vignesh Raghavendra CC: , , , , , , , , , , , , , Kendall Willis X-Mailer: b4 0.14.2 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea From: Markus Schneider-Pargmann Pins associated with the 8250 omap unit can be the source of a wakeup in deep sleep states. To be able to wakeup, these pins have to be configured in a special way. To support this configuration add the default and wakeup pinctrl states. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Kendall Willis Reviewed-by: Dhruva Gole Reviewed-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/serial/8250_omap.yaml | 16 +++++++++++++= +++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/8250_omap.yaml b/Docu= mentation/devicetree/bindings/serial/8250_omap.yaml index 1859f71297ff297141e5cd455574fa9ccd9dd11c..aabacca2b2fa6a7740173e6c415= 656360b5df4e4 100644 --- a/Documentation/devicetree/bindings/serial/8250_omap.yaml +++ b/Documentation/devicetree/bindings/serial/8250_omap.yaml @@ -71,6 +71,22 @@ properties: overrun-throttle-ms: true wakeup-source: true =20 + pinctrl-0: + description: Default pinctrl state + + pinctrl-1: + description: Wakeup pinctrl state + + pinctrl-names: + description: + When present should contain at least "default" describing the defaul= t pin + states. The second state called "wakeup" describes the pins in their + wakeup configuration required to exit sleep states. + minItems: 1 + items: + - const: default + - const: wakeup + required: - compatible - reg --=20 2.34.1 From nobody Thu Oct 2 21:41:03 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3150E30FC3D; Wed, 10 Sep 2025 21:23:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757539440; cv=none; b=s9d/s4kYtpSNndutJN/yjpoUufvRxew5DOt/auLx4qZ9tqTXYfcYxsXb9bNTao6kBKkgZXlvP5X83FWctI+fXAzDANFvriPPE2wlHDXaBahw5VBMmJvk5wEjMxr7TunKcsgyWx7cBO5LdULrNZr8UtIVBtXZqMG32lvgmfMnSKs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757539440; c=relaxed/simple; bh=u01b/oiLKeGK9/KT8JgvFv/p5W3E/aZpSOzfJMIofiA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=e7ifzOie9I+4HBKDuOfiYw3PqQ3ABzPjwLa+/5LAyvKpP7z/SDJVzaxxgT1tsxeLyLoPUXoWIc3fkCC2nc6r2w0ijERjrB4T5cvqKuf0CsVvrhhuneU2VxhBMLOlr0PTLw47yxJ3+VzyOU1CBO7kJg0rqWvfZkZLHD+j2HJq+7s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=eyZhsvi3; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="eyZhsvi3" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 58ALNoxC600362; Wed, 10 Sep 2025 16:23:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757539430; bh=iUPPMaqnvzEwIfBCj818WmKjsFyCRvzYa1dHNs7kXjU=; h=From:Date:Subject:References:In-Reply-To:To:CC; b=eyZhsvi3iaznKcVFErdQnz7XSr0MBi7TfhhgHH3baqpln4iRB6LMtVGAbbaAT2vIf dWzSspz3PLhBpoM4W6ifFUFSzvcbpJbSVaamcr8WUFgzrLd4OQsyqPaOMjQOIZpi5P 0pwF+icWCLVYOoVbLOoT+WaSnbxfIkooqiJve6ww= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 58ALNnFp572646 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 10 Sep 2025 16:23:49 -0500 Received: from DFLE203.ent.ti.com (10.64.6.61) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 10 Sep 2025 16:23:49 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE203.ent.ti.com (10.64.6.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Wed, 10 Sep 2025 16:23:49 -0500 Received: from [127.0.1.1] (uda0506412.dhcp.ti.com [128.247.81.19]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 58ALNnZ51097742; Wed, 10 Sep 2025 16:23:49 -0500 From: Kendall Willis Date: Wed, 10 Sep 2025 16:23:32 -0500 Subject: [PATCH v2 2/2] serial: 8250: omap: Support wakeup pinctrl state on suspend Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250910-uart-daisy-chain-8250-omap-v2-2-e90d44c1a9ac@ti.com> References: <20250910-uart-daisy-chain-8250-omap-v2-0-e90d44c1a9ac@ti.com> In-Reply-To: <20250910-uart-daisy-chain-8250-omap-v2-0-e90d44c1a9ac@ti.com> To: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vignesh Raghavendra CC: , , , , , , , , , , , , , Kendall Willis X-Mailer: b4 0.14.2 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea From: Markus Schneider-Pargmann UART can be used as a wakeup source for am62 from suspend to ram states. To enable wakeup from UART am62 requires a wakeup flag being set in the pinctrl. If the device is marked as wakeup enabled, select the 'wakeup' pinctrl state on suspend and restore the default pinctrl state on resume. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Kendall Willis Reviewed-by: Dhruva Gole --- drivers/tty/serial/8250/8250_omap.c | 36 +++++++++++++++++++++++++++++++++= +++ 1 file changed, 36 insertions(+) diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/= 8250_omap.c index bb23afdd63f29353351aa21fccf6c8de99011a65..9e49ef48b851bf6cd3b04a77a4d= 0d7b4e064dc5f 100644 --- a/drivers/tty/serial/8250/8250_omap.c +++ b/drivers/tty/serial/8250/8250_omap.c @@ -27,6 +27,8 @@ #include #include #include +#include +#include =20 #include "8250.h" =20 @@ -145,6 +147,9 @@ struct omap8250_priv { spinlock_t rx_dma_lock; bool rx_dma_broken; bool throttled; + + struct pinctrl *pinctrl; + struct pinctrl_state *pinctrl_wakeup; }; =20 struct omap8250_dma_params { @@ -1349,6 +1354,18 @@ static int omap8250_no_handle_irq(struct uart_port *= port) return 0; } =20 +static int omap8250_select_wakeup_pinctrl(struct device *dev, + struct omap8250_priv *priv) +{ + if (IS_ERR_OR_NULL(priv->pinctrl_wakeup)) + return 0; + + if (!device_may_wakeup(dev)) + return 0; + + return pinctrl_select_state(priv->pinctrl, priv->pinctrl_wakeup); +} + static struct omap8250_dma_params am654_dma =3D { .rx_size =3D SZ_2K, .rx_trigger =3D 1, @@ -1573,6 +1590,11 @@ static int omap8250_probe(struct platform_device *pd= ev) priv->line =3D ret; pm_runtime_mark_last_busy(&pdev->dev); pm_runtime_put_autosuspend(&pdev->dev); + + priv->pinctrl =3D devm_pinctrl_get(&pdev->dev); + if (!IS_ERR_OR_NULL(priv->pinctrl)) + priv->pinctrl_wakeup =3D pinctrl_lookup_state(priv->pinctrl, "wakeup"); + return 0; err: pm_runtime_dont_use_autosuspend(&pdev->dev); @@ -1630,6 +1652,13 @@ static int omap8250_suspend(struct device *dev) struct uart_8250_port *up =3D serial8250_get_port(priv->line); int err =3D 0; =20 + err =3D omap8250_select_wakeup_pinctrl(dev, priv); + if (err) { + dev_err(dev, "Failed to select wakeup pinctrl, aborting suspend %pe\n", + ERR_PTR(err)); + return err; + } + serial8250_suspend_port(priv->line); =20 err =3D pm_runtime_resume_and_get(dev); @@ -1651,6 +1680,13 @@ static int omap8250_resume(struct device *dev) struct uart_8250_port *up =3D serial8250_get_port(priv->line); int err; =20 + err =3D pinctrl_select_default_state(dev); + if (err) { + dev_err(dev, "Failed to select default pinctrl state on resume: %pe\n", + ERR_PTR(err)); + return err; + } + if (uart_console(&up->port) && console_suspend_enabled) { err =3D pm_runtime_force_resume(dev); if (err) --=20 2.34.1