From nobody Thu Oct 2 21:53:56 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93A76312813 for ; Wed, 10 Sep 2025 09:03:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757494987; cv=none; b=gRI0Ni3ms54pnFqkg/q2r6ECmZnRhPueExzS265zeiJrZsR+glcKAaWT1NpNtTL8RsbMU9GScQ6BTsVCry4rsNbJ6b+uaEBZtmOHEa1SaPgNa1RrRT9cnMDjAvGi2KOt3XlQcCSI5JFbY0v/sVX8JP1JuvXTKi3/EnhbOW+NVRY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757494987; c=relaxed/simple; bh=NXrL4UfXMaolOBQBaqURajfxc0T5HCU6PJBeG4E7Tcg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AnK/9irOAckN+yTKnnC35s8johJGspk33Pf4wMjn+MZLZ9rto0TDd2s23WYd+JC87rp34gvxJKzKgl11CbEzIPh+DOV31e5lMkQjMY+BYq4ceBlwx11MqQGXuDiTOZpoURFin9zeNvjzHOfbdlYrQFksXD1sKhmqZDdcuMCrm7A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=neNxnRtX; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="neNxnRtX" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 58A7cmuV017095 for ; Wed, 10 Sep 2025 09:03:04 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= yZxweSgSo8wMha1h5lg1sSuavNRyAYwcoiGnGqC+L6o=; b=neNxnRtXpWz0EzPT yW40z+TjcW2i//Kg4jKdsz3C52mCoOJvHlw5rhGIoYJgXTU6gi8+W3BUTF6X2XtU TxtePJ81teiNdjQqaYGdM5GqYeLalD2JPcBXmrcsq10+SCU0jMJc8vG7yHUwY701 mMKHwHxGLHDOZ26CZZLxg1dtKK78grPptTSrr+NnBQAw8Yma+ufw54H5oNKtUE6t 5A111WttJ8OOCm1O/j+tP91YCbaLwapcF+V7MHwza0a6shij302AYWWMXKZy5bc4 /meor6xWwOOjEhrTbzGIn9b0dnQgi4gka5hw/FOO7gu1/L9OnDh4Xb4b/KkSpf4g n/1y9Q== Received: from mail-pg1-f200.google.com (mail-pg1-f200.google.com [209.85.215.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 490db8ka85-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Wed, 10 Sep 2025 09:03:04 +0000 (GMT) Received: by mail-pg1-f200.google.com with SMTP id 41be03b00d2f7-b4fc06ba4c1so5225585a12.1 for ; Wed, 10 Sep 2025 02:03:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757494983; x=1758099783; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yZxweSgSo8wMha1h5lg1sSuavNRyAYwcoiGnGqC+L6o=; b=UXdRjMkvGYNYQx/3hH4SDL4pmxI6o3kmVZ7BatbVOcyvsge4x5lPy0cv6cx74dv/9v vpvd0WklIkC9mgfyDW/NQcDYWPTTvnjirmNy0TBq1usHCIGchyCTni3SsFnk1aaDa2m9 5E2t5g02gShXOkT/UB8i5Z0Prz3nMtaocaaxe9sK5FfhEmFdk4DevkNBslb8plNlETEB ar2CWOftzP0Tb4L+cYM9viuUyupkgYPrqgryEZuk1Habs0zIRE/rrbx+tsLpkfm52DuI ioZHmRWkDk/nQ+tvdoPMQddYy++6PQC9K09SW6QAYZKo7fsLvBwX6ytRcHwE/GOSMCnx TMCA== X-Forwarded-Encrypted: i=1; AJvYcCXfj++qHY5feL1mdj01zvCWbQCMK8n/8PoYvYjFPldyFqvbN/q/uDDD3kh/9YMlOzeA8i3ENI5chVqnC/U=@vger.kernel.org X-Gm-Message-State: AOJu0Yw9KajteMNH2+cCdOzcPdWstXCaB1h4VVCqdKOuKb5sfSwDqbUc phzuTxmGg2hL6lyqL3b7g7IVCAyJV/0R4hA4XipEvnF7G7UOoVWD4EDzX2FBKnq2Xme0cvmt/7B WM5TOx5wpfOPYT7uA7lqDrR6Kw1nxrCE0CKZ7P9RGFz+HMk4w6wx0Ja/yFr0rGHOKXw4= X-Gm-Gg: ASbGncvOU7q8xgw0cECligFm65PdpAkb4OsxEt7hfQzZFjvXaSE977y/ie84FPCGuwa BhT/ej9p+C0HQriw7lYL/VQTn4Gew2bdjTQdtjQWpgK+K6gr1VQqPHHxsUJlFmaLQyxhAgUY1sG wEci2GmZ+5txO612A8HMyN+3hggpi5e2bBJfhGr4HM4yj6jJCeigtWDWasmRty6G1Go9mIZVFhy f4cEVrAJM12NB5B5sPSvcDE+duAA/9tpgmj9ioDolweEnIsajgushsSja4qjdfxMGnnmgcdgLlO KtnAqnnvjhZBu7S8NW5JSBy8cLiqtVl8jtDpE5ig6TAF8g2x7MnK2yiqFN7na5gQSMlYbio8r6E JgFWoIBXGsbTsngAF+mULqGj6GgpkThf4pg== X-Received: by 2002:a17:902:d4cc:b0:24e:af92:70c2 with SMTP id d9443c01a7336-2516f240f23mr204775215ad.24.1757494982969; Wed, 10 Sep 2025 02:03:02 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHWPVJMLaOuBnAfptMTDd4jlttb0xOSEMI0piuj7JHW/j2NHik0J+8glBtYR4d4y8/aud4fcA== X-Received: by 2002:a17:902:d4cc:b0:24e:af92:70c2 with SMTP id d9443c01a7336-2516f240f23mr204774825ad.24.1757494982510; Wed, 10 Sep 2025 02:03:02 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-25a27c029ccsm21089155ad.41.2025.09.10.02.02.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Sep 2025 02:03:02 -0700 (PDT) From: Yijie Yang Date: Wed, 10 Sep 2025 17:02:09 +0800 Subject: [PATCH v11 1/4] dt-bindings: arm: qcom: Document HAMOA-IOT-EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250910-hamoa_initial-v11-1-38ed7f2015f7@oss.qualcomm.com> References: <20250910-hamoa_initial-v11-0-38ed7f2015f7@oss.qualcomm.com> In-Reply-To: <20250910-hamoa_initial-v11-0-38ed7f2015f7@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yijie Yang , Krzysztof Kozlowski X-Mailer: b4 0.15-dev-5bbf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757494974; l=1177; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=NXrL4UfXMaolOBQBaqURajfxc0T5HCU6PJBeG4E7Tcg=; b=O6Ehrkgfh2Hold1rk4GnSagTZ2k3PHgg73ucm37LLER+haNzMWi3fZM7SpE6JenShR0DIsS9/ CJSy/ExP/7KDHbosVo5j58X+iUgdPP15s2rAlT4WECPbuCJT+tXxQyg X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA2MDAzMSBTYWx0ZWRfXy42NxV88ZsA5 TD4L0KpdoW78GYcWovIgNj27sh1shURi1KCTTbToVs/whAF1hiU3IpWSLUuqedlH0GU84JSViVP DyJZDm7jEwVuWoEIfbiSjJG/6YnRiUsab129KgjnsiNEB1n8friQTLxDKdkVenjop3gmJFRxSoV F36j5OlCzXssqMKe4oeib4rhK2a64Z+e3HyNBqiliYzs7O2WpR64Kg6VfT4/AbolyHpGid/hpLQ 5bOciDkWXpGpn6GfpYWWuABefv1TcoU8c5JUGy3UxRJDGiDxO/oy3PDZhnjqpGGnQcMKyGOTtEY B+kK0kE6ZS3ZwPnb6EDCxJJlJvpJE+n4avsT+A7ZxZ1JKZdO+q6ntf/kqB65FCmdoT58wjwUr9e a7BRCKLM X-Proofpoint-ORIG-GUID: CLnso5bVnl04HG53yCnWxDPRddsSKQ0a X-Proofpoint-GUID: CLnso5bVnl04HG53yCnWxDPRddsSKQ0a X-Authority-Analysis: v=2.4 cv=VIDdn8PX c=1 sm=1 tr=0 ts=68c13ec8 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=Bh1HEMNN3wmc11-eFpoA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-09_03,2025-09-10_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 spamscore=0 suspectscore=0 bulkscore=0 phishscore=0 adultscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509060031 Document the device tree binding for the HAMOA-IOT-EVK board, which uses the Qualcomm X1E80100 SoC. The EVK consists of a carrier board and a modular System-on-Module (SoM). The SoM integrates the SoC, PMICs, and essential GPIOs, while the EVK carrier board provides additional peripherals such as UART and USB interfaces. Acked-by: Krzysztof Kozlowski Signed-off-by: Yijie Yang --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 7d47d0c04376..d03084cb0e52 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1073,6 +1073,12 @@ properties: - qcom,x1e80100-qcp - const: qcom,x1e80100 =20 + - items: + - enum: + - qcom,hamoa-iot-evk + - const: qcom,hamoa-iot-som + - const: qcom,x1e80100 + - items: - enum: - asus,zenbook-a14-ux3407qa --=20 2.34.1 From nobody Thu Oct 2 21:53:56 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E352731329B for ; Wed, 10 Sep 2025 09:03:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757494991; cv=none; b=u0Ajjmd8D0S6G+cPPI9YC7ytV7MRdYIiax/+kL9mIQxH4soOCsjjhh85gz0ZiqsNXqFEtCW59M9JHrlvNA/jYXytkyLfu3mQVlWrBDwtGd7qFXcgkaNiRSqKKObYgh/HDzv6KVTJikd0FBkYkGgnJrK19lrUWzJYhDAF4fgv7wE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757494991; c=relaxed/simple; bh=cdjypD0GQ90BYFaF0mM79sUabNOmmrylx+82LPmHlbQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ro0PgAtJRki5QhNtiKLucSYSqZSNjPshhTHJXSPWkGlAE+ow3FxeORmPVoD1u6IoD2qYBZan+ZXWrt6TAo+dCJjcy+ORx1r0e476XFA9QFhTqAtwDHJuvE8WkWipu5IenCYVX/VgO4wwLYo4YfKZV8mtRgFoMJFU1tj7FdD8duk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=N/8wN+Ag; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="N/8wN+Ag" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 58A7coo4006868 for ; Wed, 10 Sep 2025 09:03:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= bBjRZ4BA1fnNosNt1HhSCCjSq1RjNLTHOzKBYD39Oqs=; b=N/8wN+Ag8MzP+ue1 tdYkPp5XW4And8438l/UZRf8+SDp7smUdJfh3SJQdGWavmFeroJxpPNr8J5Ztl+L I6S0jywWp5ZI+pUnnKZH8TM2HlV+mwfGh4QH7PogoYeSzdqqkJWaoCVlwkHO2xVS gbvuiigV7lLFZ3x7j7RNRxBosSlwR2jMp3fsv9vNZj3JM63ir7TSXk+x5TfjuqX/ G3Z4PiSAcQGpCMuPAXxAqEa8hgQe9YNR5yWqzjEUdEaCkObAj2fpbFOoDKvMPIKq 91689QeIBSO27KRFmFPH8olFqesgsHT2je7QWYSWi/Sk+6iWtUWzkOcVie8N9Sy4 pepqCw== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 491vc27ad7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Wed, 10 Sep 2025 09:03:08 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-24c99f6521dso81595005ad.3 for ; Wed, 10 Sep 2025 02:03:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757494987; x=1758099787; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bBjRZ4BA1fnNosNt1HhSCCjSq1RjNLTHOzKBYD39Oqs=; b=RN9vz+M/HzlY6YE5joydw7Y2Iq7V4Qt41rTofe77atWMRFxbxg2WWW+z/7xhuvoLF4 lKYkHUCoMagM+pVa525t5PqDwkV98jlDrSEaZQHPc8rZc+fqGDFtVa9O0vTp2uYeKTXb stmKyIniGA7ijep13nz2GocXw1BQHs06jWTbzdvOEjQZM5lafGcP46U9zgWGQ2NKcMpw Yguw7fijb2pqJsHDXvz/2rEvkft1XrMcmtTY7GRK4VYIXGah7dAWLnWsEyfa7LRlxiiF KryjnLNG5T8ZE13Fqq02q/wbBMtvJTELxrnfZ2M2VJ4doA+S5HK+2MSOj6F99jWsEYcy N4sg== X-Forwarded-Encrypted: i=1; AJvYcCW8cgudXADZ6dh74WfPTZdmmUgwFmECjY6Ga1VYbua5ixzGTV+HTUlfOQsSCNYFiPSIaLByDKA8X2BGxmM=@vger.kernel.org X-Gm-Message-State: AOJu0YwRIq3Gzs7bMPgPxVXZTO1KzIHQ+SfBCx0AcfiuPia5q7SZEO7H RLz8jBXUeFJZll/bx1or9VbrwvYnkXV1b12w3ktIkFsEd9sCjjFYG5Vu7P6y3Z39u3dlg1cJDRS dzNdITrEfEremY/10eMsMtKuyvg5jYCgZPV/WvVygtG9YYyICuS+2o/1p+tAnpB5nTJs= X-Gm-Gg: ASbGncsm0Yb5bGoVXD07sJ7GJrpjZvHaxPBlQk09Rfic+K4naJcE3i5AQr1bq0c3xfZ gttaH+qYTuD2DqT3RZrfriBZmOcS9RjOlAEFRq9VLSut7FufwdahfXgWZU+V4TqG5kIbE0l6Swx uAYRds0oOsNEimmKYiPzlD163E5OmO91HJ7uq53YEK7THYNBxvRO2KlRXMM2JAIYWJCgZ6wXkDs a1rn8Mu3BS+P6BXUVx9tA7XLuXZqHId94sRIbu2FCJGI+fS+pmMEgCE1iq5yEDtjd3qtILf2hhN bzsmDa14/hk5/velaSCBOZnskv3X5XFuZQKZZyt0TzHURABKJu+9s0THmApBjrzNZqU5F72KId4 g6pipLMs2VElnACrJnesiM88pXOJjnf1kGw== X-Received: by 2002:a17:903:3d06:b0:246:9e32:e83a with SMTP id d9443c01a7336-25174c1d145mr186318555ad.47.1757494986935; Wed, 10 Sep 2025 02:03:06 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHtdchrKI9eiNyMpIN3Q4+JIjYTsadT8/Vlk99S+Goudc9T3vGe4DnozzmY6zySEDEZUrknqg== X-Received: by 2002:a17:903:3d06:b0:246:9e32:e83a with SMTP id d9443c01a7336-25174c1d145mr186318265ad.47.1757494986487; Wed, 10 Sep 2025 02:03:06 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-25a27c029ccsm21089155ad.41.2025.09.10.02.03.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Sep 2025 02:03:06 -0700 (PDT) From: YijieYang Date: Wed, 10 Sep 2025 17:02:10 +0800 Subject: [PATCH v11 2/4] arm64: dts: qcom: x1e80100: add video node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250910-hamoa_initial-v11-2-38ed7f2015f7@oss.qualcomm.com> References: <20250910-hamoa_initial-v11-0-38ed7f2015f7@oss.qualcomm.com> In-Reply-To: <20250910-hamoa_initial-v11-0-38ed7f2015f7@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yijie Yang , Wangao Wang , Konrad Dybcio X-Mailer: b4 0.15-dev-5bbf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757494975; l=3021; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=sQQeMMHQQyZ+jOLzJfuQdFmPZbcfAe1LjwQ0p3k3Wr8=; b=LO90ADqRlRBqzjkvNrIHvspLPTQZ97aU+cfcsNuHrt6sepy5sfi4A9l2oIfHluXaf819BOcQK tLNLPBzmfmOC80118/3xYqhyZ+YpaYRexKCl6onuXvUJhcMxTOXIpJ4 X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Authority-Analysis: v=2.4 cv=FN4bx/os c=1 sm=1 tr=0 ts=68c13ecc cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=tEm64AmstYfONosBKmoA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: 5QXwcaMtIqlIhr-5ZYn4hrSyMurPLmdN X-Proofpoint-GUID: 5QXwcaMtIqlIhr-5ZYn4hrSyMurPLmdN X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA4MDA5NCBTYWx0ZWRfX5Z5mJ7WP454v KwJk4V7UFACCDXtB4Ux9Jz9GwYn195At0mDxHUzQu8v965BwyawX86dWxD+/FejYMzTOJpk15/z u43DWwVqcOH5GQ85JUjBiV+11rd9mzRO2/VqPhuXD1YJ/c+20PlUpAKbZzq2C2/LcJ2L5Jsrojq 8cl177tbNaFNEgB5e694+KV3C6B34icTcAuPwLRsO65vUO2MNYaUOFMFM7hxx3DR5Pd2DcyHKvP N2OLNWOWLXD99JPRnsCcI4HvcrtWBYmb1Qgabme+5Jxr+9xAnd/HyI2qRPwi4I1CvV33azx6gcu +rcFZHcfEqsQ3b+aEBlwvfe0ylekV5SBryXEf+NJG4YqOtm759WQVU001k1f56wFOJDQXxnR7Ps ZpptALGK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-09_03,2025-09-10_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 clxscore=1015 phishscore=0 adultscore=0 bulkscore=0 impostorscore=0 malwarescore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509080094 From: Wangao Wang Add the IRIS video-codec node on X1E80100 platform to support video functionality. Reviewed-by: Konrad Dybcio Signed-off-by: Wangao Wang Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 82 ++++++++++++++++++++++++++++++= ++++ 1 file changed, 82 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/q= com/x1e80100.dtsi index 737c5dbd1c80..4a450738b695 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -5186,6 +5186,88 @@ usb_1_ss1_dwc3_ss: endpoint { }; }; =20 + iris: video-codec@aa00000 { + compatible =3D "qcom,x1e80100-iris", "qcom,sm8550-iris"; + + reg =3D <0x0 0x0aa00000 0x0 0xf0000>; + interrupts =3D ; + + power-domains =3D <&videocc VIDEO_CC_MVS0C_GDSC>, + <&videocc VIDEO_CC_MVS0_GDSC>, + <&rpmhpd RPMHPD_MXC>, + <&rpmhpd RPMHPD_MMCX>; + power-domain-names =3D "venus", + "vcodec0", + "mxc", + "mmcx"; + operating-points-v2 =3D <&iris_opp_table>; + + clocks =3D <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>; + clock-names =3D "iface", + "core", + "vcodec0_core"; + + interconnects =3D <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names =3D "cpu-cfg", + "video-mem"; + + memory-region =3D <&video_mem>; + + resets =3D <&gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names =3D "bus"; + + iommus =3D <&apps_smmu 0x1940 0x0>, + <&apps_smmu 0x1947 0x0>; + dma-coherent; + + status =3D "disabled"; + + iris_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-192000000 { + opp-hz =3D /bits/ 64 <192000000>; + required-opps =3D <&rpmhpd_opp_low_svs_d1>, + <&rpmhpd_opp_low_svs_d1>; + }; + + opp-240000000 { + opp-hz =3D /bits/ 64 <240000000>; + required-opps =3D <&rpmhpd_opp_low_svs>, + <&rpmhpd_opp_low_svs>; + }; + + opp-338000000 { + opp-hz =3D /bits/ 64 <338000000>; + required-opps =3D <&rpmhpd_opp_svs>, + <&rpmhpd_opp_svs>; + }; + + opp-366000000 { + opp-hz =3D /bits/ 64 <366000000>; + required-opps =3D <&rpmhpd_opp_svs_l1>, + <&rpmhpd_opp_svs_l1>; + }; + + opp-444000000 { + opp-hz =3D /bits/ 64 <444000000>; + required-opps =3D <&rpmhpd_opp_nom>, + <&rpmhpd_opp_nom>; + }; + + opp-481000000 { + opp-hz =3D /bits/ 64 <481000000>; + required-opps =3D <&rpmhpd_opp_turbo>, + <&rpmhpd_opp_turbo>; + }; + }; + }; + videocc: clock-controller@aaf0000 { compatible =3D "qcom,x1e80100-videocc"; reg =3D <0 0x0aaf0000 0 0x10000>; --=20 2.34.1 From nobody Thu Oct 2 21:53:56 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BEA1313555 for ; Wed, 10 Sep 2025 09:03:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757494996; cv=none; b=ujJfir+rnK6+n9D8vm6Q/9fe9AHCqjI551NDUbFUHOhbOahwlJLB2V0xTk55+LC5ov2I9C+MHXoZ7KB59+ejoztI8VyvUDwCFsV1vz+CZk4a8tsTAILFYem8SV2Z1lI/zBIN66ws+mcYkqjFqUycWF/Ap6AZKO0Hvj4ao8lCoco= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757494996; c=relaxed/simple; bh=Fhh/0CgFlPz85rqryqhwFVLOSQN/810sUgcxOmvpuzA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SNjNOt7yHqcQn8RzdzuA4qtAiMrqqOs7LiOvL0ayDGvJY2q6zQUvgf1PVv05I4IFqeOhVS4kyst4pohwglTgf62dZevsu+qfAcs4VhvdGrqJC9ElT051gF38oJAK7WTCb049ZjB88Z7Az/772Sn92B968O0z/8ZBtSsZVIc3JhY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ICFQhjwY; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ICFQhjwY" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 58A7cmI4006828 for ; Wed, 10 Sep 2025 09:03:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= R7uLQx2UMz/Hfu2+gugoM5jTfWcN+hKIH1J/SSp6EcM=; b=ICFQhjwY/0+3BPRG ye37DLtHs5trnwQOWE0d9hSMDnGYBwZeae8HoDPyg9i8RIhSegSu9MGUPMg1pcwV YTpgcWYrSYKvfullIByhsFfYgpI3M5vyzIddRD5DerA6ldL8kQJz1qXZxS9WUGxL Nea54z/4rJPC+Kn71LPvHZbuAZ3ZyU00vsRXcnXLOFBP/ZFkHJVei+Nx178jSglf EdITuZTcTj6ShdOvoWuHPpSfAmHv/9fYl7v/3SftBGtIQjwWpvFzPzuK7FRMOJJC MVo+BZMxBzNBjugy3jAf8DAdiXCFDVBG+VKTBh+KPxRlFcrIKzFcE/VRIxAuz2nl EHczkg== Received: from mail-pl1-f197.google.com (mail-pl1-f197.google.com [209.85.214.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 491vc27add-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Wed, 10 Sep 2025 09:03:13 +0000 (GMT) Received: by mail-pl1-f197.google.com with SMTP id d9443c01a7336-24456ebed7bso7107915ad.0 for ; Wed, 10 Sep 2025 02:03:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757494992; x=1758099792; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R7uLQx2UMz/Hfu2+gugoM5jTfWcN+hKIH1J/SSp6EcM=; b=khd8/mffFjgif73Cec4B+LTG96d3kHlTj6ICxxP5Cj2QsyIKJSdwD1Qz66ofoS5cm3 sfFHGjWZUQQNZ/VJRynTNQOt6pxuhRUmMF5jHjc6DoWxZU4HYdiKctdsPVE59daafTTB kVEDyvmtiWomN/1vHTO5i+JlCRDyH4qIDAkFOBtq6YEDYga3B5kozvS6/VD075LQeXDJ JEV5UKrKgdZI6J21kozeWG6HvjUm56MExfXKJgUcTEpOFl4OiSGZXIDg+Qs/SCOmtoJ8 cMSKjzgvmMwDoULsaVp5oJkYS6MdZpzaxL667TsPGRJuIrvhx19mVyPwRCiH2VoeT+LC pqQA== X-Forwarded-Encrypted: i=1; AJvYcCVgm5CxCSVBKkdZ3y555OBlAxoYuQbBrNwFSX6FwfdnV2Js9r2vaRgPqjlRchsm1NtP/0qBnTqw+4M1Eco=@vger.kernel.org X-Gm-Message-State: AOJu0YxjuAQryrzYHb5uNCsM682ROeVZ83I0P3fdHTv9tOSbXAaYzq61 5VVWREJy4yz4v5j9SD+IZ0geu1OGGDuzolpM+bW1ljJv4L5EwShzDS5Un9gFjxCCzhZ/lX3gni6 zpTbIIa3pFeOXBNTHJgZ+od14zWM8B4j9S3QtcdysUmeUs+huE+p0A6zQrKofQLD2doY4Ks5KPg sRJg== X-Gm-Gg: ASbGncu29kBCFwhYMHeKR4wRFrEwz3Vg/LPYi3PYczkUMSZxKY2Y0HUoiZW42hYKPJd yyXR38kScC3xzat8mQRzZZmHUJRlmVTOVTeGOLMUiQ9C2MX3xReKAf4l/hZQdHFTpRTOUGWgfyV 0TN4hrCTck+wQntRMRvFvEg8RWKuR0drh4gAQsHInEjspdqD1FrwGNRj21UtePNs3ndLFdeEk9D u8OXQ3H/jw8nNQdBjMTWdgAKxZPo5sm7Eg5FC07WWkcdJSf58sbo+NaPSy563ZIzq0ClrDgi7Pl PTavcIDOMblF/nif7LwDEvY9p9CWm1rgzaDXaA0R/llowNrlQwUnCCiMSYn8MnPRIlbv4PtRgb/ Ne7u+OibftQ3x1TY37bSslmz2FhKS7dg6Vw== X-Received: by 2002:a17:903:4b4e:b0:249:71f5:4e5a with SMTP id d9443c01a7336-25179e3e476mr186585045ad.26.1757494991360; Wed, 10 Sep 2025 02:03:11 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHjt2B+2H0p0DUfWyTzjguorO9R5JowUSydLYGOTGoU6uUxyPBFc6Vs3JtGUgicP6mmhv6QRw== X-Received: by 2002:a17:903:4b4e:b0:249:71f5:4e5a with SMTP id d9443c01a7336-25179e3e476mr186584635ad.26.1757494990617; Wed, 10 Sep 2025 02:03:10 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-25a27c029ccsm21089155ad.41.2025.09.10.02.03.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Sep 2025 02:03:10 -0700 (PDT) From: Yijie Yang Date: Wed, 10 Sep 2025 17:02:11 +0800 Subject: [PATCH v11 3/4] arm64: dts: qcom: Add HAMOA-IOT-SOM platform Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250910-hamoa_initial-v11-3-38ed7f2015f7@oss.qualcomm.com> References: <20250910-hamoa_initial-v11-0-38ed7f2015f7@oss.qualcomm.com> In-Reply-To: <20250910-hamoa_initial-v11-0-38ed7f2015f7@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yijie Yang , Konrad Dybcio X-Mailer: b4 0.15-dev-5bbf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757494975; l=16080; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=Fhh/0CgFlPz85rqryqhwFVLOSQN/810sUgcxOmvpuzA=; b=EVFJrbyHqn9w+08sWm9S7aFA4/qjOAp4goUJLLnWHAu6O0dzJWVCB66pe1y611Niq03HNEPmU VKwM2jzF72SDazboos79Y/LWgh8fwAoS5AVbTgKxYW2AuSefXak2m9D X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Authority-Analysis: v=2.4 cv=FN4bx/os c=1 sm=1 tr=0 ts=68c13ed1 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=kJpOf-JYLzBZDkfq8aYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: xoREdTi3boxFbYV3lN5wNnrVCmcD1DYR X-Proofpoint-GUID: xoREdTi3boxFbYV3lN5wNnrVCmcD1DYR X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA4MDA5NCBTYWx0ZWRfXzKdxguRBQ1tN 4vLpIHJpODEiGCBJcXW77VRUPLkfoNbzbqpKj6T5U2dASzqHMruiYH4ZrrutdjNXzdAfDDmok50 A2GBjXsv1e0aeqzpZzpppplU1c6kU7YyNPiJ6gw2ev0JuqfjzehRMWPZHUZpJv2xejyw6Rryvol NzA8RwtQMVa96Gpmtb+Lav7W7MMJA+KLSOZizOorsAzDXYde6XxukVQYneLTtirfsKXIWnfBVy/ 4zZpmr/JFKdA0yj08xTwkrxoNtq2dNOMSSCMRRkwyQCq6vAJoI7TdhOjFShnNxsIME/XaNO1tQQ nEp5KJglP5eLQZgj44tuJ/6DHJF0hcflwYUPRH0wWPDIdnbhcYDJS7qZszix3+a5trqJYtJ+LHv QtkJo4BZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-09_03,2025-09-10_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 clxscore=1015 phishscore=0 adultscore=0 bulkscore=0 impostorscore=0 malwarescore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509080094 The HAMOA-IOT-SOM is a compact computing module that integrates a System on Chip (SoC) =E2=80=94 specifically the x1e80100 =E2=80=94 along with esse= ntial components optimized for IoT applications. It is designed to be mounted on carrier boards, enabling the development of complete embedded systems. Make the following peripherals on the SOM enabled: - Regulators on the SOM - Reserved memory regions - PCIe6a and its PHY - PCIe4 and its PHY - USB0 through USB6 and their PHYs - ADSP, CDSP - Graphic - Video Written in collaboration with Yingying Tang (PCIe4) and Wangao Wang (Video) . Reviewed-by: Konrad Dybcio Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 621 ++++++++++++++++++++++++= ++++ 1 file changed, 621 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/= dts/qcom/hamoa-iot-som.dtsi new file mode 100644 index 000000000000..c7c3a167eb6a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi @@ -0,0 +1,621 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "x1e80100.dtsi" +#include "x1e80100-pmics.dtsi" +#include +#include + +/ { + compatible =3D "hamoa-iot-som", "qcom,x1e80100"; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; +}; + +&apps_rsc { + /* PMC8380C_B */ + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob1-supply =3D <&vph_pwr>; + vdd-bob2-supply =3D <&vph_pwr>; + vdd-l1-l4-l10-supply =3D <&vreg_s4c_1p8>; + vdd-l2-l13-l14-supply =3D <&vreg_bob1>; + vdd-l5-l16-supply =3D <&vreg_bob1>; + vdd-l6-l7-supply =3D <&vreg_bob2>; + vdd-l8-l9-supply =3D <&vreg_bob1>; + vdd-l12-supply =3D <&vreg_s5j_1p2>; + vdd-l15-supply =3D <&vreg_s4c_1p8>; + vdd-l17-supply =3D <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l4b_1p8: ldo4 { + regulator-name =3D "vreg_l4b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l5b_3p0: ldo5 { + regulator-name =3D "vreg_l5b_3p0"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_2p8: ldo7 { + regulator-name =3D "vreg_l7b_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_3p0: ldo8 { + regulator-name =3D "vreg_l8b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10b_1p8: ldo10 { + regulator-name =3D "vreg_l10b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p2: ldo12 { + regulator-name =3D "vreg_l12b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p0: ldo14 { + regulator-name =3D "vreg_l14b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l16b_2p9: ldo16 { + regulator-name =3D "vreg_l16b_2p9"; + regulator-min-microvolt =3D <2912000>; + regulator-max-microvolt =3D <2912000>; + regulator-initial-mode =3D ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name =3D "vreg_l17b_2p5"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2504000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_C */ + regulators-1 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s4c_1p8: smps4 { + regulator-name =3D "vreg_s4c_1p8"; + regulator-min-microvolt =3D <1856000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name =3D "vreg_l1c_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_0p8: ldo2 { + regulator-name =3D "vreg_l2c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name =3D "vreg_l3c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_D */ + regulators-2 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s4c_1p8>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_l1d_0p8: ldo1 { + regulator-name =3D "vreg_l1d_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2d_0p9: ldo2 { + regulator-name =3D "vreg_l2d_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3d_1p8: ldo3 { + regulator-name =3D "vreg_l3d_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_E */ + regulators-3 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + + vreg_l2e_0p8: ldo2 { + regulator-name =3D "vreg_l2e_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_F */ + regulators-4 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "f"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_s1f_0p7: smps1 { + regulator-name =3D "vreg_s1f_0p7"; + regulator-min-microvolt =3D <700000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1f_1p0: ldo1 { + regulator-name =3D "vreg_l1f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + + vreg_l2f_1p0: ldo2 { + regulator-name =3D "vreg_l2f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + + vreg_l3f_1p0: ldo3 { + regulator-name =3D "vreg_l3f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_I */ + regulators-6 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "i"; + + vdd-l1-supply =3D <&vreg_s4c_1p8>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + + vreg_s1i_0p9: smps1 { + regulator-name =3D "vreg_s1i_0p9"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_s2i_1p0: smps2 { + regulator-name =3D "vreg_s2i_1p0"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1i_1p8: ldo1 { + regulator-name =3D "vreg_l1i_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2i_1p2: ldo2 { + regulator-name =3D "vreg_l2i_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3i_0p8: ldo3 { + regulator-name =3D "vreg_l3i_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_J */ + regulators-7 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "j"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s5-supply =3D <&vph_pwr>; + + vreg_s5j_1p2: smps5 { + regulator-name =3D "vreg_s5j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l1j_0p8: ldo1 { + regulator-name =3D "vreg_l1j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2j_1p2: ldo2 { + regulator-name =3D "vreg_l2j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + }; + + vreg_l3j_0p8: ldo3 { + regulator-name =3D "vreg_l3j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&iris { + status =3D "okay"; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/x1e80100/gen70500_zap.mbn"; +}; + +&pcie4 { + perst-gpios =3D <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 148 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie4_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&pcie6a { + perst-gpios =3D <&tlmm 152 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 154 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie6a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie6a_phy { + vdda-phy-supply =3D <&vreg_l1d_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&qupv3_0 { + status =3D "okay"; +}; + +&qupv3_1 { + status =3D "okay"; +}; + +&qupv3_2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/x1e80100/adsp.mbn", + "qcom/x1e80100/adsp_dtb.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/x1e80100/cdsp.mbn", + "qcom/x1e80100/cdsp_dtb.mbn"; + + status =3D "okay"; +}; + +&tlmm { + gpio-reserved-ranges =3D <34 2>, /* TPM LP & INT */ + <44 4>; /* SPI (TPM) */ + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie6a_default: pcie6a-default-state { + clkreq-n-pins { + pins =3D "gpio153"; + function =3D "pcie6a_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio152"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio154"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + + }; + }; +}; + +&usb_1_ss0 { + status =3D "okay"; +}; + +&usb_1_ss0_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss0_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss0_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l1j_0p8>; + + status =3D "okay"; +}; + +&usb_1_ss1 { + status =3D "okay"; +}; + +&usb_1_ss1_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss1_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss1_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_1_ss2 { + status =3D "okay"; +}; + +&usb_1_ss2_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss2_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss2_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_2 { + status =3D "okay"; +}; + +&usb_2_dwc3 { + dr_mode =3D "host"; +}; + +&usb_2_hsphy { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp { + status =3D "okay"; +}; + +&usb_mp_hsphy0 { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp_hsphy1 { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp_qmpphy0 { + vdda-phy-supply =3D <&vreg_l3e_1p2>; + vdda-pll-supply =3D <&vreg_l3c_0p8>; + + status =3D "okay"; +}; + +&usb_mp_qmpphy1 { + vdda-phy-supply =3D <&vreg_l3e_1p2>; + vdda-pll-supply =3D <&vreg_l3c_0p8>; + + status =3D "okay"; +}; --=20 2.34.1 From nobody Thu Oct 2 21:53:56 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D08C0313547 for ; Wed, 10 Sep 2025 09:03:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757495000; cv=none; b=NPkVigpGNRqgQKPJVMf1e3cP8O18AIjcyKb8uNE/Uh0VZsYZSUpMWUO4TVbpu/OVhwMznprjtQM/GU/IxWBBLT9iVKd3mNW6J3HLSiO1xDS8sROFmrjCWqUsOrXcB27Izm+mPz6zSaynU52w9AGqVIdLJ1BB2J8HsMYuTDYyBXU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757495000; c=relaxed/simple; bh=YRVpofsq82PiyAhQWK6/oJbCeFfriW5iGiEZ/ENuIbg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZtXIPawIEVmllWq3272dLSvoCxzjZ41ST04E635ijNgTPo0o5D1sv8Yb6Dghfyi8mOJ3E0Bc/q4pZdDN9ZHYRtD6AGPFbLDymPbMCaGFsAWuxmbqV/WS1IdyIANN36hgGw/M6gf39WrnJuYpDc4eXcbc2rqTlDzJuH7ER+9oI2I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=YvGii4CA; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="YvGii4CA" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 58A7ci19017964 for ; Wed, 10 Sep 2025 09:03:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= FAivy+GMUW1ZKvi0RW/HP8iwU9vcsNcC1c4RmPutrU0=; b=YvGii4CA+6qEgBYu au3NVFRHM4ykVlYj37GVtHoSNi/uP7urpOmmc566iMBPIl/OotB081gVlkG6eUxT GAr2F5ivtvUMkZDZ+Y9D+zJ4C71RApDUnYUpn9Ha9XC1H09f7c25XFkNQbIoPn0r 20bEjk5oh2A3YaLiTUNbK+n2lPCxkvL3d5sNuUTqH0bE0XJa3KZI27UM1vnBaxTE 1inksVPKpPo+43oC11OQJrt7ytpRrHVAwzIRqd2okHiCxx+uz/0sR3aMyNqDReq6 MZ5ETI1TMndTeTzo6ExVlHuYTcGa0RIUOXjcd779OvgUuOrNN3Jnb9ijDAGK4ixH ValN3Q== Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 490c9jbc8g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Wed, 10 Sep 2025 09:03:16 +0000 (GMT) Received: by mail-pl1-f200.google.com with SMTP id d9443c01a7336-24caf28cce0so155375325ad.0 for ; Wed, 10 Sep 2025 02:03:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757494995; x=1758099795; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FAivy+GMUW1ZKvi0RW/HP8iwU9vcsNcC1c4RmPutrU0=; b=Sk6DReqewaQ5lDmN3WTW0LKtLwTuccgHd/5x8/8wEj6DSszL/0i7WaCPFcgoxnKQlk mdhX9UdLud00mck7/Hl7e14/+4Ij5Xvft+0r2ENlwkUaCIn8dMpPIROgq7UhBkMKMycy /tEKbAMw+9OVDgAXbCLzzZtkLpBqMlxyvYZgQd1hKVLicpMalV/x8X7MNx8RkwMypy7p Rsu+zNsTsdWZM/WblSImBg5GoelGLIlzlq3ZvkkLF7KxrrysUQMUjZYBaIrMb1YEN2ay Z1TKskRjA4SJM7faMECdNVQYFvf1DO8WOAG4vabiiX8TEfh9VbRZsI3LA9YvR+xrM0cO M7oA== X-Forwarded-Encrypted: i=1; AJvYcCUDjhV567NYAXID/EkUDy8sZLC4ZOIBIlT6pdEqlJ7ItBMVTY0s8Kg1UgdskXhkAMRpcZSJ9ODM0CF5uNo=@vger.kernel.org X-Gm-Message-State: AOJu0Yzz+8HGvdULBKDpf6dc1nP9J5/lhTL8CVbG3iCtdD4Alz0kEkVV f7YXw0tHeWN7v2QtXDExZHtsuFs7/LD6FBXCxlN0UMzslzL6BBkiglaoXcsUMKkQWCoi4hECjYK QBdojP0Ap7iEGxJXLaQAZ16WDfP+njRa9zvKcTMqS1n5gxaD4DOM4wUOwjW0c6koh7xg= X-Gm-Gg: ASbGncsHMRABLUecGaV6xS3BhXhlP5cdrABzss+L9D0iNL7jh5haYQABrqLqfGeFOQy Q+bN5NPFXta3XDUm4WIlWJzzVBSFQW+5gXBQhhMROXe7HfPGtvWRDRvDcseEvheRN25d+BDY0lk LbwgqZOkdYOwdySw1Gdfkq3xPFEBPy1yGEifbRzRuhP14UtUY6SsCj/VpwGfmhQcYZAfwUFaZ6U uqL+UQG8+8UhtKY1zjMDBeA+z4LzI4eNv+GJhNLWF9hhraGuLxrowPVKpVfz+QSsFNNBEjDOnSe kQmiAVa8pfGwJ6RmR7X0sVUBfZUMWVALW0HSW0Riokv0haB0tXYVE1G2ja0213cvnaIqyyf8155 Xg0GaWbnWXhr2bIA9ZiH2ouW1nUYi9nGXWA== X-Received: by 2002:a17:903:1904:b0:24c:92b5:2175 with SMTP id d9443c01a7336-2517057f138mr205365215ad.24.1757494994737; Wed, 10 Sep 2025 02:03:14 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEI+kxmrAuUpSlkA+3J6uN+kJVj263OjNLeBY683C9kyi4NmXS9f9BM3SU0fm0d0tgGPn3vAw== X-Received: by 2002:a17:903:1904:b0:24c:92b5:2175 with SMTP id d9443c01a7336-2517057f138mr205364785ad.24.1757494994064; Wed, 10 Sep 2025 02:03:14 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-25a27c029ccsm21089155ad.41.2025.09.10.02.03.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Sep 2025 02:03:13 -0700 (PDT) From: Yijie Yang Date: Wed, 10 Sep 2025 17:02:12 +0800 Subject: [PATCH v11 4/4] arm64: dts: qcom: Add base HAMOA-IOT-EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250910-hamoa_initial-v11-4-38ed7f2015f7@oss.qualcomm.com> References: <20250910-hamoa_initial-v11-0-38ed7f2015f7@oss.qualcomm.com> In-Reply-To: <20250910-hamoa_initial-v11-0-38ed7f2015f7@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yijie Yang X-Mailer: b4 0.15-dev-5bbf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757494975; l=27798; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=YRVpofsq82PiyAhQWK6/oJbCeFfriW5iGiEZ/ENuIbg=; b=j3vszdR0GArcgLYr19ZlVn5tlXqP0h6QfPGTrpTcEBmrTJVWydGucI3v5bg2O26Ttym7qq2t6 GyKVjtPcomHDwFVfFWIt2sVdnkUzJ27d6uQl272XdfScD6jcdEZY4IL X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA2MDAyMiBTYWx0ZWRfX9LAepwxZ0qmU uZRYLLEJgoc+JDlcCiuRKuL31k7tF4P2s7M1pLuqO5+is6gks4xLi2yoMeQg7kCAJmo7ZR8TuCU rYOMUy6sUKg5VA7RFkGDdjmXgjAD8/P9eAQ+CS40yQYskoxweMP2XaqHbgbumIDjoq6V/7iv7Md P4NMNB+6U0JQGZROcxgGuc6soCVNGWyx937LD7avEYAPNVYiaLPo1fbVX/WLUOHqoewpIuJfqjP i2uFZ/aDrl4iAQgEP6IjRsiWQ64t+m4EO0v89swrznxJDkz4UAcMteAuNytmmdnMWVZVWPFswYm 8DSLdEfp2cM9io/vjAZLR6ofeMInzo2ql+tsbgRBrHpVAfLLyIFCDr00cGH4WiCTxl0uu10+OKa zRHa9zq5 X-Proofpoint-ORIG-GUID: FFs_R5rsRc37gJdmgKB_jEW-7vG8Vigj X-Authority-Analysis: v=2.4 cv=PpOTbxM3 c=1 sm=1 tr=0 ts=68c13ed4 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=0tVnaCvAkXLXzvIwGYMA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: FFs_R5rsRc37gJdmgKB_jEW-7vG8Vigj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-09_03,2025-09-10_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 spamscore=0 bulkscore=0 clxscore=1015 malwarescore=0 adultscore=0 impostorscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509060022 The HAMOA-IOT-EVK is an evaluation platform for IoT products, composed of the Hamoa IoT SoM and a carrier board. Together, they form a complete embedded system capable of booting to UART. Make the following peripherals on the carrier board enabled: - UART - On-board regulators - USB Type-C mux - Pinctrl - Embedded USB (EUSB) repeaters - NVMe - pmic-glink - USB DisplayPorts - Bluetooth - WLAN - Audio Written in collaboration with Quill Qi (Audio) , Jie Zhang (Graphics) , Shuai Zhang (Bluetooth) , Yingying Tang (WLAN) , and Yongxing Mou (USB DisplayPorts) . Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 1221 ++++++++++++++++++++++++= ++++ 2 files changed, 1222 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 0e4e0e0b833b..3d11e93cd5cc 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D apq8039-t2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8094-sony-xperia-kitakami-karin_windy.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-ifc6640.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D hamoa-iot-evk.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-rdp432-c2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-tplink-archer-ax55-v1.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5332-rdp441.dtb diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/d= ts/qcom/hamoa-iot-evk.dts new file mode 100644 index 000000000000..6eedad7e858a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts @@ -0,0 +1,1221 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "hamoa-iot-som.dtsi" + +/ { + model =3D "Qualcomm Technologies, Inc. Hamoa IoT EVK"; + compatible =3D "qcom,hamoa-iot-evk", "qcom,hamoa-iot-som", "qcom,x1e80100= "; + chassis-type =3D "embedded"; + + aliases { + serial0 =3D &uart21; + serial1 =3D &uart14; + }; + + wcd938x: audio-codec { + compatible =3D "qcom,wcd9385-codec"; + + pinctrl-0 =3D <&wcd_default>; + pinctrl-names =3D "default"; + + reset-gpios =3D <&tlmm 191 GPIO_ACTIVE_LOW>; + + qcom,micbias1-microvolt =3D <1800000>; + qcom,micbias2-microvolt =3D <1800000>; + qcom,micbias3-microvolt =3D <1800000>; + qcom,micbias4-microvolt =3D <1800000>; + qcom,mbhc-buttons-vthreshold-microvolt =3D <75000 150000 237000 500000 + 500000 500000 500000 500000>; + qcom,mbhc-headset-vthreshold-microvolt =3D <1700000>; + qcom,mbhc-headphone-vthreshold-microvolt =3D <50000>; + qcom,rx-device =3D <&wcd_rx>; + qcom,tx-device =3D <&wcd_tx>; + + vdd-buck-supply =3D <&vreg_l15b_1p8>; + vdd-rxtx-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l15b_1p8>; + vdd-mic-bias-supply =3D <&vreg_bob1>; + + #sound-dai-cells =3D <1>; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + pmic-glink { + compatible =3D "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells =3D <1>; + #size-cells =3D <0>; + orientation-gpios =3D <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>, + <&tlmm 125 GPIO_ACTIVE_HIGH>; + + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss1_con_sbu_out>; + }; + }; + }; + }; + + connector@2 { + compatible =3D "usb-c-connector"; + reg =3D <2>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss2_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss2_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss2_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss2_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss2_con_sbu_out>; + }; + }; + }; + }; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_NVME_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + /* Left unused as the retimer is not used on this board. */ + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p15: regulator-rtmr2-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 189 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p8: regulator-rtmr2-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 126 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_3p3: regulator-rtmr2-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 187 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + /* + * TODO: These two regulators are actually part of the removable M.2 + * card and not the CRD mainboard. Need to describe this differently. + * Functionally it works correctly, because all we need to do is to + * turn on the actual 3.3V supply above. + */ + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_1P9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + + regulator-always-on; + }; + + vreg_wwan: regulator-wwan { + compatible =3D "regulator-fixed"; + + regulator-name =3D "SDX_VPH_PWR"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 221 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wwan_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + sound { + compatible =3D "qcom,x1e80100-sndcard"; + model =3D "X1E80100-EVK"; + audio-routing =3D "WooferLeft IN", "WSA WSA_SPK1 OUT", + "TweeterLeft IN", "WSA WSA_SPK2 OUT", + "WooferRight IN", "WSA2 WSA_SPK2 OUT", + "TweeterRight IN", "WSA2 WSA_SPK2 OUT", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC2", "MIC BIAS2", + "VA DMIC0", "MIC BIAS3", + "VA DMIC1", "MIC BIAS3", + "VA DMIC2", "MIC BIAS1", + "VA DMIC3", "MIC BIAS1", + "TX SWR_INPUT1", "ADC2_OUTPUT"; + + wcd-playback-dai-link { + link-name =3D "WCD Playback"; + + codec { + sound-dai =3D <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai RX_CODEC_DMA_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wcd-capture-dai-link { + link-name =3D "WCD Capture"; + + codec { + sound-dai =3D <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + codec { + sound-dai =3D <&left_woofer>, + <&left_tweeter>, + <&swr0 0>, + <&lpass_wsamacro 0>, + <&right_woofer>, + <&right_tweeter>, + <&swr3 0>, + <&lpass_wsa2macro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + va-dai-link { + link-name =3D "VA Capture"; + + codec { + sound-dai =3D <&lpass_vamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + + usb-1-ss0-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 168 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 167 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss0_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss0_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_sbu>; + }; + }; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_1p8>; + vddaon-supply =3D <&vreg_wcn_0p95>; + vdddig-supply =3D <&vreg_wcn_0p95>; + vddrfa1p2-supply =3D <&vreg_wcn_1p9>; + vddrfa1p8-supply =3D <&vreg_wcn_1p9>; + + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + wlan-enable-gpios =3D <&tlmm 117 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&i2c1 { + clock-frequency =3D <400000>; + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x08>; + + clocks =3D <&rpmhcc RPMH_RF_CLK5>; + + vdd-supply =3D <&vreg_rtmr2_1p15>; + vdd33-supply =3D <&vreg_rtmr2_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr2_3p3>; + vddar-supply =3D <&vreg_rtmr2_1p15>; + vddat-supply =3D <&vreg_rtmr2_1p15>; + vddio-supply =3D <&vreg_rtmr2_1p8>; + + reset-gpios =3D <&tlmm 185 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr2_default>; + pinctrl-names =3D "default"; + + orientation-switch; + retimer-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss2_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss2_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss2_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c5 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + eusb3_repeater: redriver@47 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x47>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb3_reset_n>; + pinctrl-names =3D "default"; + }; + + eusb5_repeater: redriver@43 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x43>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 7 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb5_reset_n>; + pinctrl-names =3D "default"; + }; + + eusb6_repeater: redriver@4f { + compatible =3D "nxp,ptn3222"; + reg =3D <0x4f>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 184 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb6_reset_n>; + pinctrl-names =3D "default"; + }; +}; + +&i2c7 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + clocks =3D <&rpmhcc RPMH_RF_CLK4>; + + vdd-supply =3D <&vreg_rtmr1_1p15>; + vdd33-supply =3D <&vreg_rtmr1_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr1_3p3>; + vddar-supply =3D <&vreg_rtmr1_1p15>; + vddat-supply =3D <&vreg_rtmr1_1p15>; + vddio-supply =3D <&vreg_rtmr1_1p8>; + + reset-gpios =3D <&tlmm 176 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr1_default>; + pinctrl-names =3D "default"; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_con_sbu_in>; + }; + }; + }; + }; +}; + +&lpass_tlmm { + spkr_01_sd_n_active: spkr-01-sd-n-active-state { + pins =3D "gpio12"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-low; + }; + + spkr_23_sd_n_active: spkr-23-sd-n-active-state { + pins =3D "gpio13"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-low; + }; +}; + +&lpass_vamacro { + pinctrl-0 =3D <&dmic01_default>, <&dmic23_default>; + pinctrl-names =3D "default"; + + vdd-micb-supply =3D <&vreg_l1b_1p8>; + qcom,dmic-sample-rate =3D <4800000>; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp2 { + status =3D "okay"; +}; + +&mdss_dp2_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp3 { + /delete-property/ #sound-dai-cells; + + status =3D "okay"; + + aux-bus { + panel { + compatible =3D "edp-panel"; + power-supply =3D <&vreg_edp_3p3>; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; +}; + +&mdss_dp3_out { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; + + remote-endpoint =3D <&edp_panel_in>; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l3j_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pcie6a { + vddpe-3v3-supply =3D <&vreg_nvme>; +}; + +&pm8550_gpios { + rtmr0_default: rtmr0-reset-n-active-state { + pins =3D "gpio10"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; + + usb0_3p3_reg_en: usb0-3p3-reg-en-state { + pins =3D "gpio11"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pm8550ve_9_gpios { + usb0_1p8_reg_en: usb0-1p8-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pmc8380_5_gpios { + usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&smb2360_0 { + status =3D "okay"; +}; + +&smb2360_0_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l2b_3p0>; +}; + +&smb2360_1 { + status =3D "okay"; +}; + +&smb2360_1_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l14b_3p0>; +}; + +&smb2360_2 { + status =3D "okay"; +}; + +&smb2360_2_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l8b_3p0>; +}; + +&swr0 { + status =3D "okay"; + + pinctrl-0 =3D <&wsa_swr_active>, <&spkr_01_sd_n_active>; + pinctrl-names =3D "default"; + + /* WSA8845, Left Woofer */ + left_woofer: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "WooferLeft"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <1 2 3 7 10 13>; + }; + + /* WSA8845, Left Tweeter */ + left_tweeter: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TweeterLeft"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <4 5 6 7 11 13>; + }; +}; + +&swr1 { + status =3D "okay"; + + /* WCD9385 RX */ + wcd_rx: codec@0,4 { + compatible =3D "sdw20217010d00"; + reg =3D <0 4>; + qcom,rx-port-mapping =3D <1 2 3 4 5>; + }; +}; + +&swr2 { + status =3D "okay"; + + /* WCD9385 TX */ + wcd_tx: codec@0,3 { + compatible =3D "sdw20217010d00"; + reg =3D <0 3>; + qcom,tx-port-mapping =3D <2 2 3 4>; + }; +}; + +&swr3 { + status =3D "okay"; + + pinctrl-0 =3D <&wsa2_swr_active>, <&spkr_23_sd_n_active>; + pinctrl-names =3D "default"; + + /* WSA8845, Right Woofer */ + right_woofer: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "WooferRight"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <1 2 3 7 10 13>; + }; + + /* WSA8845, Right Tweeter */ + right_tweeter: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TweeterRight"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <4 5 6 7 11 13>; + }; +}; + +&tlmm { + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + eusb3_reset_n: eusb3-reset-n-state { + pins =3D "gpio6"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; + + eusb5_reset_n: eusb5-reset-n-state { + pins =3D "gpio7"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + output-low; + }; + + eusb6_reset_n: eusb6-reset-n-state { + pins =3D "gpio184"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + output-low; + }; + + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr1_default: rtmr1-reset-n-active-state { + pins =3D "gpio176"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr2_default: rtmr2-reset-n-active-state { + pins =3D "gpio185"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state { + pins =3D "gpio188"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state { + pins =3D "gpio175"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state { + pins =3D "gpio186"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_1p15_reg_en: usb2-pwr-1p15-reg-en-state { + pins =3D "gpio189"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_1p8_reg_en: usb2-pwr-1p8-reg-en-state { + pins =3D "gpio126"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state { + pins =3D "gpio187"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb_1_ss0_sbu_default: usb-1-ss0-sbu-state { + mode-pins { + pins =3D "gpio166"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + output-high; + }; + + oe-n-pins { + pins =3D "gpio168"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio167"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + }; + + wcd_default: wcd-reset-n-active-state { + pins =3D "gpio191"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-low; + }; + + wcn_bt_en: wcn-bt-en-state { + pins =3D "gpio116"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wwan_sw_en: wwan-sw-en-state { + pins =3D "gpio221"; + function =3D "gpio"; + drive-strength =3D <4>; + bias-disable; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio214"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + /* Switches USB signal routing between the USB connector and the Wi-Fi ca= rd. */ + wcn_usb_sw_n: wcn-usb-sw-n-state { + pins =3D "gpio225"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-high; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&uart21 { + compatible =3D "qcom,geni-debug-uart"; + + status =3D "okay"; +}; + +&usb_1_ss0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss0_hs_in>; +}; + +&usb_1_ss0_hsphy { + phys =3D <&smb2360_0_eusb2_repeater>; +}; + +&usb_1_ss0_qmpphy_out { + remote-endpoint =3D <&pmic_glink_ss0_ss_in>; +}; + +&usb_1_ss1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss1_hs_in>; +}; + +&usb_1_ss1_hsphy { + phys =3D <&smb2360_1_eusb2_repeater>; +}; + +&usb_1_ss1_qmpphy_out { + remote-endpoint =3D <&retimer_ss1_ss_in>; +}; + +&usb_1_ss2_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss2_hs_in>; +}; + +&usb_1_ss2_hsphy { + phys =3D <&smb2360_2_eusb2_repeater>; +}; + +&usb_1_ss2_qmpphy_out { + remote-endpoint =3D <&retimer_ss2_ss_in>; +}; + +&usb_2_hsphy { + phys =3D <&eusb5_repeater>; + + pinctrl-0 =3D <&wcn_usb_sw_n>; + pinctrl-names =3D "default"; +}; + +&usb_mp_hsphy0 { + phys =3D <&eusb3_repeater>; +}; + +&usb_mp_hsphy1 { + phys =3D <&eusb6_repeater>; +}; --=20 2.34.1