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Support for 8-bit instructions was omitted from the original commit purely due to complications with BT not having a r/m8 variant. To keep the RFLAGS.CF behavior deterministic and not heavily biased to '0' or '1', continue using BT, but cast and load the to-be-tested value into a dedicated 32-bit constraint. Supporting 8-bit operations will allow using guest_test_fastops() as-is to provide full coverage for DIV and IDIV. For divide operations, covering all operand sizes _is_ interesting, because KVM needs provide exception fixup for each size (failure to handle a #DE could panic the host). Link: https://lore.kernel.org/all/aIF7ZhWZxlkcpm4y@google.com Signed-off-by: Sean Christopherson --- .../testing/selftests/kvm/x86/fastops_test.c | 20 ++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/tools/testing/selftests/kvm/x86/fastops_test.c b/tools/testing= /selftests/kvm/x86/fastops_test.c index 2ac89d6c1e46..6c9a2dbf6365 100644 --- a/tools/testing/selftests/kvm/x86/fastops_test.c +++ b/tools/testing/selftests/kvm/x86/fastops_test.c @@ -10,12 +10,13 @@ */ #define guest_execute_fastop_1(FEP, insn, __val, __flags) \ ({ \ - __asm__ __volatile__("bt $0, %[val]\n\t" \ + __asm__ __volatile__("bt $0, %[ro_val]\n\t" \ FEP insn " %[val]\n\t" \ "pushfq\n\t" \ "pop %[flags]\n\t" \ : [val]"+r"(__val), [flags]"=3Dr"(__flags) \ - : : "cc", "memory"); \ + : [ro_val]"rm"((uint32_t)__val) \ + : "cc", "memory"); \ }) =20 #define guest_test_fastop_1(insn, type_t, __val) \ @@ -36,12 +37,13 @@ =20 #define guest_execute_fastop_2(FEP, insn, __input, __output, __flags) \ ({ \ - __asm__ __volatile__("bt $0, %[output]\n\t" \ + __asm__ __volatile__("bt $0, %[ro_val]\n\t" \ FEP insn " %[input], %[output]\n\t" \ "pushfq\n\t" \ "pop %[flags]\n\t" \ : [output]"+r"(__output), [flags]"=3Dr"(__flags) \ - : [input]"r"(__input) : "cc", "memory"); \ + : [input]"r"(__input), [ro_val]"rm"((uint32_t)__output) \ + : "cc", "memory"); \ }) =20 #define guest_test_fastop_2(insn, type_t, __val1, __val2) \ @@ -63,12 +65,13 @@ =20 #define guest_execute_fastop_cl(FEP, insn, __shift, __output, __flags) \ ({ \ - __asm__ __volatile__("bt $0, %[output]\n\t" \ + __asm__ __volatile__("bt $0, %[ro_val]\n\t" \ FEP insn " %%cl, %[output]\n\t" \ "pushfq\n\t" \ "pop %[flags]\n\t" \ : [output]"+r"(__output), [flags]"=3Dr"(__flags) \ - : "c"(__shift) : "cc", "memory"); \ + : "c"(__shift), [ro_val]"rm"((uint32_t)__output) \ + : "cc", "memory"); \ }) =20 #define guest_test_fastop_cl(insn, type_t, __val1, __val2) \ @@ -115,14 +118,16 @@ do { \ guest_test_fastop_2("add" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("adc" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("and" suffix, type_t, vals[i], vals[j]); \ +if (sizeof(type_t) !=3D 1) { \ guest_test_fastop_2("bsf" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("bsr" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("bt" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("btc" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("btr" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("bts" suffix, type_t, vals[i], vals[j]); \ - guest_test_fastop_2("cmp" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("imul" suffix, type_t, vals[i], vals[j]); \ +} \ + guest_test_fastop_2("cmp" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("or" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("sbb" suffix, type_t, vals[i], vals[j]); \ guest_test_fastop_2("sub" suffix, type_t, vals[i], vals[j]); \ @@ -142,6 +147,7 @@ do { \ =20 static void guest_code(void) { + guest_test_fastops(uint8_t, "b"); guest_test_fastops(uint16_t, "w"); guest_test_fastops(uint32_t, "l"); guest_test_fastops(uint64_t, "q"); --=20 2.51.0.384.g4c02a37b29-goog