From nobody Fri Oct 3 01:09:30 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EBD2D2D0C76; Tue, 9 Sep 2025 09:39:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757410799; cv=none; b=SZYndoQBGugyxC9/uab22nA7PoLcUBqaaby1CVBYtnYHVITYAAMhbs0sdZCra7Br8LYpYLUQbPheTDsBBWu30UbE783PwEoKplHV+9sdQcYYuHP9jeg+LparbEaGRXKUWrAmd69Qd/De+xDxYu6bjxt/HhaIhrgwlYUElMxvKDk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757410799; c=relaxed/simple; bh=TAJjXB9Dhwg8HbkLhFSaXGAsICn7WJdki2ovSAWmjBs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VgJ6PHXCktsTK648bsrYq/XZ6ZeEf+Lko8AV2jBns0udu0vHd8fRm2TGFntPEp8rAwR1Lav3bNrYzSflMnXoQaATY8C/ZBjIZMcIGIrNzvF4VERtsh7OPy6hZtkp5QvTJVKOkNzXcZmuXo5K6ntfGwaCW1wtak+Ov3BoC8TTSis= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Q1N6Ap3b; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Q1N6Ap3b" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1757410798; x=1788946798; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TAJjXB9Dhwg8HbkLhFSaXGAsICn7WJdki2ovSAWmjBs=; b=Q1N6Ap3b6g4ihJ/iSYMEp0ypRU81g8FGfgmbq+VlycAnkMqCU+toh+y4 rheKJylNHYiF/OKKWe4HqN6OUw0lrjJMVa4YHbrTThMDdMrVHVdSoR4qg LJRPx+CxysRS17j9Q6IS/erMf9IlZ8gi8zwbKbo5/xZmLua43bwIlMyVR 6bviI3NEy3PPm53h74VnsxIbFgT6nZHJoBqJVTnIi0RcD9LG/cbDLl7qJ FdsKfrqjVnyGInclfxWmGyJJQbLuSuGGVWxEZj1ge5Y1l/tX/rorj06QS 1uZl9ZVYxas7VXpTe8YEuizFtQ4onK+oYe4XEFXVFSixcc2HbXQ8F4ehB w==; X-CSE-ConnectionGUID: Zdz4iMvwTGGydrBOal/J6A== X-CSE-MsgGUID: 0NBx3CsBTUGDxEdkKa5mag== X-IronPort-AV: E=McAfee;i="6800,10657,11547"; a="70307202" X-IronPort-AV: E=Sophos;i="6.18,251,1751266800"; d="scan'208";a="70307202" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Sep 2025 02:39:54 -0700 X-CSE-ConnectionGUID: Ro8f3RfdRkGXa7hzlse4eg== X-CSE-MsgGUID: Hj4gRW8PQO+Uxaa+MiRLxw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,251,1751266800"; d="scan'208";a="172207397" Received: from unknown (HELO CannotLeaveINTEL.jf.intel.com) ([10.165.54.94]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Sep 2025 02:39:54 -0700 From: Chao Gao To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: acme@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, john.allen@amd.com, mingo@kernel.org, mingo@redhat.com, minipli@grsecurity.net, mlevitsk@redhat.com, namhyung@kernel.org, pbonzini@redhat.com, prsampat@amd.com, rick.p.edgecombe@intel.com, seanjc@google.com, shuah@kernel.org, tglx@linutronix.de, weijiang.yang@intel.com, x86@kernel.org, xin@zytor.com, xiaoyao.li@intel.com Subject: [PATCH v14 04/22] KVM: x86: Refresh CPUID on write to guest MSR_IA32_XSS Date: Tue, 9 Sep 2025 02:39:35 -0700 Message-ID: <20250909093953.202028-5-chao.gao@intel.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20250909093953.202028-1-chao.gao@intel.com> References: <20250909093953.202028-1-chao.gao@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yang Weijiang Update CPUID.(EAX=3D0DH,ECX=3D1).EBX to reflect current required xstate size due to XSS MSR modification. CPUID(EAX=3D0DH,ECX=3D1).EBX reports the required storage size of all enabl= ed xstate features in (XCR0 | IA32_XSS). The CPUID value can be used by guest before allocate sufficient xsave buffer. Note, KVM does not yet support any XSS based features, i.e. supported_xss is guaranteed to be zero at this time. Opportunistically skip CPUID updates if XSS value doesn't change. Suggested-by: Sean Christopherson Co-developed-by: Zhang Yi Z Signed-off-by: Zhang Yi Z Signed-off-by: Yang Weijiang Reviewed-by: Maxim Levitsky Reviewed-by: Chao Gao Tested-by: Mathias Krause Tested-by: John Allen Tested-by: Rick Edgecombe Signed-off-by: Chao Gao Reviewed-by: Binbin Wu Reviewed-by: Xiaoyao Li --- arch/x86/kvm/cpuid.c | 3 ++- arch/x86/kvm/x86.c | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 46cf616663e6..b5f87254ced7 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -316,7 +316,8 @@ static void kvm_update_cpuid_runtime(struct kvm_vcpu *v= cpu) best =3D kvm_find_cpuid_entry_index(vcpu, 0xD, 1); if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) || cpuid_entry_has(best, X86_FEATURE_XSAVEC))) - best->ebx =3D xstate_required_size(vcpu->arch.xcr0, true); + best->ebx =3D xstate_required_size(vcpu->arch.xcr0 | + vcpu->arch.ia32_xss, true); } =20 static bool kvm_cpuid_has_hyperv(struct kvm_vcpu *vcpu) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 6c167117018c..bbae3bf405c7 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -4020,6 +4020,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct = msr_data *msr_info) */ if (data & ~vcpu->arch.guest_supported_xss) return 1; + if (vcpu->arch.ia32_xss =3D=3D data) + break; vcpu->arch.ia32_xss =3D data; vcpu->arch.cpuid_dynamic_bits_dirty =3D true; break; --=20 2.47.3