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charset="utf-8" Since these generated files are no longer checked in, either in mesa or in the linux kernel, simplify things by dropping the verbose generated comment. These were semi-nerf'd on the kernel side, in the name of build reproducibility, by commit ba64c6737f86 ("drivers: gpu: drm: msm: registers: improve reproducibility"), but in a way that was semi- kernel specific. We can just reduce the divergence between kernel and mesa by just dropping all of this. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/registers/gen_header.py | 37 +-------------------- 1 file changed, 1 insertion(+), 36 deletions(-) diff --git a/drivers/gpu/drm/msm/registers/gen_header.py b/drivers/gpu/drm/= msm/registers/gen_header.py index a409404627c7..56273a810c1d 100644 --- a/drivers/gpu/drm/msm/registers/gen_header.py +++ b/drivers/gpu/drm/msm/registers/gen_header.py @@ -444,9 +444,6 @@ class Parser(object): self.variants =3D set() self.file =3D [] self.xml_files =3D [] - self.copyright_year =3D None - self.authors =3D [] - self.license =3D None =20 def error(self, message): parser, filename =3D self.stack[-1] @@ -686,10 +683,6 @@ class Parser(object): self.parse_field(attrs["name"], attrs) elif name =3D=3D "database": self.do_validate(attrs["xsi:schemaLocation"]) - elif name =3D=3D "copyright": - self.copyright_year =3D attrs["year"] - elif name =3D=3D "author": - self.authors.append(attrs["name"] + " <" + attrs["email"] + "> " + attr= s["name"]) =20 def end_element(self, name): if name =3D=3D "domain": @@ -706,8 +699,6 @@ class Parser(object): self.current_array =3D self.current_array.parent elif name =3D=3D "enum": self.current_enum =3D None - elif name =3D=3D "license": - self.license =3D self.cdata =20 def character_data(self, data): self.cdata +=3D data @@ -868,33 +859,7 @@ def dump_c(args, guard, func): =20 print("#ifndef %s\n#define %s\n" % (guard, guard)) =20 - print("""/* Autogenerated file, DO NOT EDIT manually! - -This file was generated by the rules-ng-ng gen_header.py tool in this git = repository: -http://gitlab.freedesktop.org/mesa/mesa/ -git clone https://gitlab.freedesktop.org/mesa/mesa.git - -The rules-ng-ng source files this header was generated from are: -""") - maxlen =3D 0 - for filepath in p.xml_files: - new_filepath =3D re.sub("^.+drivers","drivers",filepath) - maxlen =3D max(maxlen, len(new_filepath)) - for filepath in p.xml_files: - pad =3D " " * (maxlen - len(new_filepath)) - filesize =3D str(os.path.getsize(filepath)) - filesize =3D " " * (7 - len(filesize)) + filesize - filetime =3D time.ctime(os.path.getmtime(filepath)) - print("- " + new_filepath + pad + " (" + filesize + " bytes, from )") - if p.copyright_year: - current_year =3D str(datetime.date.today().year) - print() - print("Copyright (C) %s-%s by the following authors:" % (p.copyright_yea= r, current_year)) - for author in p.authors: - print("- " + author) - if p.license: - print(p.license) - print("*/") + print("/* Autogenerated file, DO NOT EDIT manually! */") =20 print() print("#ifdef __KERNEL__") --=20 2.51.0 From nobody Tue Dec 16 13:27:26 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A4E3299959 for ; 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charset="utf-8" Sync from mesa commit 04e2140d8be7 ("freedreno/registers: remove python 3.9 dependency for compiling msm"). Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/registers/gen_header.py | 157 +++++++++++++------- 1 file changed, 107 insertions(+), 50 deletions(-) diff --git a/drivers/gpu/drm/msm/registers/gen_header.py b/drivers/gpu/drm/= msm/registers/gen_header.py index 56273a810c1d..16239b754804 100644 --- a/drivers/gpu/drm/msm/registers/gen_header.py +++ b/drivers/gpu/drm/msm/registers/gen_header.py @@ -11,7 +11,6 @@ import collections import argparse import time import datetime -import re =20 class Error(Exception): def __init__(self, message): @@ -31,7 +30,7 @@ class Enum(object): def names(self): return [n for (n, value) in self.values] =20 - def dump(self): + def dump(self, is_deprecated): use_hex =3D False for (name, value) in self.values: if value > 0x1000: @@ -45,7 +44,7 @@ class Enum(object): print("\t%s =3D %d," % (name, value)) print("};\n") =20 - def dump_pack_struct(self): + def dump_pack_struct(self, is_deprecated): pass =20 class Field(object): @@ -70,11 +69,11 @@ class Field(object): raise parser.error("booleans should be 1 bit fields") elif self.type =3D=3D "float" and not (high - low =3D=3D 31 or high - lo= w =3D=3D 15): raise parser.error("floats should be 16 or 32 bit fields") - elif not self.type in builtin_types and not self.type in parser.enums: + elif self.type not in builtin_types and self.type not in parser.enums: raise parser.error("unknown type '%s'" % self.type) =20 def ctype(self, var_name): - if self.type =3D=3D None: + if self.type is None: type =3D "uint32_t" val =3D var_name elif self.type =3D=3D "boolean": @@ -124,7 +123,7 @@ def field_name(reg, f): name =3D f.name.lower() else: # We hit this path when a reg is defined with no bitset fields, ie. - # + # name =3D reg.name.lower() =20 if (name in [ "double", "float", "int" ]) or not (name[0].isalpha()): @@ -146,6 +145,18 @@ def indices_strides(indices): "%s(i%d)" % (offset, idx) for (idx, (ctype, stride, offset)) in enumerate(indices)]) =20 +def is_number(str): + try: + int(str) + return True + except ValueError: + return False + +def sanitize_variant(variant): + if variant and "-" in variant: + return variant[:variant.index("-")] + return variant + class Bitset(object): def __init__(self, name, template): self.name =3D name @@ -175,11 +186,7 @@ class Bitset(object): print("#endif\n") =20 print(" return (struct fd_reg_pair) {") - if reg.array: - print(" .reg =3D REG_%s(__i)," % reg.full_name) - else: - print(" .reg =3D REG_%s," % reg.full_name) - + print(" .reg =3D (uint32_t)%s," % reg.reg_offset()) print(" .value =3D") for f in self.fields: if f.type in [ "address", "waddress" ]: @@ -204,7 +211,7 @@ class Bitset(object): =20 print(" };") =20 - def dump_pack_struct(self, reg=3DNone): + def dump_pack_struct(self, is_deprecated, reg=3DNone): if not reg: return =20 @@ -229,12 +236,15 @@ class Bitset(object): tab_to(" uint32_t", "dword;") print("};\n") =20 + depcrstr =3D "" + if is_deprecated: + depcrstr =3D " FD_DEPRECATED" if reg.array: - print("static inline struct fd_reg_pair\npack_%s(uint32_t __i, struct %= s fields)\n{" % - (prefix, prefix)) + print("static inline%s struct fd_reg_pair\npack_%s(uint32_t __i, struct= %s fields)\n{" % + (depcrstr, prefix, prefix)) else: - print("static inline struct fd_reg_pair\npack_%s(struct %s fields)\n{" % - (prefix, prefix)) + print("static inline%s struct fd_reg_pair\npack_%s(struct %s fields)\n{= " % + (depcrstr, prefix, prefix)) =20 self.dump_regpair_builder(reg) =20 @@ -253,8 +263,8 @@ class Bitset(object): (prefix, prefix, prefix, skip)) =20 =20 - def dump(self, prefix=3DNone): - if prefix =3D=3D None: + def dump(self, is_deprecated, prefix=3DNone): + if prefix is None: prefix =3D self.name for f in self.fields: if f.name: @@ -262,9 +272,9 @@ class Bitset(object): else: name =3D prefix =20 - if not f.name and f.low =3D=3D 0 and f.shr =3D=3D 0 and not f.type in [= "float", "fixed", "ufixed"]: + if not f.name and f.low =3D=3D 0 and f.shr =3D=3D 0 and f.type not in [= "float", "fixed", "ufixed"]: pass - elif f.type =3D=3D "boolean" or (f.type =3D=3D None and f.low =3D=3D f.= high): + elif f.type =3D=3D "boolean" or (f.type is None and f.low =3D=3D f.high= ): tab_to("#define %s" % name, "0x%08x" % (1 << f.low)) else: tab_to("#define %s__MASK" % name, "0x%08x" % mask(f.low, f.high)) @@ -286,6 +296,7 @@ class Array(object): self.domain =3D domain self.variant =3D variant self.parent =3D parent + self.children =3D [] if self.parent: self.name =3D self.parent.name + "_" + self.local_name else: @@ -337,12 +348,15 @@ class Array(object): offset +=3D self.parent.total_offset() return offset =20 - def dump(self): + def dump(self, is_deprecated): + depcrstr =3D "" + if is_deprecated: + depcrstr =3D " FD_DEPRECATED" proto =3D indices_varlist(self.indices()) strides =3D indices_strides(self.indices()) array_offset =3D self.total_offset() if self.fixed_offsets: - print("static inline uint32_t __offset_%s(%s idx)" % (self.local_name, = self.index_ctype())) + print("static inline%s uint32_t __offset_%s(%s idx)" % (depcrstr, self.= local_name, self.index_ctype())) print("{\n\tswitch (idx) {") if self.index_type: for val, offset in zip(self.index_type.names(), self.offsets): @@ -357,7 +371,7 @@ class Array(object): else: tab_to("#define REG_%s_%s(%s)" % (self.domain, self.name, proto), "(0x%= 08x + %s )\n" % (array_offset, strides)) =20 - def dump_pack_struct(self): + def dump_pack_struct(self, is_deprecated): pass =20 def dump_regpair_builder(self): @@ -373,6 +387,7 @@ class Reg(object): self.bit_size =3D bit_size if array: self.name =3D array.name + "_" + self.name + array.children.append(self) self.full_name =3D self.domain + "_" + self.name if "stride" in attrs: self.stride =3D int(attrs["stride"], 0) @@ -397,25 +412,34 @@ class Reg(object): else: return self.offset =20 - def dump(self): + def reg_offset(self): + if self.array: + offset =3D self.array.offset + self.offset + return "(0x%08x + 0x%x*__i)" % (offset, self.array.stride) + return "0x%08x" % self.offset + + def dump(self, is_deprecated): + depcrstr =3D "" + if is_deprecated: + depcrstr =3D " FD_DEPRECATED " proto =3D indices_prototype(self.indices()) strides =3D indices_strides(self.indices()) offset =3D self.total_offset() if proto =3D=3D '': tab_to("#define REG_%s" % self.full_name, "0x%08x" % offset) else: - print("static inline uint32_t REG_%s(%s) { return 0x%08x + %s; }" % (se= lf.full_name, proto, offset, strides)) + print("static inline%s uint32_t REG_%s(%s) { return 0x%08x + %s; }" % (= depcrstr, self.full_name, proto, offset, strides)) =20 if self.bitset.inline: - self.bitset.dump(self.full_name) + self.bitset.dump(is_deprecated, self.full_name) + print("") =20 - def dump_pack_struct(self): + def dump_pack_struct(self, is_deprecated): if self.bitset.inline: - self.bitset.dump_pack_struct(self) + self.bitset.dump_pack_struct(is_deprecated, self) =20 def dump_regpair_builder(self): - if self.bitset.inline: - self.bitset.dump_regpair_builder(self) + self.bitset.dump_regpair_builder(self) =20 def dump_py(self): print("\tREG_%s =3D 0x%08x" % (self.full_name, self.offset)) @@ -451,7 +475,7 @@ class Parser(object): =20 def prefix(self, variant=3DNone): if self.current_prefix_type =3D=3D "variant" and variant: - return variant + return sanitize_variant(variant) elif self.current_stripe: return self.current_stripe + "_" + self.current_domain elif self.current_prefix: @@ -497,15 +521,22 @@ class Parser(object): return varset =20 def parse_variants(self, attrs): - if not "variants" in attrs: + if "variants" not in attrs: return None - variant =3D attrs["variants"].split(",")[0] - if "-" in variant: - variant =3D variant[:variant.index("-")] =20 + variant =3D attrs["variants"].split(",")[0] varset =3D self.parse_varset(attrs) =20 - assert varset.has_name(variant) + if "-" in variant: + # if we have a range, validate that both the start and end + # of the range are valid enums: + start =3D variant[:variant.index("-")] + end =3D variant[variant.index("-") + 1:] + assert varset.has_name(start) + if end !=3D "": + assert varset.has_name(end) + else: + assert varset.has_name(variant) =20 return variant =20 @@ -569,9 +600,6 @@ class Parser(object): error_str =3D str(xmlschema.error_log.filter_from_errors()[0]) raise self.error("Schema validation failed for: " + filename + "\n" + = error_str) except ImportError as e: - if self.validate: - raise e - print("lxml not found, skipping validation", file=3Dsys.stderr) =20 def do_parse(self, filename): @@ -640,7 +668,7 @@ class Parser(object): elif name =3D=3D "domain": self.current_domain =3D attrs["name"] if "prefix" in attrs: - self.current_prefix =3D self.parse_variants(attrs) + self.current_prefix =3D sanitize_variant(self.parse_variants(attrs)) self.current_prefix_type =3D attrs["prefix"] else: self.current_prefix =3D None @@ -648,7 +676,7 @@ class Parser(object): if "varset" in attrs: self.current_varset =3D self.enums[attrs["varset"]] elif name =3D=3D "stripe": - self.current_stripe =3D self.parse_variants(attrs) + self.current_stripe =3D sanitize_variant(self.parse_variants(attrs)) elif name =3D=3D "enum": self.current_enum_value =3D 0 self.current_enum =3D Enum(attrs["name"]) @@ -696,6 +724,13 @@ class Parser(object): elif name =3D=3D "reg32": self.current_reg =3D None elif name =3D=3D "array": + # if the array has no Reg children, push an implicit reg32: + if len(self.current_array.children) =3D=3D 0: + attrs =3D { + "name": "REG", + "offset": "0", + } + self.parse_reg(attrs, 32) self.current_array =3D self.current_array.parent elif name =3D=3D "enum": self.current_enum =3D None @@ -711,10 +746,10 @@ class Parser(object): if variants: for variant, vreg in variants.items(): if reg =3D=3D vreg: - d[(usage, variant)].append(reg) + d[(usage, sanitize_variant(variant))].append(reg) else: for variant in self.variants: - d[(usage, variant)].append(reg) + d[(usage, sanitize_variant(variant))].append(reg) =20 print("#ifdef __cplusplus") =20 @@ -744,6 +779,9 @@ class Parser(object): =20 print("#endif") =20 + def has_variants(self, reg): + return reg.name in self.variant_regs and not is_number(reg.name) and not= is_number(reg.name[1:]) + def dump(self): enums =3D [] bitsets =3D [] @@ -757,7 +795,7 @@ class Parser(object): regs.append(e) =20 for e in enums + bitsets + regs: - e.dump() + e.dump(self.has_variants(e)) =20 self.dump_reg_usages() =20 @@ -773,8 +811,7 @@ class Parser(object): =20 =20 def dump_reg_variants(self, regname, variants): - # Don't bother for things that only have a single variant: - if len(variants) =3D=3D 1: + if is_number(regname) or is_number(regname[1:]): return print("#ifdef __cplusplus") print("struct __%s {" % regname) @@ -825,11 +862,20 @@ class Parser(object): xtravar =3D "__i, " print("__%s(%sstruct __%s fields) {" % (regname, xtra, regname)) for variant in variants.keys(): - print(" if (%s =3D=3D %s) {" % (varenum.upper(), variant)) + if "-" in variant: + start =3D variant[:variant.index("-")] + end =3D variant[variant.index("-") + 1:] + if end !=3D "": + print(" if ((%s >=3D %s) && (%s <=3D %s)) {" % (varenum.upper(), sta= rt, varenum.upper(), end)) + else: + print(" if (%s >=3D %s) {" % (varenum.upper(), start)) + else: + print(" if (%s =3D=3D %s) {" % (varenum.upper(), variant)) reg =3D variants[variant] reg.dump_regpair_builder() print(" } else") print(" assert(!\"invalid variant\");") + print(" return (struct fd_reg_pair){};") print("}") =20 if bit_size =3D=3D 64: @@ -842,7 +888,7 @@ class Parser(object): =20 def dump_structs(self): for e in self.file: - e.dump_pack_struct() + e.dump_pack_struct(self.has_variants(e)) =20 for regname in self.variant_regs: self.dump_reg_variants(regname, self.variant_regs[regname]) @@ -877,9 +923,20 @@ def dump_c(args, guard, func): print("#endif") print() =20 + print("#ifndef FD_NO_DEPRECATED_PACK") + print("#define FD_DEPRECATED __attribute__((deprecated))") + print("#else") + print("#define FD_DEPRECATED") + print("#endif") + print() + func(p) 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Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 10 +++++----- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 +++++----- drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 18 +++++++----------- 3 files changed, 17 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/ms= m/adreno/a6xx_catalog.c index a2d587e1a4f5..44df6410bce1 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c @@ -1355,11 +1355,11 @@ DECLARE_ADRENO_REGLIST_LIST(a7xx_pwrup_reglist); =20 /* Applicable for X185, A750 */ static const u32 a750_ifpc_reglist_regs[] =3D { - REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_0, - REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_1, - REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_2, - REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_3, - REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_4, + REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(0), + REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(1), + REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(2), + REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(3), + REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(4), REG_A6XX_TPL1_NC_MODE_CNTL, REG_A6XX_SP_NC_MODE_CNTL, REG_A6XX_CP_DBG_ECO_CNTL, diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/ad= reno/a6xx_gpu.c index 2f68394d6c3b..a45c3917ae9b 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1337,14 +1337,14 @@ static int hw_init(struct msm_gpu *gpu) =20 /* Set weights for bicubic filtering */ if (adreno_is_a650_family(adreno_gpu) || adreno_is_x185(adreno_gpu)) { - gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_0, 0); - gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_1, + gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(0), 0); + gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(1), 0x3fe05ff4); - gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_2, + gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(2), 0x3fa0ebee); - gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_3, + gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(3), 0x3f5193ed); - gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_4, + gpu_write(gpu, REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(4), 0x3f0243f0); } =20 diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml b/drivers/gpu/dr= m/msm/registers/adreno/a6xx.xml index 86fab2750ba7..28d4e7149a5c 100644 --- a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml +++ b/drivers/gpu/drm/msm/registers/adreno/a6xx.xml @@ -3296,17 +3296,13 @@ by a particular renderpass/blit. @@ -848,26 +850,69 @@ by a particular renderpass/blit. - - + + + + + - + + + =20 =20 - + + + + + + + + + + + + + + + + + + + + + =20 - - - - + + + + + + + + + + + + + + + + + + + + + + =20 =20 - + @@ -875,12 +920,13 @@ by a particular renderpass/blit. - + + =20 - + @@ -890,39 +936,66 @@ by a particular renderpass/blit. - - - - - + + + + + + + - - + + + + + + + + + + + + + + + + + + + + + + + - + - - - - - - + + + + + + + - + =20 - + + + + @@ -932,7 +1005,10 @@ by a particular renderpass/blit. - + + + + @@ -942,10 +1018,13 @@ by a particular renderpass/blit. - - - - + + + + + + + =20 @@ -993,7 +1072,7 @@ by a particular renderpass/blit. =20 - + @@ -1003,7 +1082,9 @@ by a particular renderpass/blit. - + + + =20 @@ -1024,7 +1105,7 @@ by a particular renderpass/blit. =20 - + @@ -1037,18 +1118,25 @@ by a particular renderpass/blit. In sysmem mode GRAS_LRZ_CNTL.LRZ_WRITE is not considered. - - + + + + =20 - + - - + + + + + - + + + =20 @@ -1066,30 +1154,35 @@ by a particular renderpass/blit. =20 - - - + + + =20 - + =20 - - + + + + + =20 - + + - + + =20 - - + + =20 @@ -1099,7 +1192,7 @@ by a particular renderpass/blit. =20 - + @@ -1107,20 +1200,32 @@ by a particular renderpass/blit. - - + + + + + - - + + + + + - - - + + + + + + + - + + + =20 @@ -1128,7 +1233,7 @@ by a particular renderpass/blit. =20 - + LRZ write also disabled for blend/etc. @@ -1155,26 +1260,36 @@ by a particular renderpass/blit. - + + + =20 =20 - + - + + + =20 - + - - - + + + + + + + - + + + =20 - @@ -1232,19 +1346,20 @@ by a particular renderpass/blit. =20 =20 - + =20 - + =20 - + - + =20 - - - + + + LUT used to convert quality buffer values to HW shading rate values.= An array of 4-bit values. + =20 =20 @@ -1269,28 +1384,29 @@ by a particular renderpass/blit. - + + + - + =20 - + - - - - - - + + + + + + - - - + + =20 @@ -1308,22 +1424,7 @@ by a particular renderpass/blit. --> =20 - - - - - - - - - - - - - - - - + =20 @@ -1347,9 +1448,6 @@ by a particular renderpass/blit. - - - =20 @@ -1516,9 +1614,7 @@ by a particular renderpass/blit. - - - + =20 @@ -1532,14 +1628,9 @@ by a particular renderpass/blit. - - - + - - - - + @@ -1575,9 +1666,7 @@ by a particular renderpass/blit. - - - + @@ -1616,8 +1705,9 @@ by a particular renderpass/blit. - - + + + @@ -1626,7 +1716,7 @@ by a particular renderpass/blit. - + @@ -1650,10 +1740,13 @@ by a particular renderpass/blit. - + + - - + + + + =20 @@ -1726,10 +1819,7 @@ by a particular renderpass/blit. - - - - + =20 @@ -1737,8 +1827,9 @@ by a particular renderpass/blit. - - + + + @@ -1747,12 +1838,10 @@ by a particular renderpass/blit. + - - - - + @@ -1815,7 +1904,7 @@ by a particular renderpass/blit. =20 - + @@ -1921,13 +2010,13 @@ by a particular renderpass/blit. - - - + + + =20 - - - + + + =20 @@ -1935,23 +2024,33 @@ by a particular renderpass/blit. =20 - - - + + + =20 - - - + + + + + + + + + + + + + + + =20 - - - =20 + @@ -1991,10 +2090,10 @@ by a particular renderpass/blit. =20 - - - - + + + + =20 @@ -2011,11 +2110,11 @@ by a particular renderpass/blit. =20 - + Packed array of a6xx_varying_interp_mode - + Packed array of a6xx_varying_ps_repl_mode @@ -2024,12 +2123,12 @@ by a particular renderpass/blit. =20 - + =20 - + - - - + + + + + - + + + + =20 - + =20 - + @@ -2077,12 +2181,13 @@ by a particular renderpass/blit. =20 - + - - - - + + + + + =20 @@ -2101,11 +2206,12 @@ by a particular renderpass/blit. - - - =20 - + + + + + @@ -2122,9 +2228,11 @@ by a particular renderpass/blit. ViewID through the VS. - + + + =20 - + @@ -2133,22 +2241,28 @@ by a particular renderpass/blit. - - + + + + + - - - - - - - - - - - - - + + + + + + + + + + + + + + + + =20 =20 @@ -2163,52 +2277,62 @@ by a particular renderpass/blit. =20 - + =20 - - + - + =20 - + + + - + + + =20 - - + + + =20 =20 - + - + =20 - - + + + - + =20 - + + + + - - + + + =20 - + - + =20 - - - + + =20 - + - + + + =20 =20 - - - - - - - - - - - - - - - - - - - - - - - - - - + + =20 - + - + =20 =20 - + =20 @@ -2270,18 +2370,18 @@ by a particular renderpass/blit. + =20 - - - - - + + + + =20 - + =20 @@ -2290,9 +2390,9 @@ by a particular renderpass/blit. =20 - + - + @@ -2303,34 +2403,39 @@ by a particular renderpass/blit. - - - + + + + - + =20 - + Possibly not really "initiating" the draw but the layout is similar to VGT_DRAW_INITIATOR on older gens - - + + =20 - + =20 @@ -3104,14 +3209,19 @@ by a particular renderpass/blit. instructions VS/HS/DS/GS/FS. See SP_CS_UAV_BASE_* for compute shaders. --> - + + + =20 - + + + + + =20 - - - + + @@ -3156,7 +3266,7 @@ by a particular renderpass/blit. - + @@ -3192,7 +3302,7 @@ by a particular renderpass/blit. =20 - + @@ -3232,12 +3342,12 @@ by a particular renderpass/blit. =20 - + - + @@ -3634,7 +3744,7 @@ by a particular renderpass/blit. =20 - + =20 @@ -3796,7 +3906,7 @@ by a particular renderpass/blit. =20 - + diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx_descriptors.xml b/dr= ivers/gpu/drm/msm/registers/adreno/a6xx_descriptors.xml index 307d43dda8a2..56cfaff614a4 100644 --- a/drivers/gpu/drm/msm/registers/adreno/a6xx_descriptors.xml +++ b/drivers/gpu/drm/msm/registers/adreno/a6xx_descriptors.xml @@ -9,38 +9,6 @@ xsi:schemaLocation=3D"https://gitlab.freedesktop.org/freed= reno/ rules-fd.xsd"> =20 Texture sampler dwords - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - =20 @@ -79,14 +47,6 @@ xsi:schemaLocation=3D"https://gitlab.freedesktop.org/fre= edreno/ rules-fd.xsd"> =20 Texture constant dwords - - - - - - - - diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx_enums.xml b/drivers/= gpu/drm/msm/registers/adreno/a6xx_enums.xml index 665539b098c6..4e42f055b85f 100644 --- a/drivers/gpu/drm/msm/registers/adreno/a6xx_enums.xml +++ b/drivers/gpu/drm/msm/registers/adreno/a6xx_enums.xml @@ -320,14 +320,14 @@ to upconvert to 32b float internally? 16b float: 3 --> - + - + =20 @@ -380,4 +380,50 @@ to upconvert to 32b float internally? =20 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml b/drivers/= gpu/drm/msm/registers/adreno/adreno_pm4.xml index 7abc08635495..0e10e1c6d263 100644 --- a/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml +++ b/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml @@ -120,12 +120,12 @@ xsi:schemaLocation=3D"https://gitlab.freedesktop.org/= freedreno/ rules-fd.xsd"> - + - - + + =20 @@ -523,7 +523,7 @@ xsi:schemaLocation=3D"https://gitlab.freedesktop.org/fr= eedreno/ rules-fd.xsd"> @@ -640,8 +640,7 @@ xsi:schemaLocation=3D"https://gitlab.freedesktop.org/fr= eedreno/ rules-fd.xsd"> Clears, adds to local, or adds to global timestamp - - + Write to a scratch memory that is read by CP_REG_TEST with SOURCE_SCRATCH_MEM set. It's not the same scratch as scratch registers. @@ -918,12 +917,6 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) =20 - - - - - - @@ -1099,8 +1092,10 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - + + + @@ -1166,26 +1161,11 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + - - - - - - + - - - - - - + @@ -1195,26 +1175,11 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + - - - - - - + - - - - - - + @@ -1300,7 +1265,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) =20 - + @@ -1308,12 +1273,12 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + + + + + + =20 @@ -1329,12 +1294,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + @@ -1354,18 +1314,8 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - - - - - - - + + =20 @@ -1378,12 +1328,12 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + + + + + + =20 @@ -1403,6 +1353,10 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) + + + + =20 @@ -1518,24 +1472,14 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + - - - - - - + @@ -1550,12 +1494,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + @@ -1573,12 +1512,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + @@ -1712,12 +1646,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) TODO what is gpuaddr for, seems to be all 0's.. maybe needed for context switch? --> - - - - - - + @@ -1832,9 +1761,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - + @@ -1843,12 +1770,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + @@ -2161,12 +2083,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - - - - - - + --=20 2.51.0