From nobody Wed Sep 10 01:55:31 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3EA82206BB; Mon, 8 Sep 2025 17:38:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757353119; cv=none; b=OpvofVHylWkxGZ9TtOurJyb2ul3KWdPczkn9CHuKF4IuxdaSlwcHeHU9f4IyJDbP9sxxmSL5C+4Gf6Q7QrvSfuednkpu27ofO7n9x901/Yaq8vJn0ltEB1IDogBZeTd6V7AtxuadC+kz6+FSseaiF8UNN82Ue1F/1kQfno9NO/g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757353119; c=relaxed/simple; bh=Ks2WJ5kVDWLjFH2qgU8AOFpLwTbJDweQlZM/i2hSG1A=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jV9rGKnyOIiuvjdk6ztFnneOSfoFYXTaYU2uZgC7lz8quDhLDcsS+8cAJOi8jXtjej7x7ed1wiJh54l5xxb+SwL+HMuG2+SbQpY5miu3NpWdHY4BLAXz8jF7QvXNkWnMDtwfy8DivosplINYsUT7yo7ouc6rCKuWVsOpKep7EDw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=naIkQAf/; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="naIkQAf/" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 588HcVv13916327; Mon, 8 Sep 2025 12:38:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757353112; bh=BXRd9cNajXgMoXFnQ8H+Mp9quCpzNS7bOq38PRnGCFA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=naIkQAf/a2+zDLCEwuJ3VGpzUF+Mh81yb7+BtFxDtLFaqlDDi6SuejZmM1qcmpU6d JcohdWI3KftukvgUwlmsPYnzFR2Dg1YFwwK+zQL4MJltFJYm6/OjXPOEZkGh4hoS8x sxH8taLaZZ/JN13VCbBfLHIoy7qN/6LEgcYbKIhw= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 588HcVKf3122914 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Mon, 8 Sep 2025 12:38:31 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Mon, 8 Sep 2025 12:38:31 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Mon, 8 Sep 2025 12:38:31 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 588HcVVo1281123; Mon, 8 Sep 2025 12:38:31 -0500 From: Judith Mendez To: Judith Mendez , Nishanth Menon CC: Moteen Shah , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , Subject: [PATCH v2 1/2] arm64: dts: ti: k3-am62p/j722s: Remove HS400 support from common Date: Mon, 8 Sep 2025 12:38:30 -0500 Message-ID: <20250908173831.269039-2-jm@ti.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250908173831.269039-1-jm@ti.com> References: <20250908173831.269039-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Since eMMC HS400 has been descoped for J722s due to errata i2478 [0] and is supported for AM62Px device, remove eMMC HS400 support from common-main.dtsi and include only in am62p-main.dtsi. [0] https://www.ti.com/lit/pdf/sprz575 Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 3 --- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 6 ++++++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/= arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 4427b12058a6..0c05bcf1d776 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -576,15 +576,12 @@ sdhci0: mmc@fa10000 { bus-width =3D <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; - mmc-hs400-1_8v; ti,clkbuf-sel =3D <0x7>; - ti,strobe-sel =3D <0x77>; ti,trm-icp =3D <0x8>; ti,otap-del-sel-legacy =3D <0x1>; ti,otap-del-sel-mmc-hs =3D <0x1>; ti,otap-del-sel-ddr52 =3D <0x6>; ti,otap-del-sel-hs200 =3D <0x8>; - ti,otap-del-sel-hs400 =3D <0x5>; ti,itap-del-sel-legacy =3D <0x10>; ti,itap-del-sel-mmc-hs =3D <0xa>; ti,itap-del-sel-ddr52 =3D <0x3>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62p-main.dtsi index 6aea9d3f134e..90afe21e972b 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -31,6 +31,12 @@ usb1: usb@31100000 { snps,usb2-lpm-disable; }; }; + + sdhci0: mmc@fa10000 { + mmc-hs400-1_8v; + ti,strobe-sel =3D <0x77>; + ti,otap-del-sel-hs400 =3D <0x5>; + }; }; =20 &oc_sram { --=20 2.51.0 From nobody Wed Sep 10 01:55:31 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3E411C07C4; Mon, 8 Sep 2025 17:38:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757353119; cv=none; b=FIkOQZ8fw1noOVKB/2ocmtHGJALnYQB8ocOPT02ON6xPgRyuR2yzh2mbIWYCsnaaY/8WkFmNAwqCPjeaZTvLjAqW5j5LNTUZfAyRyAd60UamH2uU1uNEZ3gZ+mmh0ndYnuiZPRTgiIYvj7qeOPNAXiZfl4zrU6+A7Up8/ZhidUY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757353119; c=relaxed/simple; bh=BoIeC66onOFsw0HPcxliBVdwQXYRiHMW7ojCs/kgk9Q=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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Mon, 8 Sep 2025 12:38:31 -0500 From: Judith Mendez To: Judith Mendez , Nishanth Menon CC: Moteen Shah , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , Subject: [PATCH v2 2/2] arm64: dts: ti: k3-am62p: Update eMMC HS400 STRB value Date: Mon, 8 Sep 2025 12:38:31 -0500 Message-ID: <20250908173831.269039-3-jm@ti.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250908173831.269039-1-jm@ti.com> References: <20250908173831.269039-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" STRB setting for eMMC HS400 have been updated in device datasheet [0], so update for am62p in k3-am62p-main. [0] https://www.ti.com/lit/gpn/am62p Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62p-main.dtsi index 90afe21e972b..a1ce2fc8d947 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -34,7 +34,7 @@ usb1: usb@31100000 { =20 sdhci0: mmc@fa10000 { mmc-hs400-1_8v; - ti,strobe-sel =3D <0x77>; + ti,strobe-sel =3D <0x66>; ti,otap-del-sel-hs400 =3D <0x5>; }; }; --=20 2.51.0