From nobody Wed Sep 10 06:02:22 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4053530E0EC; Mon, 8 Sep 2025 14:29:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757341764; cv=none; b=r5JVdC7TbVyWcDjXpmeVYWfTu5MpAft+neJQA1bcyOpzgeMbaXbpgCbmwG08NkPDC4fnS9/sERQflxQDIpcWkwmc1amarjHnz9lzp2Bu96MMy0IC+Sb5QZK8lGYoChLGE8LiBcpn1PmuE0neUTaFI9rvCnNTY4VfHelruI67cyQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757341764; c=relaxed/simple; bh=YNks+kIYcOMbgxMHb3AYVzPiGu/StYwTz+X6j3L5EnI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=egRSZA1ARLn2igUKJdeHTMfNZvLhbp6u1NTPjFBIAdOEaSWHA0Kmi/LYkX0YLFFUpnUCoYwBDrxixN1+3xWKGRvE20wXqLTgpQIVbRB1OXtkjodEvNRBPBp2/9tAKBrv5QdQpold2DY1m1S9HEvFkxqAtg2d6DqAi5k3bhYQ6KA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Romij5MV; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Romij5MV" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 588ETFKe3810246; Mon, 8 Sep 2025 09:29:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757341755; bh=SLBa1QVxDWjUycGbyu+4DE0iiMXBxKUH/gN1fmCJzZA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Romij5MVFyTb8pdeAnbTRqM8fMgqsNArJ7XeoG4rN6rFpgEDEzR06vZ+fS03DAnEH 4ZBsb44whPXTMXz1/VRcJhTg+gJPWxaOg+UBeWMRU4bE/NWx5aN8qzEoe+KMwJGZPc 09DVfhNPeChyZTEBFkA5O3F6TXUrsE2aTN0o2UX8= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 588ETFoo3063579 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Mon, 8 Sep 2025 09:29:15 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Mon, 8 Sep 2025 09:29:15 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Mon, 8 Sep 2025 09:29:14 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [172.24.234.212]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 588ESech1037553; Mon, 8 Sep 2025 09:29:10 -0500 From: Beleswar Padhi To: , , , , , CC: , , , , , , , , Subject: [PATCH v4 05/34] arm64: dts: ti: k3-am62p-j722s: Enable remote processors at board level Date: Mon, 8 Sep 2025 19:57:57 +0530 Message-ID: <20250908142826.1828676-6-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250908142826.1828676-1-b-padhi@ti.com> References: <20250908142826.1828676-1-b-padhi@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Remote Processors defined in top-level AM62P-J722S common SoC dtsi files are incomplete without the memory carveouts and mailbox assignments which are only known at board integration level. Therefore, disable the remote processors at SoC level and enable them at board level where above information is available. Signed-off-by: Beleswar Padhi Acked-by: Andrew Davis Tested-by: Judith Mendez Reviewed-by: Dhruva Gole --- v4: Changelog: 1. Carried R/B tag Link to v3: https://lore.kernel.org/all/20250905051846.1189612-6-b-padhi@ti.com/ v3: Changelog: 1. Carried A/B and T/B tags. Link to v2: https://lore.kernel.org/all/20250823160901.2177841-6-b-padhi@ti.com/ v2: Changelog: 1. Re-ordered patch from [PATCH 13/33] to [PATCH v2 05/33]. Link to v1: https://lore.kernel.org/all/20250814223839.3256046-14-b-padhi@ti.com/ arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 ++ arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 3 +++ arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 3 +++ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 1 + 6 files changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi b/arch/a= rm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi index bd6a00d13aea..5288c959f3c1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi @@ -205,6 +205,7 @@ mcu_r5fss0_core0: r5f@79000000 { ti,atcm-enable =3D <0>; ti,btcm-enable =3D <1>; ti,loczrama =3D <0>; + status =3D "disabled"; }; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi b/arc= h/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi index 6757b37a9de3..8612b45e665c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi @@ -136,6 +136,7 @@ wkup_r5fss0_core0: r5f@78000000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62p5-sk.dts index 899da7896563..2755598fd1f5 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -725,6 +725,7 @@ &wkup_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_r5_0>; memory-region =3D <&wkup_r5fss0_core0_dma_memory_region>, <&wkup_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &mcu_r5fss0 { @@ -735,6 +736,7 @@ &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster1 &mbox_mcu_r5_0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &main_uart0 { diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/bo= ot/dts/ti/k3-am67a-beagley-ai.dts index bf9b23df1da2..b329e4cb0c37 100644 --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts @@ -515,6 +515,7 @@ &wkup_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_wkup_r5_0>; memory-region =3D <&wkup_r5fss0_core0_dma_memory_region>, <&wkup_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &mcu_r5fss0 { @@ -525,6 +526,7 @@ &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster1 &mbox_mcu_r5_0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &main_r5fss0 { @@ -535,6 +537,7 @@ &main_r5fss0_core0 { mboxes =3D <&mailbox0_cluster3 &mbox_main_r5_0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &c7x_0 { diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/= ti/k3-j722s-evm.dts index 9d8abfa9afd2..2b9e007432a9 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -850,6 +850,7 @@ &wkup_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_wkup_r5_0>; memory-region =3D <&wkup_r5fss0_core0_dma_memory_region>, <&wkup_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &mcu_r5fss0 { @@ -860,6 +861,7 @@ &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster1 &mbox_mcu_r5_0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &main_r5fss0 { @@ -870,6 +872,7 @@ &main_r5fss0_core0 { mboxes =3D <&mailbox0_cluster3 &mbox_main_r5_0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &c7x_0 { diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j722s-main.dtsi index 993828872dfb..d57fdd38bdce 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -368,6 +368,7 @@ main_r5fss0_core0: r5f@78400000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; }; =20 --=20 2.34.1