From nobody Wed Sep 10 05:50:40 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90D9430CDAC; Mon, 8 Sep 2025 14:29:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757341753; cv=none; b=hQWoqNCRk0VoSkPOyPr2ShbHSIsAA/zWJZS8CUGZlEt/TyhXWTZ7u3Ld6Di6SAJtqiemUJaZMgj28PMjKoM1pUjh/5xrmjOiduHDH6C4+YLdLhKMzCKl7Y2FlzUAA9NLitIDpc1+jphBvxYMar2MElHZLLEwYKBJcr4G+u8ZH3Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757341753; c=relaxed/simple; bh=kGU3oDUzl2KXmuTZadZhyWj0kaJXvgOEXgaksZWFBu0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=TyO1f83O7dqCV9vM9fwWS87z8Pep8bP3q4b2cBixHKQztB3v2poptVZN2/l/SUqmFxOtVxvanoYj9eUJGXByEQLqocer3PKvNQ2xXfdF2MOeE8Hy7xY4WuTeN70dSThREr+PJ5XBRuuaxouGlof9H0r2T4pduIeKN5uljvruQJw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=UqIPY6le; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="UqIPY6le" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 588ET6Fb3810224; Mon, 8 Sep 2025 09:29:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757341746; bh=T2MR17weggiyEPbRgrdR25GH0iavLtW4vrISi+mM9Fg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=UqIPY6le8iQxJmiGMtbwkUEd+xkfA5Q8BHjGyXUs06mQaLhoC322nSwMpds+fawHt tJ6hbm6+Mzzf3oLsfvtmelC62Ahx3zOiqqDLbduNPaARkvSuGvzpFZS0jpF/oS8oWe 8mcg8DFNtbq338wwuihDWHwWwUGtcflybWsscb8U= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 588ET6oJ3833159 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Mon, 8 Sep 2025 09:29:06 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Mon, 8 Sep 2025 09:29:05 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Mon, 8 Sep 2025 09:29:05 -0500 Received: from uda0510294.dhcp.ti.com (uda0510294.dhcp.ti.com [172.24.234.212]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 588ESecf1037553; Mon, 8 Sep 2025 09:29:01 -0500 From: Beleswar Padhi To: , , , , , CC: , , , , , , , , Subject: [PATCH v4 03/34] arm64: dts: ti: k3-j721s2: Enable remote processors at board level Date: Mon, 8 Sep 2025 19:57:55 +0530 Message-ID: <20250908142826.1828676-4-b-padhi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250908142826.1828676-1-b-padhi@ti.com> References: <20250908142826.1828676-1-b-padhi@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Remote Processors defined in top-level J721S2 SoC dtsi files are incomplete without the memory carveouts and mailbox assignments which are only known at board integration level. Therefore, disable the remote processors at SoC level and enable them at board level where above information is available. Signed-off-by: Beleswar Padhi Acked-by: Andrew Davis --- v4: Changelog: 1. None Link to v3: https://lore.kernel.org/all/20250905051846.1189612-4-b-padhi@ti.com/ v3: Changelog: 1. Carried A/B tag. Link to v2: https://lore.kernel.org/all/20250823160901.2177841-4-b-padhi@ti.com/ v2: Changelog: 1. Re-ordered patch from [PATCH 08/33] to [PATCH v2 03/33]. Link to v1: https://lore.kernel.org/all/20250814223839.3256046-9-b-padhi@ti.com/ arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 6 ++++++ arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 12 ++++++++++++ 5 files changed, 45 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/b= oot/dts/ti/k3-am68-phycore-som.dtsi index fd715fee8170..383594732e81 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi @@ -371,24 +371,28 @@ &main_r5fss0_core0 { mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &main_r5fss0_core1 { mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region =3D <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; + status =3D "okay"; }; =20 &main_r5fss1_core0 { mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region =3D <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; + status =3D "okay"; }; =20 &main_r5fss1_core1 { mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region =3D <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; + status =3D "okay"; }; =20 /* eMMC */ @@ -407,10 +411,12 @@ &main_sdhci1 { =20 &main_r5fss0 { ti,cluster-mode =3D <0>; + status =3D "okay"; }; =20 &main_r5fss1 { ti,cluster-mode =3D <0>; + status =3D "okay"; }; =20 /* Timers are used by Remoteproc firmware */ @@ -438,16 +444,22 @@ &main_timer5 { status =3D "reserved"; }; =20 +&mcu_r5fss0 { + status =3D "okay"; +}; + &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &mcu_r5fss0_core1 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region =3D <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; + status =3D "okay"; }; =20 &ospi0 { diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/d= ts/ti/k3-am68-sk-som.dtsi index 4ca2d4e2fb9b..2d2edeeb7347 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi @@ -291,24 +291,32 @@ mbox_c71_1: mbox-c71-1 { }; }; =20 +&mcu_r5fss0 { + status =3D "okay"; +}; + &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &mcu_r5fss0_core1 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region =3D <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; + status =3D "okay"; }; =20 &main_r5fss0 { ti,cluster-mode =3D <0>; + status =3D "okay"; }; =20 &main_r5fss1 { ti,cluster-mode =3D <0>; + status =3D "okay"; }; =20 /* Timers are used by Remoteproc firmware */ @@ -340,24 +348,28 @@ &main_r5fss0_core0 { mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &main_r5fss0_core1 { mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region =3D <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; + status =3D "okay"; }; =20 &main_r5fss1_core0 { mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region =3D <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; + status =3D "okay"; }; =20 &main_r5fss1_core1 { mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region =3D <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; + status =3D "okay"; }; =20 &c71_0 { diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 0ad752975acd..80c51b11ac9f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -1895,6 +1895,7 @@ main_r5fss0: r5fss@5c00000 { ranges =3D <0x5c00000 0x00 0x5c00000 0x20000>, <0x5d00000 0x00 0x5d00000 0x20000>; power-domains =3D <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; =20 main_r5fss0_core0: r5f@5c00000 { compatible =3D "ti,j721s2-r5f"; @@ -1909,6 +1910,7 @@ main_r5fss0_core0: r5f@5c00000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; =20 main_r5fss0_core1: r5f@5d00000 { @@ -1924,6 +1926,7 @@ main_r5fss0_core1: r5f@5d00000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; }; =20 @@ -1935,6 +1938,7 @@ main_r5fss1: r5fss@5e00000 { ranges =3D <0x5e00000 0x00 0x5e00000 0x20000>, <0x5f00000 0x00 0x5f00000 0x20000>; power-domains =3D <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; =20 main_r5fss1_core0: r5f@5e00000 { compatible =3D "ti,j721s2-r5f"; @@ -1949,6 +1953,7 @@ main_r5fss1_core0: r5f@5e00000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; =20 main_r5fss1_core1: r5f@5f00000 { @@ -1964,6 +1969,7 @@ main_r5fss1_core1: r5f@5f00000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/= boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index bc31266126d0..837097751c18 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -690,6 +690,7 @@ mcu_r5fss0: r5fss@41000000 { ranges =3D <0x41000000 0x00 0x41000000 0x20000>, <0x41400000 0x00 0x41400000 0x20000>; power-domains =3D <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; =20 mcu_r5fss0_core0: r5f@41000000 { compatible =3D "ti,j721s2-r5f"; @@ -704,6 +705,7 @@ mcu_r5fss0_core0: r5f@41000000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; =20 mcu_r5fss0_core1: r5f@41400000 { @@ -719,6 +721,7 @@ mcu_r5fss0_core1: r5f@41400000 { ti,atcm-enable =3D <1>; ti,btcm-enable =3D <1>; ti,loczrama =3D <1>; + status =3D "disabled"; }; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot= /dts/ti/k3-j721s2-som-p0.dtsi index a9dbe14fb0c9..f252007262d3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -572,24 +572,32 @@ mbox_c71_1: mbox-c71-1 { }; }; =20 +&mcu_r5fss0 { + status =3D "okay"; +}; + &mcu_r5fss0_core0 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &mcu_r5fss0_core1 { mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region =3D <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; + status =3D "okay"; }; =20 &main_r5fss0 { ti,cluster-mode =3D <0>; + status =3D "okay"; }; =20 &main_r5fss1 { ti,cluster-mode =3D <0>; + status =3D "okay"; }; =20 /* Timers are used by Remoteproc firmware */ @@ -621,24 +629,28 @@ &main_r5fss0_core0 { mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; + status =3D "okay"; }; =20 &main_r5fss0_core1 { mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region =3D <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; + status =3D "okay"; }; =20 &main_r5fss1_core0 { mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region =3D <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; + status =3D "okay"; }; =20 &main_r5fss1_core1 { mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region =3D <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; + status =3D "okay"; }; =20 &c71_0 { --=20 2.34.1