From nobody Sat Feb 7 06:49:37 2026 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 104D630E0F3; Mon, 8 Sep 2025 13:48:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757339306; cv=none; b=HDf1lhOzDu2LphQIaq0knAxeqRW9I9YYW/S6hjd62PDt7JD/ZJhb8QG3UfpbwcrZ0IXaVpOTV5QeGew0JkR9pKgrJyzRBLAxRsheKdYxVHEhKLBoqU0HOlVIQmDdnkrecRqDU/FHCeE0CCO/GK/5iQjdjPhfXVX8b1w0NZ+ekok= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757339306; c=relaxed/simple; bh=XQB4VMq84UZqNt7eJYSfekbOZgalln7V82oC+7PifSs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=puf2n8HX9HKsUi4f02DSNp9uQteiwZMenLwgx7+NUcXcdreJZI2GYPgcz5GQlmdwnMyu2leFOk/EUk2nV4pwt+yYV15/C0qFqopiJhkSJ3kRlPsia0WsqvR9rPH3jNMaMMwNug4aoTK5cZUY3K/hr/4clyoWeG5nF4pJtNchxHU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=J+K8a4M9; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="J+K8a4M9" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 588Dm8GI062728; Mon, 8 Sep 2025 08:48:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1757339289; bh=n1ZvE2uhgKMvpWs8OqXecvOIMAUCfvVoetjpL8oUpNU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=J+K8a4M90r41ZpK1uJyxfbZ31fCFkNwMJSjqY35JwrpvlIEvllRDCBYsrlBHM/G25 m7F+Jqixw3zrwKd7dcaLAcwkCVCnHG+fCdyNaRu0fAXJjfCAk/HmsMz17gQfYS2h93 j2mYRly/ejgQoGK/i45+JCAashJ4sbYrtXNPt22M= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 588Dm8j23040583 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Mon, 8 Sep 2025 08:48:08 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Mon, 8 Sep 2025 08:48:05 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Mon, 8 Sep 2025 08:48:05 -0500 Received: from ws.dhcp.ti.com (ws.dhcp.ti.com [172.24.233.149]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 588DlU8v689321; Mon, 8 Sep 2025 08:47:58 -0500 From: Rishikesh Donadkar To: , , CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 04/16] media: ti: j721e-csi2rx: prepare SHIM code for multiple contexts Date: Mon, 8 Sep 2025 19:17:17 +0530 Message-ID: <20250908134729.3940366-5-r-donadkar@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250908134729.3940366-1-r-donadkar@ti.com> References: <20250908134729.3940366-1-r-donadkar@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" From: Pratyush Yadav Currently the SHIM code to configure the context only touches the first context. Add support for writing to the context's registers based on the context index. Signed-off-by: Pratyush Yadav Signed-off-by: Jai Luthra Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Yemike Abhilash Chandra Signed-off-by: Rishikesh Donadkar --- .../media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/driver= s/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c index 7b3036548cd0..c7aae3049696 100644 --- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c +++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c @@ -27,7 +27,7 @@ #define SHIM_CNTL 0x10 #define SHIM_CNTL_PIX_RST BIT(0) =20 -#define SHIM_DMACNTX 0x20 +#define SHIM_DMACNTX(i) (0x20 + ((i) * 0x20)) #define SHIM_DMACNTX_EN BIT(31) #define SHIM_DMACNTX_YUV422 GENMASK(27, 26) #define SHIM_DMACNTX_DUAL_PCK_CFG BIT(24) @@ -38,7 +38,7 @@ #define SHIM_DMACNTX_SIZE_16 1 #define SHIM_DMACNTX_SIZE_32 2 =20 -#define SHIM_PSI_CFG0 0x24 +#define SHIM_PSI_CFG0(i) (0x24 + ((i) * 0x20)) #define SHIM_PSI_CFG0_SRC_TAG GENMASK(15, 0) #define SHIM_PSI_CFG0_DST_TAG GENMASK(31, 16) =20 @@ -569,11 +569,13 @@ static void ti_csi2rx_setup_shim(struct ti_csi2rx_ctx= *ctx) break; } =20 - writel(reg, csi->shim + SHIM_DMACNTX); + reg |=3D FIELD_PREP(SHIM_DMACNTX_SIZE, fmt->size); + + writel(reg, csi->shim + SHIM_DMACNTX(ctx->idx)); =20 reg =3D FIELD_PREP(SHIM_PSI_CFG0_SRC_TAG, 0) | FIELD_PREP(SHIM_PSI_CFG0_DST_TAG, 0); - writel(reg, csi->shim + SHIM_PSI_CFG0); + writel(reg, csi->shim + SHIM_PSI_CFG0(ctx->idx)); } =20 static void ti_csi2rx_drain_callback(void *param) @@ -890,7 +892,7 @@ static int ti_csi2rx_start_streaming(struct vb2_queue *= vq, unsigned int count) err_pipeline: video_device_pipeline_stop(&ctx->vdev); writel(0, csi->shim + SHIM_CNTL); - writel(0, csi->shim + SHIM_DMACNTX); + writel(0, csi->shim + SHIM_DMACNTX(ctx->idx)); err: ti_csi2rx_cleanup_buffers(ctx, VB2_BUF_STATE_QUEUED); return ret; @@ -905,7 +907,7 @@ static void ti_csi2rx_stop_streaming(struct vb2_queue *= vq) video_device_pipeline_stop(&ctx->vdev); =20 writel(0, csi->shim + SHIM_CNTL); - writel(0, csi->shim + SHIM_DMACNTX); + writel(0, csi->shim + SHIM_DMACNTX(ctx->idx)); =20 ret =3D v4l2_subdev_call(csi->source, video, s_stream, 0); if (ret) --=20 2.34.1